89 lines
2.0 KiB
C
89 lines
2.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018, Intel Corporation
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* Copied from reset-sunxi.c
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include "reset-simple.h"
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#define SOCFPGA_NR_BANKS 8
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void __init socfpga_reset_init(void);
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static int a10_reset_init(struct device_node *np)
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{
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struct reset_simple_data *data;
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struct resource res;
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resource_size_t size;
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int ret;
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u32 reg_offset = 0x10;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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goto err_alloc;
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size = resource_size(&res);
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if (!request_mem_region(res.start, size, np->name)) {
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ret = -EBUSY;
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goto err_alloc;
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}
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data->membase = ioremap(res.start, size);
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if (!data->membase) {
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ret = -ENOMEM;
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goto err_alloc;
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}
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if (of_property_read_u32(np, "altr,modrst-offset", ®_offset))
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pr_warn("missing altr,modrst-offset property, assuming 0x10\n");
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data->membase += reg_offset;
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spin_lock_init(&data->lock);
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = SOCFPGA_NR_BANKS * 32;
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data->rcdev.ops = &reset_simple_ops;
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data->rcdev.of_node = np;
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data->status_active_low = true;
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return reset_controller_register(&data->rcdev);
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err_alloc:
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kfree(data);
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return ret;
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};
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/*
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* These are the reset controller we need to initialize early on in
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* our system, before we can even think of using a regular device
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* driver for it.
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* The controllers that we can register through the regular device
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* model are handled by the simple reset driver directly.
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*/
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static const struct of_device_id socfpga_early_reset_dt_ids[] __initconst = {
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{ .compatible = "altr,rst-mgr", },
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{ /* sentinel */ },
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};
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void __init socfpga_reset_init(void)
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{
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struct device_node *np;
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for_each_matching_node(np, socfpga_early_reset_dt_ids)
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a10_reset_init(np);
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}
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