License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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# SPDX-License-Identifier: GPL-2.0
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2005-04-17 06:20:36 +08:00
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# ==========================================================================
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# Building
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# ==========================================================================
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src := $(obj)
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2006-03-06 06:14:10 +08:00
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PHONY := __build
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2005-04-17 06:20:36 +08:00
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__build:
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2007-05-29 04:47:48 +08:00
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# Init all relevant variables used in kbuild files so
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# 1) they have correct type
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# 2) they do not inherit any value from the environment
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obj-y :=
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obj-m :=
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lib-y :=
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lib-m :=
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always :=
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2020-02-02 00:49:24 +08:00
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always-y :=
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always-m :=
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2007-05-29 04:47:48 +08:00
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targets :=
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subdir-y :=
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subdir-m :=
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EXTRA_AFLAGS :=
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EXTRA_CFLAGS :=
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EXTRA_CPPFLAGS :=
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EXTRA_LDFLAGS :=
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2007-10-16 04:25:06 +08:00
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asflags-y :=
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ccflags-y :=
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cppflags-y :=
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ldflags-y :=
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2007-05-29 04:47:48 +08:00
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2009-04-19 17:04:26 +08:00
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subdir-asflags-y :=
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subdir-ccflags-y :=
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2008-02-18 17:48:20 +08:00
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# Read auto.conf if it exists, otherwise ignore
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2006-06-09 13:12:39 +08:00
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-include include/config/auto.conf
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2005-04-17 06:20:36 +08:00
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2006-01-22 20:34:15 +08:00
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include scripts/Kbuild.include
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2005-07-26 04:26:04 +08:00
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# The filename Kbuild has precedence over Makefile
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2005-07-28 04:11:01 +08:00
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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2007-10-15 04:26:53 +08:00
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
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include $(kbuild-file)
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2005-04-17 06:20:36 +08:00
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include scripts/Makefile.lib
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2008-02-18 17:48:20 +08:00
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# Do not include host rules unless needed
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2020-03-29 19:08:32 +08:00
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ifneq ($(hostprogs)$(hostcxxlibs-y)$(hostcxxlibs-m),)
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2005-04-17 06:20:36 +08:00
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include scripts/Makefile.host
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endif
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
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ifeq ($(need-modorder),)
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2019-08-08 19:21:11 +08:00
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ifneq ($(obj-m),)
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$(warning $(patsubst %.o,'%.ko',$(obj-m)) will not be built even though obj-m is specified.)
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$(warning You cannot use subdir-y/m to visit a module Makefile. Use obj-y/m instead.)
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endif
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endif
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2005-04-17 06:20:36 +08:00
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# ===========================================================================
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2014-09-09 18:26:21 +08:00
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ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
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2005-04-17 06:20:36 +08:00
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lib-target := $(obj)/lib.a
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endif
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2019-12-19 00:04:28 +08:00
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ifdef need-builtin
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2018-02-10 22:25:04 +08:00
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builtin-target := $(obj)/built-in.a
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2005-04-17 06:20:36 +08:00
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endif
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2019-07-17 14:17:49 +08:00
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ifeq ($(CONFIG_MODULES)$(need-modorder),y1)
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2007-12-07 20:04:30 +08:00
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modorder-target := $(obj)/modules.order
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2019-02-14 11:05:15 +08:00
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endif
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2007-12-07 20:04:30 +08:00
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2019-07-17 14:18:00 +08:00
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mod-targets := $(patsubst %.o, %.mod, $(obj-m))
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2005-04-17 06:20:36 +08:00
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# Linus' kernel sanity checking tool
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2018-10-09 23:05:39 +08:00
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ifeq ($(KBUILD_CHECKSRC),1)
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quiet_cmd_checksrc = CHECK $<
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2018-11-30 09:05:28 +08:00
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cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
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2018-10-09 23:05:39 +08:00
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else ifeq ($(KBUILD_CHECKSRC),2)
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quiet_cmd_force_checksrc = CHECK $<
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2018-11-30 09:05:28 +08:00
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cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
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2005-04-17 06:20:36 +08:00
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endif
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2019-09-01 00:25:55 +08:00
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ifneq ($(KBUILD_EXTRA_WARN),)
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2018-11-30 09:05:28 +08:00
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cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $<
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2017-11-21 02:40:40 +08:00
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endif
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2005-04-17 06:20:36 +08:00
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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kbuild: Disable extra debugging info in .s output
Modern gcc adds view assignments, reset assertion checking in .loc
directives and a couple more additional debug markers, which clutters
the asm output unnecessarily:
For example:
bsp_resume:
.LFB3466:
.loc 1 1868 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1869 2 view .LVU73
# arch/x86/kernel/cpu/common.c:1869: if (this_cpu->c_bsp_resume)
.loc 1 1869 14 is_stmt 0 view .LVU74
movq this_cpu(%rip), %rax # this_cpu, this_cpu
movq 64(%rax), %rax # this_cpu.94_1->c_bsp_resume, _2
# arch/x86/kernel/cpu/common.c:1869: if (this_cpu->c_bsp_resume)
.loc 1 1869 5 view .LVU75
testq %rax, %rax # _2
je .L8 #,
.loc 1 1870 3 is_stmt 1 view .LVU76
movq $boot_cpu_data, %rdi #,
jmp __x86_indirect_thunk_rax
or
.loc 2 57 9 view .LVU478
.loc 2 57 9 view .LVU479
.loc 2 57 9 view .LVU480
.loc 2 57 9 view .LVU481
.LBB1385:
.LBB1383:
.LBB1379:
.LBB1377:
.LBB1375:
.loc 2 57 9 view .LVU482
.loc 2 57 9 view .LVU483
movl %edi, %edx # cpu, cpu
.LVL87:
.loc 2 57 9 is_stmt 0 view .LVU484
That MOV in there is drowned in debugging information and latter makes
it hard to follow the asm. And that DWARF info is not really needed for
asm output staring.
Disable the debug information generation which clutters the asm output
unnecessarily:
bsp_resume:
# arch/x86/kernel/cpu/common.c:1869: if (this_cpu->c_bsp_resume)
movq this_cpu(%rip), %rax # this_cpu, this_cpu
movq 64(%rax), %rax # this_cpu.94_1->c_bsp_resume, _2
# arch/x86/kernel/cpu/common.c:1869: if (this_cpu->c_bsp_resume)
testq %rax, %rax # _2
je .L8 #,
# arch/x86/kernel/cpu/common.c:1870: this_cpu->c_bsp_resume(&boot_cpu_data);
movq $boot_cpu_data, %rdi #,
jmp __x86_indirect_thunk_rax
.L8:
# arch/x86/kernel/cpu/common.c:1871: }
rep ret
.size bsp_resume, .-bsp_resume
[ bp: write commit message. ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
2019-02-10 14:51:00 +08:00
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cmd_cc_s_c = $(CC) $(filter-out $(DEBUG_CFLAGS), $(c_flags)) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
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2005-04-17 06:20:36 +08:00
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2007-05-06 15:23:45 +08:00
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$(obj)/%.s: $(src)/%.c FORCE
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2005-04-17 06:20:36 +08:00
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$(call if_changed_dep,cc_s_c)
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2016-04-08 10:24:47 +08:00
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quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
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cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
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2005-04-17 06:20:36 +08:00
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2007-05-06 15:23:45 +08:00
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$(obj)/%.i: $(src)/%.c FORCE
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2016-04-08 10:24:47 +08:00
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$(call if_changed_dep,cpp_i_c)
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2005-04-17 06:20:36 +08:00
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2016-11-01 09:46:19 +08:00
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# These mirror gensymtypes_S and co below, keep them in synch.
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cmd_gensymtypes_c = \
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2008-12-20 04:38:09 +08:00
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$(CPP) -D__GENKSYMS__ $(c_flags) $< | \
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2019-02-20 11:38:31 +08:00
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scripts/genksyms/genksyms $(if $(1), -T $(2)) \
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2017-02-03 17:54:05 +08:00
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$(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
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2008-12-20 04:38:09 +08:00
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$(if $(KBUILD_PRESERVE),-p) \
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2010-05-25 05:07:24 +08:00
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-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
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2008-12-20 04:38:09 +08:00
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kbuild: support for %.symtypes files
Here is a patch that adds a new -T option to genksyms for generating dumps of
the type definition that makes up the symbol version hashes. This allows to
trace modversion changes back to what caused them. The dump format is the
name of the type defined, followed by its definition (which is almost C):
s#list_head struct list_head { s#list_head * next , * prev ; }
The s#, u#, e#, and t# prefixes stand for struct, union, enum, and typedef.
The exported symbols do not define types, and thus do not have an x# prefix:
nfs4_acl_get_whotype int nfs4_acl_get_whotype ( char * , t#u32 )
The symbol type defintion of a single file can be generated with:
make fs/jbd/journal.symtypes
If KBUILD_SYMTYPES is defined, all the *.symtypes of all object files that
export symbols are generated.
The single *.symtypes files can be combined into a single file after a kernel
build with a script like the following:
for f in $(find -name '*.symtypes' | sort); do
f=${f#./}
echo "/* ${f%.symtypes}.o */"
cat $f
echo
done \
| sed -e '\:UNKNOWN:d' \
-e 's:[,;] }:}:g' \
-e 's:\([[({]\) :\1:g' \
-e 's: \([])},;]\):\1:g' \
-e 's: $::' \
$f \
| awk '
/^.#/ { if (defined[$1] == $0) {
print $1
next
}
defined[$1] = $0
}
{ print }
'
When the kernel ABI changes, diffing individual *.symtype files, or the
combined files, against each other will show which symbol changes caused the
ABI changes. This can save a tremendous amount of time.
Dump the types that make up modversions
Signed-off-by: Andreas Gruenbacher <agruen@suse.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2006-05-10 02:37:30 +08:00
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quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
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2008-12-20 04:38:09 +08:00
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cmd_cc_symtypes_c = \
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2016-11-01 09:46:19 +08:00
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$(call cmd_gensymtypes_c,true,$@) >/dev/null; \
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2008-12-20 04:38:09 +08:00
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test -s $@ || rm -f $@
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kbuild: support for %.symtypes files
Here is a patch that adds a new -T option to genksyms for generating dumps of
the type definition that makes up the symbol version hashes. This allows to
trace modversion changes back to what caused them. The dump format is the
name of the type defined, followed by its definition (which is almost C):
s#list_head struct list_head { s#list_head * next , * prev ; }
The s#, u#, e#, and t# prefixes stand for struct, union, enum, and typedef.
The exported symbols do not define types, and thus do not have an x# prefix:
nfs4_acl_get_whotype int nfs4_acl_get_whotype ( char * , t#u32 )
The symbol type defintion of a single file can be generated with:
make fs/jbd/journal.symtypes
If KBUILD_SYMTYPES is defined, all the *.symtypes of all object files that
export symbols are generated.
The single *.symtypes files can be combined into a single file after a kernel
build with a script like the following:
for f in $(find -name '*.symtypes' | sort); do
f=${f#./}
echo "/* ${f%.symtypes}.o */"
cat $f
echo
done \
| sed -e '\:UNKNOWN:d' \
-e 's:[,;] }:}:g' \
-e 's:\([[({]\) :\1:g' \
-e 's: \([])},;]\):\1:g' \
-e 's: $::' \
$f \
| awk '
/^.#/ { if (defined[$1] == $0) {
print $1
next
}
defined[$1] = $0
}
{ print }
'
When the kernel ABI changes, diffing individual *.symtype files, or the
combined files, against each other will show which symbol changes caused the
ABI changes. This can save a tremendous amount of time.
Dump the types that make up modversions
Signed-off-by: Andreas Gruenbacher <agruen@suse.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2006-05-10 02:37:30 +08:00
|
|
|
|
2007-05-06 15:23:45 +08:00
|
|
|
$(obj)/%.symtypes : $(src)/%.c FORCE
|
2008-12-02 06:21:01 +08:00
|
|
|
$(call cmd,cc_symtypes_c)
|
kbuild: support for %.symtypes files
Here is a patch that adds a new -T option to genksyms for generating dumps of
the type definition that makes up the symbol version hashes. This allows to
trace modversion changes back to what caused them. The dump format is the
name of the type defined, followed by its definition (which is almost C):
s#list_head struct list_head { s#list_head * next , * prev ; }
The s#, u#, e#, and t# prefixes stand for struct, union, enum, and typedef.
The exported symbols do not define types, and thus do not have an x# prefix:
nfs4_acl_get_whotype int nfs4_acl_get_whotype ( char * , t#u32 )
The symbol type defintion of a single file can be generated with:
make fs/jbd/journal.symtypes
If KBUILD_SYMTYPES is defined, all the *.symtypes of all object files that
export symbols are generated.
The single *.symtypes files can be combined into a single file after a kernel
build with a script like the following:
for f in $(find -name '*.symtypes' | sort); do
f=${f#./}
echo "/* ${f%.symtypes}.o */"
cat $f
echo
done \
| sed -e '\:UNKNOWN:d' \
-e 's:[,;] }:}:g' \
-e 's:\([[({]\) :\1:g' \
-e 's: \([])},;]\):\1:g' \
-e 's: $::' \
$f \
| awk '
/^.#/ { if (defined[$1] == $0) {
print $1
next
}
defined[$1] = $0
}
{ print }
'
When the kernel ABI changes, diffing individual *.symtype files, or the
combined files, against each other will show which symbol changes caused the
ABI changes. This can save a tremendous amount of time.
Dump the types that make up modversions
Signed-off-by: Andreas Gruenbacher <agruen@suse.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2006-05-10 02:37:30 +08:00
|
|
|
|
2017-04-25 04:04:58 +08:00
|
|
|
# LLVM assembly
|
|
|
|
|
# Generate .ll files from .c
|
|
|
|
|
quiet_cmd_cc_ll_c = CC $(quiet_modtag) $@
|
|
|
|
|
cmd_cc_ll_c = $(CC) $(c_flags) -emit-llvm -S -o $@ $<
|
|
|
|
|
|
|
|
|
|
$(obj)/%.ll: $(src)/%.c FORCE
|
|
|
|
|
$(call if_changed_dep,cc_ll_c)
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
# C (.c) files
|
|
|
|
|
# The C file is compiled and updated dependency information is generated.
|
|
|
|
|
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
|
|
|
|
|
|
|
|
|
|
quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
|
2018-11-30 09:05:25 +08:00
|
|
|
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-11-30 09:05:25 +08:00
|
|
|
ifdef CONFIG_MODVERSIONS
|
2005-04-17 06:20:36 +08:00
|
|
|
# When module versioning is enabled the following steps are executed:
|
2018-11-30 09:05:25 +08:00
|
|
|
# o compile a <file>.o from <file>.c
|
|
|
|
|
# o if <file>.o doesn't contain a __ksymtab version, i.e. does
|
|
|
|
|
# not export symbols, it's done.
|
2005-04-17 06:20:36 +08:00
|
|
|
# o otherwise, we calculate symbol versions using the good old
|
|
|
|
|
# genksyms on the preprocessed source and postprocess them in a way
|
2009-01-15 04:38:20 +08:00
|
|
|
# that they are usable as a linker script
|
2018-11-30 09:05:25 +08:00
|
|
|
# o generate .tmp_<file>.o from <file>.o using the linker to
|
2009-01-15 04:38:20 +08:00
|
|
|
# replace the unresolved symbols __crc_exported_symbol with
|
|
|
|
|
# the actual value of the checksum generated by genksyms
|
2018-11-30 09:05:25 +08:00
|
|
|
# o remove .tmp_<file>.o to <file>.o
|
2016-11-01 09:46:19 +08:00
|
|
|
|
|
|
|
|
cmd_modversions_c = \
|
2018-11-30 09:05:25 +08:00
|
|
|
if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
|
2016-11-01 09:46:19 +08:00
|
|
|
$(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
|
2010-05-25 05:07:24 +08:00
|
|
|
> $(@D)/.tmp_$(@F:.o=.ver); \
|
|
|
|
|
\
|
2018-11-30 09:05:25 +08:00
|
|
|
$(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
|
2010-05-25 05:07:24 +08:00
|
|
|
-T $(@D)/.tmp_$(@F:.o=.ver); \
|
|
|
|
|
mv -f $(@D)/.tmp_$(@F) $@; \
|
2018-11-30 09:05:25 +08:00
|
|
|
rm -f $(@D)/.tmp_$(@F:.o=.ver); \
|
2018-11-30 09:05:28 +08:00
|
|
|
fi
|
2005-04-17 06:20:36 +08:00
|
|
|
endif
|
|
|
|
|
|
ftrace: create __mcount_loc section
This patch creates a section in the kernel called "__mcount_loc".
This will hold a list of pointers to the mcount relocation for
each call site of mcount.
For example:
objdump -dr init/main.o
[...]
Disassembly of section .text:
0000000000000000 <do_one_initcall>:
0: 55 push %rbp
[...]
000000000000017b <init_post>:
17b: 55 push %rbp
17c: 48 89 e5 mov %rsp,%rbp
17f: 53 push %rbx
180: 48 83 ec 08 sub $0x8,%rsp
184: e8 00 00 00 00 callq 189 <init_post+0xe>
185: R_X86_64_PC32 mcount+0xfffffffffffffffc
[...]
We will add a section to point to each function call.
.section __mcount_loc,"a",@progbits
[...]
.quad .text + 0x185
[...]
The offset to of the mcount call site in init_post is an offset from
the start of the section, and not the start of the function init_post.
The mcount relocation is at the call site 0x185 from the start of the
.text section.
.text + 0x185 == init_post + 0xa
We need a way to add this __mcount_loc section in a way that we do not
lose the relocations after final link. The .text section here will
be attached to all other .text sections after final link and the
offsets will be meaningless. We need to keep track of where these
.text sections are.
To do this, we use the start of the first function in the section.
do_one_initcall. We can make a tmp.s file with this function as a reference
to the start of the .text section.
.section __mcount_loc,"a",@progbits
[...]
.quad do_one_initcall + 0x185
[...]
Then we can compile the tmp.s into a tmp.o
gcc -c tmp.s -o tmp.o
And link it into back into main.o.
ld -r main.o tmp.o -o tmp_main.o
mv tmp_main.o main.o
But we have a problem. What happens if the first function in a section
is not exported, and is a static function. The linker will not let
the tmp.o use it. This case exists in main.o as well.
Disassembly of section .init.text:
0000000000000000 <set_reset_devices>:
0: 55 push %rbp
1: 48 89 e5 mov %rsp,%rbp
4: e8 00 00 00 00 callq 9 <set_reset_devices+0x9>
5: R_X86_64_PC32 mcount+0xfffffffffffffffc
The first function in .init.text is a static function.
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
The lowercase 't' means that set_reset_devices is local and is not exported.
If we simply try to link the tmp.o with the set_reset_devices we end
up with two symbols: one local and one global.
.section __mcount_loc,"a",@progbits
.quad set_reset_devices + 0x10
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
U set_reset_devices
We still have an undefined reference to set_reset_devices, and if we try
to compile the kernel, we will end up with an undefined reference to
set_reset_devices, or even worst, it could be exported someplace else,
and then we will have a reference to the wrong location.
To handle this case, we make an intermediate step using objcopy.
We convert set_reset_devices into a global exported symbol before linking
it with tmp.o and set it back afterwards.
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 T set_reset_devices
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 T set_reset_devices
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
Now we have a section in main.o called __mcount_loc that we can place
somewhere in the kernel using vmlinux.ld.S and access it to convert
all these locations that call mcount into nops before starting SMP
and thus, eliminating the need to do this with kstop_machine.
Note, A well documented perl script (scripts/recordmcount.pl) is used
to do all this in one location.
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-15 03:45:07 +08:00
|
|
|
ifdef CONFIG_FTRACE_MCOUNT_RECORD
|
2018-08-06 21:17:44 +08:00
|
|
|
ifndef CC_USING_RECORD_MCOUNT
|
|
|
|
|
# compiler will not generate __mcount_loc use recordmcount or recordmcount.pl
|
2010-10-14 05:12:30 +08:00
|
|
|
ifdef BUILD_C_RECORDMCOUNT
|
2011-04-13 06:59:10 +08:00
|
|
|
ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
|
|
|
|
|
RECORDMCOUNT_FLAGS = -w
|
|
|
|
|
endif
|
2010-10-19 02:42:00 +08:00
|
|
|
# Due to recursion, we must skip empty.o.
|
|
|
|
|
# The empty.o file is created in the make process in order to determine
|
2017-08-02 10:31:06 +08:00
|
|
|
# the target endianness and word size. It is made before all other C
|
|
|
|
|
# files, including recordmcount.
|
ftrace: Speed up recordmcount
cmd_record_mcount is used to locate the _mcount symbols in the object
files, only the files compiled with -pg has the _mcount symbol, so, it
is only needed for such files, but the current cmd_record_mcount is used
for all of the object files, so, we need to fix it and speed it up.
Since -pg may be removed by the method used in kernel/trace/Makefile:
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg,,$(ORIG_CFLAGS))
Or may be removed by the method used in arch/x86/kernel/Makefile:
CFLAGS_REMOVE_file.o = -pg
So, we must check the last variable stores the compiling flags, that is
c_flags(Please refer to cmd_cc_o_c and rule_cc_o_c defined in
scripts/Makefile.build) and since the CFLAGS_REMOVE_file.o is already
filtered in _c_flags(Please refer to scripts/Makefile.lib) and _c_flags
has less symbols, therefore, we only need to check _c_flags.
---------------
Changes from v1:
o Don't touch Makefile for CONFIG_FTRACE_MCOUNT_RECORD is enough
o Use _c_flags intead of KBUILD_CFLAGS to cover CONFIG_REMOVE_file.o = -pg
(feedback from Steven Rostedt <rostedt@goodmis.org>)
Acked-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
LKML-Reference: <3dc8cddf022eb7024f9f2cf857529a15bee8999a.1288196498.git.wuzhangjin@gmail.com>
[ changed if [ .. == .. ] to if [ .. = .. ] to handle dash environments ]
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-10-28 00:24:34 +08:00
|
|
|
sub_cmd_record_mcount = \
|
|
|
|
|
if [ $(@) != "scripts/mod/empty.o" ]; then \
|
2011-04-13 06:59:10 +08:00
|
|
|
$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
|
ftrace: Speed up recordmcount
cmd_record_mcount is used to locate the _mcount symbols in the object
files, only the files compiled with -pg has the _mcount symbol, so, it
is only needed for such files, but the current cmd_record_mcount is used
for all of the object files, so, we need to fix it and speed it up.
Since -pg may be removed by the method used in kernel/trace/Makefile:
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg,,$(ORIG_CFLAGS))
Or may be removed by the method used in arch/x86/kernel/Makefile:
CFLAGS_REMOVE_file.o = -pg
So, we must check the last variable stores the compiling flags, that is
c_flags(Please refer to cmd_cc_o_c and rule_cc_o_c defined in
scripts/Makefile.build) and since the CFLAGS_REMOVE_file.o is already
filtered in _c_flags(Please refer to scripts/Makefile.lib) and _c_flags
has less symbols, therefore, we only need to check _c_flags.
---------------
Changes from v1:
o Don't touch Makefile for CONFIG_FTRACE_MCOUNT_RECORD is enough
o Use _c_flags intead of KBUILD_CFLAGS to cover CONFIG_REMOVE_file.o = -pg
(feedback from Steven Rostedt <rostedt@goodmis.org>)
Acked-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
LKML-Reference: <3dc8cddf022eb7024f9f2cf857529a15bee8999a.1288196498.git.wuzhangjin@gmail.com>
[ changed if [ .. == .. ] to if [ .. = .. ] to handle dash environments ]
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-10-28 00:24:34 +08:00
|
|
|
fi;
|
2011-05-17 21:36:46 +08:00
|
|
|
recordmcount_source := $(srctree)/scripts/recordmcount.c \
|
|
|
|
|
$(srctree)/scripts/recordmcount.h
|
2010-10-14 05:12:30 +08:00
|
|
|
else
|
2018-11-30 09:05:24 +08:00
|
|
|
sub_cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
|
2009-11-20 20:34:31 +08:00
|
|
|
"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
|
2008-10-30 03:30:26 +08:00
|
|
|
"$(if $(CONFIG_64BIT),64,32)" \
|
2018-09-17 15:37:54 +08:00
|
|
|
"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
|
2018-08-24 07:20:39 +08:00
|
|
|
"$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
|
2009-01-12 10:00:51 +08:00
|
|
|
"$(if $(part-of-module),1,0)" "$(@)";
|
2011-05-17 21:36:46 +08:00
|
|
|
recordmcount_source := $(srctree)/scripts/recordmcount.pl
|
2017-08-02 10:31:06 +08:00
|
|
|
endif # BUILD_C_RECORDMCOUNT
|
2019-03-26 22:50:28 +08:00
|
|
|
cmd_record_mcount = $(if $(findstring $(strip $(CC_FLAGS_FTRACE)),$(_c_flags)), \
|
|
|
|
|
$(sub_cmd_record_mcount))
|
2018-08-06 21:17:44 +08:00
|
|
|
endif # CC_USING_RECORD_MCOUNT
|
2017-08-02 10:31:06 +08:00
|
|
|
endif # CONFIG_FTRACE_MCOUNT_RECORD
|
ftrace: create __mcount_loc section
This patch creates a section in the kernel called "__mcount_loc".
This will hold a list of pointers to the mcount relocation for
each call site of mcount.
For example:
objdump -dr init/main.o
[...]
Disassembly of section .text:
0000000000000000 <do_one_initcall>:
0: 55 push %rbp
[...]
000000000000017b <init_post>:
17b: 55 push %rbp
17c: 48 89 e5 mov %rsp,%rbp
17f: 53 push %rbx
180: 48 83 ec 08 sub $0x8,%rsp
184: e8 00 00 00 00 callq 189 <init_post+0xe>
185: R_X86_64_PC32 mcount+0xfffffffffffffffc
[...]
We will add a section to point to each function call.
.section __mcount_loc,"a",@progbits
[...]
.quad .text + 0x185
[...]
The offset to of the mcount call site in init_post is an offset from
the start of the section, and not the start of the function init_post.
The mcount relocation is at the call site 0x185 from the start of the
.text section.
.text + 0x185 == init_post + 0xa
We need a way to add this __mcount_loc section in a way that we do not
lose the relocations after final link. The .text section here will
be attached to all other .text sections after final link and the
offsets will be meaningless. We need to keep track of where these
.text sections are.
To do this, we use the start of the first function in the section.
do_one_initcall. We can make a tmp.s file with this function as a reference
to the start of the .text section.
.section __mcount_loc,"a",@progbits
[...]
.quad do_one_initcall + 0x185
[...]
Then we can compile the tmp.s into a tmp.o
gcc -c tmp.s -o tmp.o
And link it into back into main.o.
ld -r main.o tmp.o -o tmp_main.o
mv tmp_main.o main.o
But we have a problem. What happens if the first function in a section
is not exported, and is a static function. The linker will not let
the tmp.o use it. This case exists in main.o as well.
Disassembly of section .init.text:
0000000000000000 <set_reset_devices>:
0: 55 push %rbp
1: 48 89 e5 mov %rsp,%rbp
4: e8 00 00 00 00 callq 9 <set_reset_devices+0x9>
5: R_X86_64_PC32 mcount+0xfffffffffffffffc
The first function in .init.text is a static function.
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
The lowercase 't' means that set_reset_devices is local and is not exported.
If we simply try to link the tmp.o with the set_reset_devices we end
up with two symbols: one local and one global.
.section __mcount_loc,"a",@progbits
.quad set_reset_devices + 0x10
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
U set_reset_devices
We still have an undefined reference to set_reset_devices, and if we try
to compile the kernel, we will end up with an undefined reference to
set_reset_devices, or even worst, it could be exported someplace else,
and then we will have a reference to the wrong location.
To handle this case, we make an intermediate step using objcopy.
We convert set_reset_devices into a global exported symbol before linking
it with tmp.o and set it back afterwards.
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 T set_reset_devices
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 T set_reset_devices
00000000000000a8 t __setup_set_reset_devices
000000000000105f t __setup_str_set_reset_devices
0000000000000000 t set_reset_devices
Now we have a section in main.o called __mcount_loc that we can place
somewhere in the kernel using vmlinux.ld.S and access it to convert
all these locations that call mcount into nops before starting SMP
and thus, eliminating the need to do this with kstop_machine.
Note, A well documented perl script (scripts/recordmcount.pl) is used
to do all this in one location.
Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-15 03:45:07 +08:00
|
|
|
|
2016-02-29 12:22:42 +08:00
|
|
|
ifdef CONFIG_STACK_VALIDATION
|
2016-03-04 01:39:30 +08:00
|
|
|
ifneq ($(SKIP_STACK_VALIDATION),1)
|
2016-02-29 12:22:42 +08:00
|
|
|
|
|
|
|
|
__objtool_obj := $(objtree)/tools/objtool/objtool
|
|
|
|
|
|
2017-10-14 04:02:00 +08:00
|
|
|
objtool_args = $(if $(CONFIG_UNWINDER_ORC),orc generate,check)
|
2017-07-25 07:36:57 +08:00
|
|
|
|
2018-01-31 17:18:28 +08:00
|
|
|
objtool_args += $(if $(part-of-module), --module,)
|
|
|
|
|
|
2016-02-29 12:22:42 +08:00
|
|
|
ifndef CONFIG_FRAME_POINTER
|
|
|
|
|
objtool_args += --no-fp
|
|
|
|
|
endif
|
2017-07-25 07:34:14 +08:00
|
|
|
ifdef CONFIG_GCOV_KERNEL
|
|
|
|
|
objtool_args += --no-unreachable
|
|
|
|
|
endif
|
2018-01-16 17:24:06 +08:00
|
|
|
ifdef CONFIG_RETPOLINE
|
|
|
|
|
objtool_args += --retpoline
|
|
|
|
|
endif
|
2019-02-25 19:50:09 +08:00
|
|
|
ifdef CONFIG_X86_SMAP
|
|
|
|
|
objtool_args += --uaccess
|
|
|
|
|
endif
|
2018-01-16 17:24:06 +08:00
|
|
|
|
2016-02-29 12:22:42 +08:00
|
|
|
# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
|
|
|
|
|
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
|
|
|
|
|
# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
|
|
|
|
|
cmd_objtool = $(if $(patsubst y%,, \
|
|
|
|
|
$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
|
2018-11-30 09:05:28 +08:00
|
|
|
$(__objtool_obj) $(objtool_args) $@)
|
2016-02-29 12:22:42 +08:00
|
|
|
objtool_obj = $(if $(patsubst y%,, \
|
|
|
|
|
$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
|
|
|
|
|
$(__objtool_obj))
|
|
|
|
|
|
2016-03-04 01:39:30 +08:00
|
|
|
endif # SKIP_STACK_VALIDATION
|
2016-02-29 12:22:42 +08:00
|
|
|
endif # CONFIG_STACK_VALIDATION
|
|
|
|
|
|
2017-07-25 07:36:57 +08:00
|
|
|
# Rebuild all objects when objtool changes, or is enabled/disabled.
|
|
|
|
|
objtool_dep = $(objtool_obj) \
|
|
|
|
|
$(wildcard include/config/orc/unwinder.h \
|
|
|
|
|
include/config/stack/validation.h)
|
|
|
|
|
|
2018-11-30 09:05:26 +08:00
|
|
|
ifdef CONFIG_TRIM_UNUSED_KSYMS
|
|
|
|
|
cmd_gen_ksymdeps = \
|
2018-11-30 09:05:28 +08:00
|
|
|
$(CONFIG_SHELL) $(srctree)/scripts/gen_ksymdeps.sh $@ >> $(dot-target).cmd
|
2018-11-30 09:05:26 +08:00
|
|
|
endif
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
define rule_cc_o_c
|
2018-11-30 09:05:27 +08:00
|
|
|
$(call cmd,checksrc)
|
|
|
|
|
$(call cmd_and_fixdep,cc_o_c)
|
|
|
|
|
$(call cmd,gen_ksymdeps)
|
|
|
|
|
$(call cmd,checkdoc)
|
|
|
|
|
$(call cmd,objtool)
|
|
|
|
|
$(call cmd,modversions_c)
|
|
|
|
|
$(call cmd,record_mcount)
|
2005-04-17 06:20:36 +08:00
|
|
|
endef
|
|
|
|
|
|
2016-02-29 12:22:42 +08:00
|
|
|
define rule_as_o_S
|
2018-11-30 09:05:27 +08:00
|
|
|
$(call cmd_and_fixdep,as_o_S)
|
|
|
|
|
$(call cmd,gen_ksymdeps)
|
|
|
|
|
$(call cmd,objtool)
|
|
|
|
|
$(call cmd,modversions_S)
|
2016-02-29 12:22:42 +08:00
|
|
|
endef
|
|
|
|
|
|
2016-01-22 06:07:24 +08:00
|
|
|
# List module undefined symbols (or empty line if not enabled)
|
|
|
|
|
ifdef CONFIG_TRIM_UNUSED_KSYMS
|
2019-07-17 14:18:00 +08:00
|
|
|
cmd_undef_syms = $(NM) $< | sed -n 's/^ *U //p' | xargs echo
|
2016-01-22 06:07:24 +08:00
|
|
|
else
|
|
|
|
|
cmd_undef_syms = echo
|
|
|
|
|
endif
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
# Built-in and composite module parts
|
2017-07-25 07:36:57 +08:00
|
|
|
$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_dep) FORCE
|
2005-04-17 06:20:36 +08:00
|
|
|
$(call cmd,force_checksrc)
|
|
|
|
|
$(call if_changed_rule,cc_o_c)
|
|
|
|
|
|
2019-07-17 14:18:00 +08:00
|
|
|
cmd_mod = { \
|
|
|
|
|
echo $(if $($*-objs)$($*-y)$($*-m), $(addprefix $(obj)/, $($*-objs) $($*-y) $($*-m)), $(@:.mod=.o)); \
|
|
|
|
|
$(cmd_undef_syms); \
|
|
|
|
|
} > $@
|
|
|
|
|
|
|
|
|
|
$(obj)/%.mod: $(obj)/%.o FORCE
|
|
|
|
|
$(call if_changed,mod)
|
|
|
|
|
|
|
|
|
|
targets += $(mod-targets)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
quiet_cmd_cc_lst_c = MKLST $@
|
|
|
|
|
cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
|
|
|
|
|
$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
|
|
|
|
|
System.map $(OBJDUMP) > $@
|
|
|
|
|
|
2007-05-06 15:23:45 +08:00
|
|
|
$(obj)/%.lst: $(src)/%.c FORCE
|
2005-04-17 06:20:36 +08:00
|
|
|
$(call if_changed_dep,cc_lst_c)
|
|
|
|
|
|
|
|
|
|
# Compile assembler sources (.S)
|
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
2016-11-01 09:46:19 +08:00
|
|
|
# .S file exports must have their C prototypes defined in asm/asm-prototypes.h
|
|
|
|
|
# or a file that it includes, in order to get versioned symbols. We build a
|
|
|
|
|
# dummy C file that includes asm-prototypes and the EXPORT_SYMBOL lines from
|
|
|
|
|
# the .S file (with trailing ';'), and run genksyms on that, to extract vers.
|
|
|
|
|
#
|
|
|
|
|
# This is convoluted. The .S file must first be preprocessed to run guards and
|
|
|
|
|
# expand names, then the resulting exports must be constructed into plain
|
|
|
|
|
# EXPORT_SYMBOL(symbol); to build our dummy C file, and that gets preprocessed
|
|
|
|
|
# to make the genksyms input.
|
|
|
|
|
#
|
|
|
|
|
# These mirror gensymtypes_c and co above, keep them in synch.
|
|
|
|
|
cmd_gensymtypes_S = \
|
2019-01-17 18:02:44 +08:00
|
|
|
{ echo "\#include <linux/kernel.h>" ; \
|
2016-11-01 09:46:19 +08:00
|
|
|
echo "\#include <asm/asm-prototypes.h>" ; \
|
|
|
|
|
$(CPP) $(a_flags) $< | \
|
2016-11-09 12:34:05 +08:00
|
|
|
grep "\<___EXPORT_SYMBOL\>" | \
|
2019-01-17 18:02:44 +08:00
|
|
|
sed 's/.*___EXPORT_SYMBOL[[:space:]]*\([a-zA-Z0-9_]*\)[[:space:]]*,.*/EXPORT_SYMBOL(\1);/' ; } | \
|
2016-11-01 09:46:19 +08:00
|
|
|
$(CPP) -D__GENKSYMS__ $(c_flags) -xc - | \
|
2019-02-20 11:38:31 +08:00
|
|
|
scripts/genksyms/genksyms $(if $(1), -T $(2)) \
|
2017-02-03 17:54:05 +08:00
|
|
|
$(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
|
2016-11-01 09:46:19 +08:00
|
|
|
$(if $(KBUILD_PRESERVE),-p) \
|
|
|
|
|
-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
|
|
|
|
|
|
|
|
|
|
quiet_cmd_cc_symtypes_S = SYM $(quiet_modtag) $@
|
|
|
|
|
cmd_cc_symtypes_S = \
|
|
|
|
|
$(call cmd_gensymtypes_S,true,$@) >/dev/null; \
|
|
|
|
|
test -s $@ || rm -f $@
|
|
|
|
|
|
|
|
|
|
$(obj)/%.symtypes : $(src)/%.S FORCE
|
|
|
|
|
$(call cmd,cc_symtypes_S)
|
|
|
|
|
|
|
|
|
|
|
2016-04-08 10:24:48 +08:00
|
|
|
quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
|
|
|
|
|
cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-05-06 15:23:45 +08:00
|
|
|
$(obj)/%.s: $(src)/%.S FORCE
|
2016-04-08 10:24:48 +08:00
|
|
|
$(call if_changed_dep,cpp_s_S)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
quiet_cmd_as_o_S = AS $(quiet_modtag) $@
|
2018-11-30 09:05:25 +08:00
|
|
|
cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
|
2016-11-01 09:46:19 +08:00
|
|
|
|
2019-08-19 13:54:20 +08:00
|
|
|
ifdef CONFIG_ASM_MODVERSIONS
|
2016-11-01 09:46:19 +08:00
|
|
|
|
|
|
|
|
# versioning matches the C process described above, with difference that
|
|
|
|
|
# we parse asm-prototypes.h C header to get function definitions.
|
|
|
|
|
|
|
|
|
|
cmd_modversions_S = \
|
2018-11-30 09:05:25 +08:00
|
|
|
if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
|
2016-11-01 09:46:19 +08:00
|
|
|
$(call cmd_gensymtypes_S,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
|
|
|
|
|
> $(@D)/.tmp_$(@F:.o=.ver); \
|
|
|
|
|
\
|
2018-11-30 09:05:25 +08:00
|
|
|
$(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
|
2016-11-01 09:46:19 +08:00
|
|
|
-T $(@D)/.tmp_$(@F:.o=.ver); \
|
|
|
|
|
mv -f $(@D)/.tmp_$(@F) $@; \
|
2018-11-30 09:05:25 +08:00
|
|
|
rm -f $(@D)/.tmp_$(@F:.o=.ver); \
|
2018-11-30 09:05:28 +08:00
|
|
|
fi
|
2016-11-01 09:46:19 +08:00
|
|
|
endif
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2017-07-25 07:36:57 +08:00
|
|
|
$(obj)/%.o: $(src)/%.S $(objtool_dep) FORCE
|
2016-02-29 12:22:42 +08:00
|
|
|
$(call if_changed_rule,as_o_S)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
kbuild: link $(real-obj-y) instead of $(obj-y) into built-in.a
In Kbuild, Makefiles can add the same object to obj-y multiple
times. So,
obj-y += foo.o
obj-y += foo.o
is fine.
However, this is not true when the same object is added multiple
times via composite objects. For example,
obj-y += foo.o bar.o
foo-objs := foo-bar-common.o foo-only.o
bar-objs := foo-bar-common.o bar-only.o
causes build error because two instances of foo-bar-common.o are
linked into the vmlinux.
Makefiles tend to invent ugly work-around, for example
- lib/zstd/Makefile
- drivers/net/ethernet/cavium/liquidio/Makefile
The technique used in Kbuild to avoid the multiple definition error
is to use $(filter $(obj-y), $^). Here, $^ lists the names of all
the prerequisites with duplicated names removed.
By replacing it with $(filter $(real-obj-y), $^) we can do likewise
for composite objects. For built-in objects, we do not need to keep
the composite object structure. We can simply expand them, and link
$(real-obj-y) to built-in.a.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-19 19:26:08 +08:00
|
|
|
targets += $(filter-out $(subdir-obj-y), $(real-obj-y)) $(real-obj-m) $(lib-y)
|
2020-02-02 00:49:24 +08:00
|
|
|
targets += $(extra-y) $(always-y) $(MAKECMDGOALS)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
# Linker scripts preprocessor (.lds.S -> .lds)
|
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
quiet_cmd_cpp_lds_S = LDS $@
|
Kbuild: don't pass "-C" to preprocessor when processing linker scripts
For some odd historical reason, we preprocessed the linker scripts with
"-C", which keeps comments around. That makes no sense, since the
comments are not meaningful for the build anyway.
And it actually breaks things, since linker scripts can't have C++ style
"//" comments in them, so keeping comments after preprocessing now
limits us in odd and surprising ways in our header files for no good
reason.
The -C option goes back to pre-git and pre-bitkeeper times, but seems to
have been historically used (along with "-traditional") for some
odd-ball architectures (ia64, MIPS and SH). It probably didn't matter
back then either, but might possibly have been used to minimize the
difference between the original file and the pre-processed result.
The reason for this may be lost in time, but let's not perpetuate it
only because we can't remember why we did this crazy thing.
This was triggered by the recent addition of SPDX lines to the source
tree, where people apparently were confused about why header files
couldn't use the C++ comment format.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Greg KH <gregkh@linuxfoundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-11-03 05:10:37 +08:00
|
|
|
cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
|
2009-09-21 06:14:12 +08:00
|
|
|
-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-05-06 15:23:45 +08:00
|
|
|
$(obj)/%.lds: $(src)/%.lds.S FORCE
|
2005-04-17 06:20:36 +08:00
|
|
|
$(call if_changed_dep,cpp_lds_S)
|
|
|
|
|
|
2012-09-22 06:31:13 +08:00
|
|
|
# ASN.1 grammar
|
|
|
|
|
# ---------------------------------------------------------------------------
|
2019-07-21 00:27:38 +08:00
|
|
|
quiet_cmd_asn1_compiler = ASN.1 $(basename $@).[ch]
|
2012-09-22 06:31:13 +08:00
|
|
|
cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
|
2019-07-21 00:27:38 +08:00
|
|
|
$(basename $@).c $(basename $@).h
|
2012-09-22 06:31:13 +08:00
|
|
|
|
2018-03-23 21:04:37 +08:00
|
|
|
$(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
|
2012-09-22 06:31:13 +08:00
|
|
|
$(call cmd,asn1_compiler)
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
# Build the compiled-in targets
|
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
# To build objects in subdirs, we need to descend into the directories
|
2019-12-19 00:05:14 +08:00
|
|
|
$(obj)/%/built-in.a: $(obj)/% ;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
#
|
2019-01-17 08:10:03 +08:00
|
|
|
# Rule to compile a set of .o files into one .a file (without symbol table)
|
2005-04-17 06:20:36 +08:00
|
|
|
#
|
|
|
|
|
ifdef builtin-target
|
kbuild: allow architectures to use thin archives instead of ld -r
ld -r is an incremental link used to create built-in.o files in build
subdirectories. It produces relocatable object files containing all
its input files, and these are are then pulled together and relocated
in the final link. Aside from the bloat, this constrains the final
link relocations, which has bitten large powerpc builds with
unresolvable relocations in the final link.
Alan Modra has recommended the kernel use thin archives for linking.
This is an alternative and means that the linker has more information
available to it when it links the kernel.
This patch enables a config option architectures can select, which
causes all built-in.o files to be built as thin archives. built-in.o
files in subdirectories do not get symbol table or index attached,
which improves speed and size. The final link pass creates a
built-in.o archive in the root output directory which includes the
symbol table and index. The linker then uses takes this file to link.
The --whole-archive linker option is required, because the linker now
has visibility to every individual object file, and it will otherwise
just completely avoid including those without external references
(consider a file with EXPORT_SYMBOL or initcall or hardware exceptions
as its only entry points). The traditional built works "by luck" as
built-in.o files are large enough that they're going to get external
references. However this optimisation is unpredictable for the kernel
(due to above external references), ineffective at culling unused, and
costly because the .o files have to be searched for references.
Superior alternatives for link-time culling should be used instead.
Build characteristics for inclink vs thinarc, on a small powerpc64le
pseries VM with a modest .config:
inclink thinarc
sizes
vmlinux 15 618 680 15 625 028
sum of all built-in.o 56 091 808 1 054 334
sum excluding root built-in.o 151 430
find -name built-in.o | xargs rm ; time make vmlinux
real 22.772s 21.143s
user 13.280s 13.430s
sys 4.310s 2.750s
- Final kernel pulled in only about 6K more, which shows how
ineffective the object file culling is.
- Build performance looks improved due to less pagecache activity.
On IO constrained systems it could be a bigger win.
- Build size saving is significant.
Side note, the toochain understands archives, so there's some tricks,
$ ar t built-in.o # list all files you linked with
$ size built-in.o # and their sizes
$ objdump -d built-in.o # disassembly (unrelocated) with filenames
Implementation by sfr, minor tweaks by npiggin.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
2016-08-24 20:29:19 +08:00
|
|
|
|
2018-03-19 19:26:12 +08:00
|
|
|
quiet_cmd_ar_builtin = AR $@
|
2019-09-21 14:49:54 +08:00
|
|
|
cmd_ar_builtin = rm -f $@; $(AR) cDPrST $@ $(real-prereqs)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
kbuild: link $(real-obj-y) instead of $(obj-y) into built-in.a
In Kbuild, Makefiles can add the same object to obj-y multiple
times. So,
obj-y += foo.o
obj-y += foo.o
is fine.
However, this is not true when the same object is added multiple
times via composite objects. For example,
obj-y += foo.o bar.o
foo-objs := foo-bar-common.o foo-only.o
bar-objs := foo-bar-common.o bar-only.o
causes build error because two instances of foo-bar-common.o are
linked into the vmlinux.
Makefiles tend to invent ugly work-around, for example
- lib/zstd/Makefile
- drivers/net/ethernet/cavium/liquidio/Makefile
The technique used in Kbuild to avoid the multiple definition error
is to use $(filter $(obj-y), $^). Here, $^ lists the names of all
the prerequisites with duplicated names removed.
By replacing it with $(filter $(real-obj-y), $^) we can do likewise
for composite objects. For built-in objects, we do not need to keep
the composite object structure. We can simply expand them, and link
$(real-obj-y) to built-in.a.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-19 19:26:08 +08:00
|
|
|
$(builtin-target): $(real-obj-y) FORCE
|
2018-03-19 19:26:12 +08:00
|
|
|
$(call if_changed,ar_builtin)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
targets += $(builtin-target)
|
|
|
|
|
endif # builtin-target
|
|
|
|
|
|
2007-12-07 20:04:30 +08:00
|
|
|
#
|
|
|
|
|
# Rule to create modules.order file
|
|
|
|
|
#
|
|
|
|
|
# Create commands to either record .ko file or cat modules.order from
|
|
|
|
|
# a subdirectory
|
|
|
|
|
$(modorder-target): $(subdir-ym) FORCE
|
2019-07-17 14:17:51 +08:00
|
|
|
$(Q){ $(foreach m, $(modorder), \
|
|
|
|
|
$(if $(filter %/modules.order, $m), cat $m, echo $m);) :; } \
|
|
|
|
|
| $(AWK) '!x[$$0]++' - > $@
|
2007-12-07 20:04:30 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
#
|
2019-01-17 08:10:03 +08:00
|
|
|
# Rule to compile a set of .o files into one .a file (with symbol table)
|
2005-04-17 06:20:36 +08:00
|
|
|
#
|
|
|
|
|
ifdef lib-target
|
|
|
|
|
|
|
|
|
|
$(lib-target): $(lib-y) FORCE
|
2019-02-05 15:33:37 +08:00
|
|
|
$(call if_changed,ar)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
targets += $(lib-target)
|
2016-01-16 03:01:22 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
endif
|
|
|
|
|
|
2019-01-17 18:02:43 +08:00
|
|
|
# NOTE:
|
|
|
|
|
# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
|
|
|
|
|
# module is turned into a multi object module, $^ will contain header file
|
|
|
|
|
# dependencies recorded in the .*.cmd file.
|
2005-04-17 06:20:36 +08:00
|
|
|
quiet_cmd_link_multi-m = LD [M] $@
|
kbuild: create *.mod with full directory path and remove MODVERDIR
While descending directories, Kbuild produces objects for modules,
but do not link final *.ko files; it is done in the modpost.
To keep track of modules, Kbuild creates a *.mod file in $(MODVERDIR)
for every module it is building. Some post-processing steps read the
necessary information from *.mod files. This avoids descending into
directories again. This mechanism was introduced in 2003 or so.
Later, commit 551559e13af1 ("kbuild: implement modules.order") added
modules.order. So, we can simply read it out to know all the modules
with directory paths. This is easier than parsing the first line of
*.mod files.
$(MODVERDIR) has a flat directory structure, that is, *.mod files
are named only with base names. This is based on the assumption that
the module name is unique across the tree. This assumption is really
fragile.
Stephen Rothwell reported a race condition caused by a module name
conflict:
https://lkml.org/lkml/2019/5/13/991
In parallel building, two different threads could write to the same
$(MODVERDIR)/*.mod simultaneously.
Non-unique module names are the source of all kind of troubles, hence
commit 3a48a91901c5 ("kbuild: check uniqueness of module names")
introduced a new checker script.
However, it is still fragile in the build system point of view because
this race happens before scripts/modules-check.sh is invoked. If it
happens again, the modpost will emit unclear error messages.
To fix this issue completely, create *.mod with full directory path
so that two threads never attempt to write to the same file.
$(MODVERDIR) is no longer needed.
Since modules with directory paths are listed in modules.order, Kbuild
is still able to find *.mod files without additional descending.
I also killed cmd_secanalysis; scripts/mod/sumversion.c computes MD4 hash
for modules with MODULE_VERSION(). When CONFIG_DEBUG_SECTION_MISMATCH=y,
it occurs not only in the modpost stage, but also during directory
descending, where sumversion.c may parse stale *.mod files. It would emit
'No such file or directory' warning when an object consisting a module is
renamed, or when a single-obj module is turned into a multi-obj module or
vice versa.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
2019-07-17 14:17:57 +08:00
|
|
|
cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2014-08-19 15:34:20 +08:00
|
|
|
$(multi-used-m): FORCE
|
2005-04-17 06:20:36 +08:00
|
|
|
$(call if_changed,link_multi-m)
|
2015-10-27 21:02:24 +08:00
|
|
|
$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
kbuild: link $(real-obj-y) instead of $(obj-y) into built-in.a
In Kbuild, Makefiles can add the same object to obj-y multiple
times. So,
obj-y += foo.o
obj-y += foo.o
is fine.
However, this is not true when the same object is added multiple
times via composite objects. For example,
obj-y += foo.o bar.o
foo-objs := foo-bar-common.o foo-only.o
bar-objs := foo-bar-common.o bar-only.o
causes build error because two instances of foo-bar-common.o are
linked into the vmlinux.
Makefiles tend to invent ugly work-around, for example
- lib/zstd/Makefile
- drivers/net/ethernet/cavium/liquidio/Makefile
The technique used in Kbuild to avoid the multiple definition error
is to use $(filter $(obj-y), $^). Here, $^ lists the names of all
the prerequisites with duplicated names removed.
By replacing it with $(filter $(real-obj-y), $^) we can do likewise
for composite objects. For built-in objects, we do not need to keep
the composite object structure. We can simply expand them, and link
$(real-obj-y) to built-in.a.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-19 19:26:08 +08:00
|
|
|
targets += $(multi-used-m)
|
2017-11-13 18:29:36 +08:00
|
|
|
targets := $(filter-out $(PHONY), $(targets))
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-03-23 21:04:33 +08:00
|
|
|
# Add intermediate targets:
|
|
|
|
|
# When building objects with specific suffix patterns, add intermediate
|
|
|
|
|
# targets that the final targets are derived from.
|
|
|
|
|
intermediate_targets = $(foreach sfx, $(2), \
|
|
|
|
|
$(patsubst %$(strip $(1)),%$(sfx), \
|
|
|
|
|
$(filter %$(strip $(1)), $(targets))))
|
kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers
GNU Make automatically deletes intermediate files that are updated
in a chain of pattern rules.
Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
Example 2) %.o <- %.c <- %.c_shipped
A couple of makefiles mark such targets as .PRECIOUS to prevent Make
from deleting them, but the correct way is to use .SECONDARY.
.SECONDARY
Prerequisites of this special target are treated as intermediate
files but are never automatically deleted.
.PRECIOUS
When make is interrupted during execution, it may delete the target
file it is updating if the file was modified since make started.
If you mark the file as precious, make will never delete the file
if interrupted.
Both can avoid deletion of intermediate files, but the difference is
the behavior when Make is interrupted; .SECONDARY deletes the target,
but .PRECIOUS does not.
The use of .PRECIOUS is relatively rare since we do not want to keep
partially constructed (possibly corrupted) targets.
Another difference is that .PRECIOUS works with pattern rules whereas
.SECONDARY does not.
.PRECIOUS: $(obj)/%.lex.c
works, but
.SECONDARY: $(obj)/%.lex.c
has no effect. However, for the reason above, I do not want to use
.PRECIOUS which could cause obscure build breakage.
The targets specified as .SECONDARY must be explicit. $(targets)
contains all targets that need to include .*.cmd files. So, the
intermediates you want to keep are mostly in there. Therefore, mark
$(targets) as .SECONDARY. It means primary targets are also marked
as .SECONDARY, but I do not see any drawback for this.
I replaced some .SECONDARY / .PRECIOUS markers with 'targets'. This
will make Kbuild search for non-existing .*.cmd files, but this is
not a noticeable performance issue.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Frank Rowand <frowand.list@gmail.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
2018-03-23 21:04:39 +08:00
|
|
|
# %.asn1.o <- %.asn1.[ch] <- %.asn1
|
2018-03-23 21:04:34 +08:00
|
|
|
# %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
|
2018-03-23 21:04:33 +08:00
|
|
|
# %.lex.o <- %.lex.c <- %.l
|
|
|
|
|
# %.tab.o <- %.tab.[ch] <- %.y
|
kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers
GNU Make automatically deletes intermediate files that are updated
in a chain of pattern rules.
Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
Example 2) %.o <- %.c <- %.c_shipped
A couple of makefiles mark such targets as .PRECIOUS to prevent Make
from deleting them, but the correct way is to use .SECONDARY.
.SECONDARY
Prerequisites of this special target are treated as intermediate
files but are never automatically deleted.
.PRECIOUS
When make is interrupted during execution, it may delete the target
file it is updating if the file was modified since make started.
If you mark the file as precious, make will never delete the file
if interrupted.
Both can avoid deletion of intermediate files, but the difference is
the behavior when Make is interrupted; .SECONDARY deletes the target,
but .PRECIOUS does not.
The use of .PRECIOUS is relatively rare since we do not want to keep
partially constructed (possibly corrupted) targets.
Another difference is that .PRECIOUS works with pattern rules whereas
.SECONDARY does not.
.PRECIOUS: $(obj)/%.lex.c
works, but
.SECONDARY: $(obj)/%.lex.c
has no effect. However, for the reason above, I do not want to use
.PRECIOUS which could cause obscure build breakage.
The targets specified as .SECONDARY must be explicit. $(targets)
contains all targets that need to include .*.cmd files. So, the
intermediates you want to keep are mostly in there. Therefore, mark
$(targets) as .SECONDARY. It means primary targets are also marked
as .SECONDARY, but I do not see any drawback for this.
I replaced some .SECONDARY / .PRECIOUS markers with 'targets'. This
will make Kbuild search for non-existing .*.cmd files, but this is
not a noticeable performance issue.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Frank Rowand <frowand.list@gmail.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
2018-03-23 21:04:39 +08:00
|
|
|
targets += $(call intermediate_targets, .asn1.o, .asn1.c .asn1.h) \
|
|
|
|
|
$(call intermediate_targets, .dtb.o, .dtb.S .dtb) \
|
2018-03-23 21:04:34 +08:00
|
|
|
$(call intermediate_targets, .lex.o, .lex.c) \
|
2018-03-23 21:04:33 +08:00
|
|
|
$(call intermediate_targets, .tab.o, .tab.c .tab.h)
|
|
|
|
|
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
|
|
|
# Build
|
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
ifdef single-build
|
|
|
|
|
|
2019-10-16 13:15:46 +08:00
|
|
|
KBUILD_SINGLE_TARGETS := $(filter $(obj)/%, $(KBUILD_SINGLE_TARGETS))
|
|
|
|
|
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
|
|
|
curdir-single := $(sort $(foreach x, $(KBUILD_SINGLE_TARGETS), \
|
|
|
|
|
$(if $(filter $(x) $(basename $(x)).o, $(targets)), $(x))))
|
|
|
|
|
|
|
|
|
|
# Handle single targets without any rule: show "Nothing to be done for ..." or
|
|
|
|
|
# "No rule to make target ..." depending on whether the target exists.
|
|
|
|
|
unknown-single := $(filter-out $(addsuffix /%, $(subdir-ym)), \
|
2019-10-16 13:15:46 +08:00
|
|
|
$(filter-out $(curdir-single), $(KBUILD_SINGLE_TARGETS)))
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
|
|
|
|
2019-10-16 13:15:47 +08:00
|
|
|
single-subdirs := $(foreach d, $(subdir-ym), \
|
|
|
|
|
$(if $(filter $(d)/%, $(KBUILD_SINGLE_TARGETS)), $(d)))
|
|
|
|
|
|
|
|
|
|
__build: $(curdir-single) $(single-subdirs)
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
|
|
|
ifneq ($(unknown-single),)
|
|
|
|
|
$(Q)$(MAKE) -f /dev/null $(unknown-single)
|
|
|
|
|
endif
|
|
|
|
|
@:
|
|
|
|
|
|
|
|
|
|
ifeq ($(curdir-single),)
|
|
|
|
|
# Nothing to do in this directory. Do not include any .*.cmd file for speed-up
|
|
|
|
|
targets :=
|
|
|
|
|
else
|
|
|
|
|
targets += $(curdir-single)
|
|
|
|
|
endif
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
|
|
|
|
|
__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
|
|
|
|
|
$(if $(KBUILD_MODULES),$(obj-m) $(mod-targets) $(modorder-target)) \
|
2020-02-02 00:49:24 +08:00
|
|
|
$(subdir-ym) $(always-y)
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
|
|
|
@:
|
|
|
|
|
|
|
|
|
|
endif
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
# Descending
|
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
2006-03-06 06:14:10 +08:00
|
|
|
PHONY += $(subdir-ym)
|
2005-04-17 06:20:36 +08:00
|
|
|
$(subdir-ym):
|
2019-08-06 18:03:21 +08:00
|
|
|
$(Q)$(MAKE) $(build)=$@ \
|
kbuild: make single targets work more correctly
Currently, the single target build directly descends into the directory
of the target. For example,
$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.
This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.
[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.
The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:
[foo/Makefile]
obj-y := bar/baz.o
This often happens when a module is so big that its source files
are divided into sub-directories.
In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.
Some modules work around this issue by putting an empty Makefile
in every sub-directory.
This commit fixes those problems by making the single target build
descend in the same way as the normal build does.
Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:
obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).
The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-14 23:19:18 +08:00
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$(if $(filter $@/, $(KBUILD_SINGLE_TARGETS)),single-build=) \
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2019-08-06 18:03:22 +08:00
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need-builtin=$(if $(filter $@/built-in.a, $(subdir-obj-y)),1) \
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need-modorder=$(if $(need-modorder),$(if $(filter $@/modules.order, $(modorder)),1))
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2005-04-17 06:20:36 +08:00
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# Add FORCE to the prequisites of a target to force it to be always rebuilt.
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# ---------------------------------------------------------------------------
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2006-03-06 06:14:10 +08:00
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PHONY += FORCE
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2005-04-17 06:20:36 +08:00
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FORCE:
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# Read all saved command lines and dependencies for the $(targets) we
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# may be building above, using $(if_changed{,_dep}). As an
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# optimization, we don't need to read them if the target does not
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# exist, we will rebuild anyway in that case.
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kbuild: let fixdep directly write to .*.cmd files
Currently, fixdep writes dependencies to .*.tmp, which is renamed to
.*.cmd after everything succeeds. This is a very safe way to avoid
corrupted .*.cmd files. The if_changed_dep has carried this safety
mechanism since it was added in 2002.
If fixdep fails for some reasons or a user terminates the build while
fixdep is running, the incomplete output from the fixdep could be
troublesome.
This is my insight about some bad scenarios:
[1] If the compiler succeeds to generate *.o file, but fixdep fails
to write necessary dependencies to .*.cmd file, Make will miss
to rebuild the object when headers or CONFIG options are changed.
In this case, fixdep should not generate .*.cmd file at all so
that 'arg-check' will surely trigger the rebuild of the object.
[2] A partially constructed .*.cmd file may not be a syntactically
correct makefile. The next time Make runs, it would include it,
then fail to parse it. Once this happens, 'make clean' is be the
only way to fix it.
In fact, [1] is no longer a problem since commit 9c2af1c7377a ("kbuild:
add .DELETE_ON_ERROR special target"). Make deletes a target file on
any failure in its recipe. Because fixdep is a part of the recipe of
*.o target, if it fails, the *.o is deleted anyway. However, I am a
bit worried about the slight possibility of [2].
So, here is a solution. Let fixdep directly write to a .*.cmd file,
but allow makefiles to include it only when its corresponding target
exists.
This effectively reverts commit 2982c953570b ("kbuild: remove redundant
$(wildcard ...) for cmd_files calculation"), and commit 00d78ab2ba75
("kbuild: remove dead code in cmd_files calculation in top Makefile")
because now we must check the presence of targets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-30 09:05:22 +08:00
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existing-targets := $(wildcard $(sort $(targets)))
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2005-04-17 06:20:36 +08:00
|
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|
|
kbuild: let fixdep directly write to .*.cmd files
Currently, fixdep writes dependencies to .*.tmp, which is renamed to
.*.cmd after everything succeeds. This is a very safe way to avoid
corrupted .*.cmd files. The if_changed_dep has carried this safety
mechanism since it was added in 2002.
If fixdep fails for some reasons or a user terminates the build while
fixdep is running, the incomplete output from the fixdep could be
troublesome.
This is my insight about some bad scenarios:
[1] If the compiler succeeds to generate *.o file, but fixdep fails
to write necessary dependencies to .*.cmd file, Make will miss
to rebuild the object when headers or CONFIG options are changed.
In this case, fixdep should not generate .*.cmd file at all so
that 'arg-check' will surely trigger the rebuild of the object.
[2] A partially constructed .*.cmd file may not be a syntactically
correct makefile. The next time Make runs, it would include it,
then fail to parse it. Once this happens, 'make clean' is be the
only way to fix it.
In fact, [1] is no longer a problem since commit 9c2af1c7377a ("kbuild:
add .DELETE_ON_ERROR special target"). Make deletes a target file on
any failure in its recipe. Because fixdep is a part of the recipe of
*.o target, if it fails, the *.o is deleted anyway. However, I am a
bit worried about the slight possibility of [2].
So, here is a solution. Let fixdep directly write to a .*.cmd file,
but allow makefiles to include it only when its corresponding target
exists.
This effectively reverts commit 2982c953570b ("kbuild: remove redundant
$(wildcard ...) for cmd_files calculation"), and commit 00d78ab2ba75
("kbuild: remove dead code in cmd_files calculation in top Makefile")
because now we must check the presence of targets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-30 09:05:22 +08:00
|
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-include $(foreach f,$(existing-targets),$(dir $(f)).$(notdir $(f)).cmd)
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2006-03-06 06:14:10 +08:00
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2019-07-06 11:07:12 +08:00
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ifdef building_out_of_srctree
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2017-11-13 18:29:37 +08:00
|
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# Create directories for object files if they do not exist
|
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|
|
|
obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
|
kbuild: let fixdep directly write to .*.cmd files
Currently, fixdep writes dependencies to .*.tmp, which is renamed to
.*.cmd after everything succeeds. This is a very safe way to avoid
corrupted .*.cmd files. The if_changed_dep has carried this safety
mechanism since it was added in 2002.
If fixdep fails for some reasons or a user terminates the build while
fixdep is running, the incomplete output from the fixdep could be
troublesome.
This is my insight about some bad scenarios:
[1] If the compiler succeeds to generate *.o file, but fixdep fails
to write necessary dependencies to .*.cmd file, Make will miss
to rebuild the object when headers or CONFIG options are changed.
In this case, fixdep should not generate .*.cmd file at all so
that 'arg-check' will surely trigger the rebuild of the object.
[2] A partially constructed .*.cmd file may not be a syntactically
correct makefile. The next time Make runs, it would include it,
then fail to parse it. Once this happens, 'make clean' is be the
only way to fix it.
In fact, [1] is no longer a problem since commit 9c2af1c7377a ("kbuild:
add .DELETE_ON_ERROR special target"). Make deletes a target file on
any failure in its recipe. Because fixdep is a part of the recipe of
*.o target, if it fails, the *.o is deleted anyway. However, I am a
bit worried about the slight possibility of [2].
So, here is a solution. Let fixdep directly write to a .*.cmd file,
but allow makefiles to include it only when its corresponding target
exists.
This effectively reverts commit 2982c953570b ("kbuild: remove redundant
$(wildcard ...) for cmd_files calculation"), and commit 00d78ab2ba75
("kbuild: remove dead code in cmd_files calculation in top Makefile")
because now we must check the presence of targets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-30 09:05:22 +08:00
|
|
|
# If targets exist, their directories apparently exist. Skip mkdir.
|
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|
|
|
existing-dirs := $(sort $(patsubst %/,%, $(dir $(existing-targets))))
|
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|
obj-dirs := $(strip $(filter-out $(existing-dirs), $(obj-dirs)))
|
2017-11-13 18:29:38 +08:00
|
|
|
ifneq ($(obj-dirs),)
|
2017-11-13 18:29:37 +08:00
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|
$(shell mkdir -p $(obj-dirs))
|
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|
|
endif
|
2017-11-13 18:29:38 +08:00
|
|
|
endif
|
2017-11-13 18:29:37 +08:00
|
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|
2006-03-06 06:14:10 +08:00
|
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|
.PHONY: $(PHONY)
|