OpenCloudOS-Kernel/arch/xtensa/include/asm/core.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2019 Cadence Design Systems Inc. */

#ifndef _ASM_XTENSA_CORE_H
#define _ASM_XTENSA_CORE_H

#include <variant/core.h>

#ifndef XCHAL_HAVE_EXCLUSIVE
#define XCHAL_HAVE_EXCLUSIVE 0
#endif

#ifndef XCHAL_SPANNING_WAY
#define XCHAL_SPANNING_WAY 0
#endif

#endif
xtensa: replace variant/core.h with asm/core.h Introduce the header arch/xtensa/include/asm/core.h that provides definitions for XCHAL macros missing in older xtensa releases. Use this header instead of variant/core.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2019-01-02 11:41:55 +08:00			`/* SPDX-License-Identifier: GPL-2.0 */`
			`/* Copyright (C) 2019 Cadence Design Systems Inc. */`

			`#ifndef _ASM_XTENSA_CORE_H`
			`#define _ASM_XTENSA_CORE_H`

			`#include <variant/core.h>`

xtensa: add exclusive atomics support Implement atomic primitives using exclusive access opcodes available in the recent xtensa cores. Since l32ex/s32ex don't have any memory ordering guarantees don't define __smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2018-12-21 09:18:12 +08:00			`#ifndef XCHAL_HAVE_EXCLUSIVE`
			`#define XCHAL_HAVE_EXCLUSIVE 0`
			`#endif`

xtensa: replace variant/core.h with asm/core.h Introduce the header arch/xtensa/include/asm/core.h that provides definitions for XCHAL macros missing in older xtensa releases. Use this header instead of variant/core.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 2019-01-02 11:41:55 +08:00			`#ifndef XCHAL_SPANNING_WAY`
			`#define XCHAL_SPANNING_WAY 0`
			`#endif`

			`#endif`