2015-01-30 18:04:00 +08:00
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Qualcomm MSM8916 TLMM block
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This binding describes the Top Level Mode Multiplexer block found in the
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MSM8916 platform.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,msm8916-pinctrl"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the TLMM register space.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the TLMM summary IRQ.
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- interrupt-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as an interrupt controller
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- #interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/interrupt-controller/irq.h>
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- gpio-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as a gpio controller
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- #gpio-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/gpio/gpio.h>
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2018-05-28 19:06:01 +08:00
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- gpio-ranges:
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Usage: required
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Definition: see ../gpio/gpio.txt
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- gpio-reserved-ranges:
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Usage: optional
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Definition: see ../gpio/gpio.txt
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2015-01-30 18:04:00 +08:00
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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PIN CONFIGURATION NODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode. Valid pins are:
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gpio0-gpio121,
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sdc1_clk,
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sdc1_cmd,
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sdc1_data
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sdc2_clk,
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sdc2_cmd,
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sdc2_data,
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qdsd_cmd,
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qdsd_data0,
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qdsd_data1,
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qdsd_data2,
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qdsd_data3
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Functions are only valid for gpio pins.
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Valid values are:
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adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,
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atest_char1, atest_char2, atest_char3, atest_combodac, atest_gpsadc0,
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atest_gpsadc1, atest_tsens, atest_wlan0, atest_wlan1, backlight_en,
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bimc_dte0,bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,
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blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2,
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blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3,
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blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4,
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blsp_spi5, blsp_spi6, blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2,
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cam1_rst, cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c,
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cci_timer0, cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out,
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display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us,
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ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
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gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, gsm0_tx1,
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gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, ldo_en,
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ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, nav_pps, nav_tsync,
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pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc,
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pwr_crypto_enabled_a, pwr_crypto_enabled_b, pwr_modem_enabled_a,
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pwr_modem_enabled_b, pwr_nav_enabled_a, pwr_nav_enabled_b,
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qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, qdss_ctitrig_in_b0,
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qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, qdss_ctitrig_out_a1,
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qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, qdss_traceclk_a,
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qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,
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qdss_tracedata_b, reset_n, sd_card, sd_write, sec_mi2s, smb_int,
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ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm,
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wcss_wlan, webcam1_rst
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- bias-disable:
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Usage: optional
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Value type: <none>
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2019-05-26 04:42:28 +08:00
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Definition: The specified pins should be configured as no pull.
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2015-01-30 18:04:00 +08:00
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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2019-05-26 04:42:28 +08:00
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Definition: The specified pins should be configured as pull down.
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2015-01-30 18:04:00 +08:00
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- bias-pull-up:
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Usage: optional
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Value type: <none>
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2019-05-26 04:42:28 +08:00
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Definition: The specified pins should be configured as pull up.
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2015-01-30 18:04:00 +08:00
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- output-high:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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high.
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Not valid for sdc pins.
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- output-low:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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low.
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Not valid for sdc pins.
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- drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins, in mA.
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Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
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Example:
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tlmm: pinctrl@1000000 {
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compatible = "qcom,msm8916-pinctrl";
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reg = <0x1000000 0x300000>;
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interrupts = <0 208 0>;
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gpio-controller;
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#gpio-cells = <2>;
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2018-05-28 19:06:01 +08:00
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gpio-ranges = <&tlmm 0 0 122>;
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2015-01-30 18:04:00 +08:00
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interrupt-controller;
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#interrupt-cells = <2>;
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uart2: uart2-default {
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mux {
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pins = "gpio4", "gpio5";
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function = "blsp_uart2";
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};
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tx {
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pins = "gpio4";
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drive-strength = <4>;
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bias-disable;
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};
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rx {
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pins = "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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