44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
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Microsemi Ocelot SerDes muxing driver
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-------------------------------------
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On Microsemi Ocelot, there is a handful of registers in HSIO address
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space for setting up the SerDes to switch port muxing.
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A SerDes X can be "muxed" to work with switch port Y or Z for example.
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One specific SerDes can also be used as a PCIe interface.
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Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
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There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
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half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
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10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
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Also, SERDES6G number (aka "macro") 0 is the only interface supporting
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QSGMII.
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This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
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Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
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Required properties:
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- compatible: should be "mscc,vsc7514-serdes"
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- #phy-cells : from the generic phy bindings, must be 2.
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The first number defines the input port to use for a given
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SerDes macro. The second defines the macro to use. They are
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defined in dt-bindings/phy/phy-ocelot-serdes.h
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Example:
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serdes: serdes {
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compatible = "mscc,vsc7514-serdes";
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#phy-cells = <2>;
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};
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ethernet {
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port1 {
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phy-handle = <&phy_foo>;
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/* Link SERDES1G_5 to port1 */
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phys = <&serdes 1 SERDES1G_5>;
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};
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};
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