2019-06-04 16:11:33 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2009-07-02 01:28:54 +08:00
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/*
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* wm8523.c -- WM8523 ALSA SoC Audio driver
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*
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* Copyright 2009 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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2012-09-10 16:27:45 +08:00
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#include <linux/regmap.h>
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2009-07-02 01:28:54 +08:00
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#include <linux/regulator/consumer.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2011-08-02 12:08:13 +08:00
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#include <linux/of_device.h>
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2009-07-02 01:28:54 +08:00
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8523.h"
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#define WM8523_NUM_SUPPLIES 2
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static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
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"AVDD",
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"LINEVDD",
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};
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#define WM8523_NUM_RATES 7
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/* codec private data */
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struct wm8523_priv {
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2012-09-10 16:27:45 +08:00
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struct regmap *regmap;
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2009-07-02 01:28:54 +08:00
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struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
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unsigned int sysclk;
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unsigned int rate_constraint_list[WM8523_NUM_RATES];
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struct snd_pcm_hw_constraint_list rate_constraint;
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};
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2012-09-10 16:27:45 +08:00
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static const struct reg_default wm8523_reg_defaults[] = {
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{ 2, 0x0000 }, /* R2 - PSCTRL1 */
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{ 3, 0x1812 }, /* R3 - AIF_CTRL1 */
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{ 4, 0x0000 }, /* R4 - AIF_CTRL2 */
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{ 5, 0x0001 }, /* R5 - DAC_CTRL3 */
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{ 6, 0x0190 }, /* R6 - DAC_GAINL */
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{ 7, 0x0190 }, /* R7 - DAC_GAINR */
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{ 8, 0x0000 }, /* R8 - ZERO_DETECT */
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2009-07-02 01:28:54 +08:00
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};
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2012-09-10 16:27:45 +08:00
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static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
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2009-07-02 01:28:54 +08:00
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{
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switch (reg) {
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case WM8523_DEVICE_ID:
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case WM8523_REVISION:
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2012-09-10 16:27:45 +08:00
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return true;
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2009-07-02 01:28:54 +08:00
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default:
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2012-09-10 16:27:45 +08:00
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return false;
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2009-07-02 01:28:54 +08:00
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}
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}
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static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
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static const char *wm8523_zd_count_text[] = {
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"1024",
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"2048",
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};
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2014-02-18 17:35:49 +08:00
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static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0,
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wm8523_zd_count_text);
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2009-07-02 01:28:54 +08:00
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2011-08-22 23:02:43 +08:00
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static const struct snd_kcontrol_new wm8523_controls[] = {
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2009-07-02 01:28:54 +08:00
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SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
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0, 448, 0, dac_tlv),
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SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
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SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
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SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
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SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
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SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
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SOC_ENUM("Zero Detect Count", wm8523_zc_count),
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};
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static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
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SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
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SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
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};
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2011-08-22 23:02:43 +08:00
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static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
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2009-07-02 01:28:54 +08:00
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{ "LINEVOUTL", NULL, "DAC" },
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{ "LINEVOUTR", NULL, "DAC" },
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};
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2017-08-02 17:55:14 +08:00
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static const struct {
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2009-07-02 01:28:54 +08:00
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int value;
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int ratio;
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} lrclk_ratios[WM8523_NUM_RATES] = {
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{ 1, 128 },
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{ 2, 192 },
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{ 3, 256 },
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{ 4, 384 },
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{ 5, 512 },
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{ 6, 768 },
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{ 7, 1152 },
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};
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2017-08-02 17:55:14 +08:00
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static const struct {
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2015-06-12 21:57:32 +08:00
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int value;
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int ratio;
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2017-08-02 17:55:13 +08:00
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} bclk_ratios[] = {
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2015-06-12 21:57:32 +08:00
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{ 2, 32 },
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{ 3, 64 },
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{ 4, 128 },
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};
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2009-07-02 01:28:54 +08:00
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static int wm8523_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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2018-01-29 11:01:09 +08:00
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struct snd_soc_component *component = dai->component;
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struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
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2009-07-02 01:28:54 +08:00
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/* The set of sample rates that can be supported depends on the
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* MCLK supplied to the CODEC - enforce this.
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*/
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if (!wm8523->sysclk) {
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2018-01-29 11:01:09 +08:00
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dev_err(component->dev,
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2009-07-02 01:28:54 +08:00
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"No MCLK configured, call set_sysclk() on init\n");
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return -EINVAL;
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}
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snd_pcm_hw_constraint_list(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_RATE,
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&wm8523->rate_constraint);
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return 0;
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}
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static int wm8523_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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2018-01-29 11:01:09 +08:00
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struct snd_soc_component *component = dai->component;
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struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
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2009-07-02 01:28:54 +08:00
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int i;
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2020-06-16 13:21:29 +08:00
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u16 aifctrl1 = snd_soc_component_read(component, WM8523_AIF_CTRL1);
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u16 aifctrl2 = snd_soc_component_read(component, WM8523_AIF_CTRL2);
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2009-07-02 01:28:54 +08:00
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/* Find a supported LRCLK ratio */
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for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
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if (wm8523->sysclk / params_rate(params) ==
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lrclk_ratios[i].ratio)
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break;
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}
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/* Should never happen, should be handled by constraints */
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if (i == ARRAY_SIZE(lrclk_ratios)) {
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2018-01-29 11:01:09 +08:00
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dev_err(component->dev, "MCLK/fs ratio %d unsupported\n",
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2009-07-02 01:28:54 +08:00
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wm8523->sysclk / params_rate(params));
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return -EINVAL;
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}
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aifctrl2 &= ~WM8523_SR_MASK;
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aifctrl2 |= lrclk_ratios[i].value;
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2015-06-12 21:57:32 +08:00
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if (aifctrl1 & WM8523_AIF_MSTR) {
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/* Find a fs->bclk ratio */
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for (i = 0; i < ARRAY_SIZE(bclk_ratios); i++)
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if (params_width(params) * 2 <= bclk_ratios[i].ratio)
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break;
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if (i == ARRAY_SIZE(bclk_ratios)) {
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2018-01-29 11:01:09 +08:00
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dev_err(component->dev,
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2015-06-12 21:57:32 +08:00
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"No matching BCLK/fs ratio for word length %d\n",
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params_width(params));
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return -EINVAL;
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}
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aifctrl2 &= ~WM8523_BCLKDIV_MASK;
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aifctrl2 |= bclk_ratios[i].value << WM8523_BCLKDIV_SHIFT;
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}
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2009-07-02 01:28:54 +08:00
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aifctrl1 &= ~WM8523_WL_MASK;
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2014-07-31 19:51:02 +08:00
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switch (params_width(params)) {
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case 16:
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2009-07-02 01:28:54 +08:00
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break;
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2014-07-31 19:51:02 +08:00
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case 20:
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2009-07-02 01:28:54 +08:00
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aifctrl1 |= 0x8;
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break;
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2014-07-31 19:51:02 +08:00
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case 24:
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2009-07-02 01:28:54 +08:00
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aifctrl1 |= 0x10;
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break;
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2014-07-31 19:51:02 +08:00
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case 32:
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2009-07-02 01:28:54 +08:00
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aifctrl1 |= 0x18;
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break;
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}
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2018-01-29 11:01:09 +08:00
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snd_soc_component_write(component, WM8523_AIF_CTRL1, aifctrl1);
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snd_soc_component_write(component, WM8523_AIF_CTRL2, aifctrl2);
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2009-07-02 01:28:54 +08:00
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return 0;
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}
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static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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2018-01-29 11:01:09 +08:00
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struct snd_soc_component *component = codec_dai->component;
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struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
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2009-07-02 01:28:54 +08:00
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unsigned int val;
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int i;
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wm8523->sysclk = freq;
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wm8523->rate_constraint.count = 0;
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for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
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val = freq / lrclk_ratios[i].ratio;
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/* Check that it's a standard rate since core can't
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* cope with others and having the odd rates confuses
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* constraint matching.
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*/
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switch (val) {
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case 8000:
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case 11025:
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case 16000:
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case 22050:
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case 32000:
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case 44100:
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case 48000:
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case 64000:
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case 88200:
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case 96000:
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case 176400:
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case 192000:
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2018-01-29 11:01:09 +08:00
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dev_dbg(component->dev, "Supported sample rate: %dHz\n",
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2009-07-02 01:28:54 +08:00
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val);
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wm8523->rate_constraint_list[i] = val;
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wm8523->rate_constraint.count++;
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break;
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default:
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2018-01-29 11:01:09 +08:00
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dev_dbg(component->dev, "Skipping sample rate: %dHz\n",
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2009-07-02 01:28:54 +08:00
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val);
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}
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}
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/* Need at least one supported rate... */
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if (wm8523->rate_constraint.count == 0)
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return -EINVAL;
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return 0;
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}
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static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int fmt)
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{
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2018-01-29 11:01:09 +08:00
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struct snd_soc_component *component = codec_dai->component;
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2020-06-16 13:21:29 +08:00
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u16 aifctrl1 = snd_soc_component_read(component, WM8523_AIF_CTRL1);
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2009-07-02 01:28:54 +08:00
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aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
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WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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aifctrl1 |= WM8523_AIF_MSTR;
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break;
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|
|
case SND_SOC_DAIFMT_CBS_CFS:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
|
|
case SND_SOC_DAIFMT_I2S:
|
|
|
|
aifctrl1 |= 0x0002;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_RIGHT_J:
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
|
|
aifctrl1 |= 0x0001;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_DSP_A:
|
|
|
|
aifctrl1 |= 0x0003;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_DSP_B:
|
|
|
|
aifctrl1 |= 0x0023;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_IB_IF:
|
|
|
|
aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
|
|
aifctrl1 |= WM8523_BCLK_INV;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_NB_IF:
|
|
|
|
aifctrl1 |= WM8523_LRCLK_INV;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_write(component, WM8523_AIF_CTRL1, aifctrl1);
|
2009-07-02 01:28:54 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-29 11:01:09 +08:00
|
|
|
static int wm8523_set_bias_level(struct snd_soc_component *component,
|
2009-07-02 01:28:54 +08:00
|
|
|
enum snd_soc_bias_level level)
|
|
|
|
{
|
2018-01-29 11:01:09 +08:00
|
|
|
struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
|
2012-09-10 16:27:45 +08:00
|
|
|
int ret;
|
2009-07-02 01:28:54 +08:00
|
|
|
|
|
|
|
switch (level) {
|
|
|
|
case SND_SOC_BIAS_ON:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_BIAS_PREPARE:
|
|
|
|
/* Full power on */
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_PSCTRL1,
|
2009-07-02 01:28:54 +08:00
|
|
|
WM8523_SYS_ENA_MASK, 3);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_BIAS_STANDBY:
|
2018-01-29 11:01:09 +08:00
|
|
|
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
2009-07-02 01:28:54 +08:00
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
|
|
|
|
wm8523->supplies);
|
|
|
|
if (ret != 0) {
|
2018-01-29 11:01:09 +08:00
|
|
|
dev_err(component->dev,
|
2009-07-02 01:28:54 +08:00
|
|
|
"Failed to enable supplies: %d\n",
|
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-09-10 16:27:45 +08:00
|
|
|
/* Sync back default/cached values */
|
|
|
|
regcache_sync(wm8523->regmap);
|
|
|
|
|
2009-07-02 01:28:54 +08:00
|
|
|
/* Initial power up */
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_PSCTRL1,
|
2009-07-02 01:28:54 +08:00
|
|
|
WM8523_SYS_ENA_MASK, 1);
|
|
|
|
|
|
|
|
msleep(100);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Power up to mute */
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_PSCTRL1,
|
2009-07-02 01:28:54 +08:00
|
|
|
WM8523_SYS_ENA_MASK, 2);
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SND_SOC_BIAS_OFF:
|
|
|
|
/* The chip runs through the power down sequence for us. */
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_PSCTRL1,
|
2009-07-02 01:28:54 +08:00
|
|
|
WM8523_SYS_ENA_MASK, 0);
|
|
|
|
msleep(100);
|
|
|
|
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
|
|
|
|
wm8523->supplies);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
|
|
|
|
|
|
|
|
#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
|
|
|
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
|
2011-11-23 18:40:40 +08:00
|
|
|
static const struct snd_soc_dai_ops wm8523_dai_ops = {
|
2009-07-02 01:28:54 +08:00
|
|
|
.startup = wm8523_startup,
|
|
|
|
.hw_params = wm8523_hw_params,
|
|
|
|
.set_sysclk = wm8523_set_dai_sysclk,
|
|
|
|
.set_fmt = wm8523_set_dai_fmt,
|
|
|
|
};
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
static struct snd_soc_dai_driver wm8523_dai = {
|
|
|
|
.name = "wm8523-hifi",
|
2009-07-02 01:28:54 +08:00
|
|
|
.playback = {
|
|
|
|
.stream_name = "Playback",
|
|
|
|
.channels_min = 2, /* Mono modes not yet supported */
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = WM8523_RATES,
|
|
|
|
.formats = WM8523_FORMATS,
|
|
|
|
},
|
|
|
|
.ops = &wm8523_dai_ops,
|
|
|
|
};
|
|
|
|
|
2018-01-29 11:01:09 +08:00
|
|
|
static int wm8523_probe(struct snd_soc_component *component)
|
2009-07-02 01:28:54 +08:00
|
|
|
{
|
2018-01-29 11:01:09 +08:00
|
|
|
struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
|
2009-07-02 01:28:54 +08:00
|
|
|
|
|
|
|
wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
|
|
|
|
wm8523->rate_constraint.count =
|
|
|
|
ARRAY_SIZE(wm8523->rate_constraint_list);
|
|
|
|
|
|
|
|
/* Change some default settings - latch VU and enable ZC */
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_DAC_GAINR,
|
2010-12-25 00:59:30 +08:00
|
|
|
WM8523_DACR_VU, WM8523_DACR_VU);
|
2018-01-29 11:01:09 +08:00
|
|
|
snd_soc_component_update_bits(component, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
|
2009-07-02 01:28:54 +08:00
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
return 0;
|
2009-07-02 01:28:54 +08:00
|
|
|
}
|
|
|
|
|
2018-01-29 11:01:09 +08:00
|
|
|
static const struct snd_soc_component_driver soc_component_dev_wm8523 = {
|
|
|
|
.probe = wm8523_probe,
|
|
|
|
.set_bias_level = wm8523_set_bias_level,
|
|
|
|
.controls = wm8523_controls,
|
|
|
|
.num_controls = ARRAY_SIZE(wm8523_controls),
|
|
|
|
.dapm_widgets = wm8523_dapm_widgets,
|
|
|
|
.num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
|
|
|
|
.dapm_routes = wm8523_dapm_routes,
|
|
|
|
.num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
|
|
|
|
.suspend_bias_off = 1,
|
|
|
|
.idle_bias_on = 1,
|
|
|
|
.use_pmdown_time = 1,
|
|
|
|
.endianness = 1,
|
|
|
|
.non_legacy_dai_naming = 1,
|
2010-03-18 04:15:21 +08:00
|
|
|
};
|
|
|
|
|
2011-08-02 12:08:13 +08:00
|
|
|
static const struct of_device_id wm8523_of_match[] = {
|
|
|
|
{ .compatible = "wlf,wm8523" },
|
|
|
|
{ },
|
|
|
|
};
|
2015-07-31 00:18:45 +08:00
|
|
|
MODULE_DEVICE_TABLE(of, wm8523_of_match);
|
2011-08-02 12:08:13 +08:00
|
|
|
|
2012-09-10 16:27:45 +08:00
|
|
|
static const struct regmap_config wm8523_regmap = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 16,
|
|
|
|
.max_register = WM8523_ZERO_DETECT,
|
|
|
|
|
|
|
|
.reg_defaults = wm8523_reg_defaults,
|
|
|
|
.num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
|
|
|
|
.volatile_reg = wm8523_volatile_register,
|
|
|
|
};
|
|
|
|
|
2012-12-07 22:26:37 +08:00
|
|
|
static int wm8523_i2c_probe(struct i2c_client *i2c,
|
|
|
|
const struct i2c_device_id *id)
|
2009-07-02 01:28:54 +08:00
|
|
|
{
|
|
|
|
struct wm8523_priv *wm8523;
|
2012-09-10 17:07:24 +08:00
|
|
|
unsigned int val;
|
2012-09-10 16:23:34 +08:00
|
|
|
int ret, i;
|
2009-07-02 01:28:54 +08:00
|
|
|
|
2012-09-10 16:18:56 +08:00
|
|
|
wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
|
|
|
|
GFP_KERNEL);
|
2009-07-02 01:28:54 +08:00
|
|
|
if (wm8523 == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2012-09-10 16:27:45 +08:00
|
|
|
wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
|
|
|
|
if (IS_ERR(wm8523->regmap)) {
|
|
|
|
ret = PTR_ERR(wm8523->regmap);
|
|
|
|
dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-09-10 16:23:34 +08:00
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
|
|
|
|
wm8523->supplies[i].supply = wm8523_supply_names[i];
|
|
|
|
|
|
|
|
ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
|
|
|
|
wm8523->supplies);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-09-10 17:07:24 +08:00
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
|
|
|
|
wm8523->supplies);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(&i2c->dev, "Failed to read ID register\n");
|
|
|
|
goto err_enable;
|
|
|
|
}
|
|
|
|
if (val != 0x8523) {
|
|
|
|
dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err_enable;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(&i2c->dev, "Failed to read revision register\n");
|
|
|
|
goto err_enable;
|
|
|
|
}
|
|
|
|
dev_info(&i2c->dev, "revision %c\n",
|
|
|
|
(val & WM8523_CHIP_REV_MASK) + 'A');
|
|
|
|
|
|
|
|
ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
|
|
|
|
goto err_enable;
|
|
|
|
}
|
|
|
|
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
|
|
|
|
|
2009-07-02 01:28:54 +08:00
|
|
|
i2c_set_clientdata(i2c, wm8523);
|
|
|
|
|
2018-01-29 11:01:09 +08:00
|
|
|
ret = devm_snd_soc_register_component(&i2c->dev,
|
|
|
|
&soc_component_dev_wm8523, &wm8523_dai, 1);
|
2012-09-10 16:18:56 +08:00
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
return ret;
|
2009-07-02 01:28:54 +08:00
|
|
|
|
2012-09-10 17:07:24 +08:00
|
|
|
err_enable:
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
|
|
|
|
return ret;
|
2009-07-02 01:28:54 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct i2c_device_id wm8523_i2c_id[] = {
|
|
|
|
{ "wm8523", 0 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
|
|
|
|
|
|
|
|
static struct i2c_driver wm8523_i2c_driver = {
|
|
|
|
.driver = {
|
2011-08-02 12:04:14 +08:00
|
|
|
.name = "wm8523",
|
2011-08-02 12:08:13 +08:00
|
|
|
.of_match_table = wm8523_of_match,
|
2009-07-02 01:28:54 +08:00
|
|
|
},
|
|
|
|
.probe = wm8523_i2c_probe,
|
|
|
|
.id_table = wm8523_i2c_id,
|
|
|
|
};
|
|
|
|
|
2016-11-17 09:13:35 +08:00
|
|
|
module_i2c_driver(wm8523_i2c_driver);
|
2009-07-02 01:28:54 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("ASoC WM8523 driver");
|
|
|
|
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|