2018-09-12 17:52:47 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2016-05-05 16:51:39 +08:00
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/of_address.h>
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2018-07-18 14:43:09 +08:00
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#include <linux/of_platform.h>
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2016-05-05 16:51:39 +08:00
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "tsens.h"
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char *qfprom_read(struct device *dev, const char *cname)
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{
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struct nvmem_cell *cell;
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ssize_t data;
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char *ret;
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cell = nvmem_cell_get(dev, cname);
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if (IS_ERR(cell))
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return ERR_CAST(cell);
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ret = nvmem_cell_read(cell, &data);
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nvmem_cell_put(cell);
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return ret;
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}
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/*
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* Use this function on devices where slope and offset calculations
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* depend on calibration data read from qfprom. On others the slope
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* and offset values are derived from tz->tzp->slope and tz->tzp->offset
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* resp.
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*/
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2019-03-20 21:17:44 +08:00
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void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
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2016-05-05 16:51:39 +08:00
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u32 *p2, u32 mode)
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{
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int i;
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int num, den;
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2019-03-20 21:17:44 +08:00
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for (i = 0; i < priv->num_sensors; i++) {
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dev_dbg(priv->dev,
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2016-05-05 16:51:39 +08:00
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"sensor%d - data_point1:%#x data_point2:%#x\n",
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i, p1[i], p2[i]);
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2019-03-20 21:17:44 +08:00
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priv->sensor[i].slope = SLOPE_DEFAULT;
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2016-05-05 16:51:39 +08:00
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if (mode == TWO_PT_CALIB) {
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/*
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* slope (m) = adc_code2 - adc_code1 (y2 - y1)/
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* temp_120_degc - temp_30_degc (x2 - x1)
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*/
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num = p2[i] - p1[i];
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num *= SLOPE_FACTOR;
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den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
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2019-03-20 21:17:44 +08:00
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priv->sensor[i].slope = num / den;
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2016-05-05 16:51:39 +08:00
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}
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2019-03-20 21:17:44 +08:00
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priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
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2016-05-05 16:51:39 +08:00
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(CAL_DEGC_PT1 *
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2019-03-20 21:17:44 +08:00
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priv->sensor[i].slope);
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dev_dbg(priv->dev, "offset:%d\n", priv->sensor[i].offset);
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2016-05-05 16:51:39 +08:00
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}
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}
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static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
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{
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int degc, num, den;
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num = (adc_code * SLOPE_FACTOR) - s->offset;
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den = s->slope;
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if (num > 0)
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degc = num + (den / 2);
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else if (num < 0)
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degc = num - (den / 2);
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else
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degc = num;
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degc /= den;
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return degc;
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}
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2019-03-20 21:17:57 +08:00
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int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp)
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{
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struct tsens_sensor *s = &priv->sensor[i];
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u32 temp_idx = LAST_TEMP_0 + s->hw_id;
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u32 valid_idx = VALID_0 + s->hw_id;
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u32 last_temp = 0, valid, mask;
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int ret;
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ret = regmap_field_read(priv->rf[valid_idx], &valid);
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if (ret)
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return ret;
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while (!valid) {
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/* Valid bit is 0 for 6 AHB clock cycles.
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* At 19.2MHz, 1 AHB clock is ~60ns.
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* We should enter this loop very, very rarely.
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*/
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ndelay(400);
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ret = regmap_field_read(priv->rf[valid_idx], &valid);
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if (ret)
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return ret;
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}
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/* Valid bit is set, OK to read the temperature */
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ret = regmap_field_read(priv->rf[temp_idx], &last_temp);
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if (ret)
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return ret;
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2019-03-20 21:17:58 +08:00
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if (priv->feat->adc) {
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/* Convert temperature from ADC code to milliCelsius */
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*temp = code_to_degc(last_temp, s) * 1000;
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} else {
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mask = GENMASK(priv->fields[LAST_TEMP_0].msb,
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priv->fields[LAST_TEMP_0].lsb);
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/* Convert temperature from deciCelsius to milliCelsius */
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*temp = sign_extend32(last_temp, fls(mask) - 1) * 100;
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}
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2019-03-20 21:17:57 +08:00
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return 0;
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}
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2019-03-20 21:17:50 +08:00
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int get_temp_common(struct tsens_priv *priv, int i, int *temp)
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2016-05-05 16:51:39 +08:00
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{
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2019-03-20 21:17:50 +08:00
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struct tsens_sensor *s = &priv->sensor[i];
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2016-05-05 16:51:39 +08:00
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int last_temp = 0, ret;
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2019-03-20 21:17:50 +08:00
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ret = regmap_field_read(priv->rf[LAST_TEMP_0 + s->hw_id], &last_temp);
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2016-05-05 16:51:39 +08:00
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if (ret)
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return ret;
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*temp = code_to_degc(last_temp, s) * 1000;
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return 0;
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}
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static const struct regmap_config tsens_config = {
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2018-11-16 01:43:30 +08:00
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.name = "tm",
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static const struct regmap_config tsens_srot_config = {
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.name = "srot",
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2016-05-05 16:51:39 +08:00
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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2019-03-20 21:17:44 +08:00
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int __init init_common(struct tsens_priv *priv)
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2016-05-05 16:51:39 +08:00
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{
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2018-09-12 17:52:50 +08:00
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void __iomem *tm_base, *srot_base;
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2019-03-20 21:17:51 +08:00
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struct device *dev = priv->dev;
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2018-07-26 18:33:09 +08:00
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struct resource *res;
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2019-03-20 21:17:50 +08:00
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u32 enabled;
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int ret, i, j;
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2019-03-20 21:17:44 +08:00
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struct platform_device *op = of_find_device_by_node(priv->dev->of_node);
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2016-05-05 16:51:39 +08:00
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2018-07-18 14:43:09 +08:00
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if (!op)
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return -EINVAL;
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2016-05-05 16:51:39 +08:00
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2018-07-18 14:43:09 +08:00
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if (op->num_resources > 1) {
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2018-09-12 17:52:50 +08:00
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/* DT with separate SROT and TM address space */
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2019-03-20 21:17:44 +08:00
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priv->tm_offset = 0;
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2018-09-12 17:52:50 +08:00
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res = platform_get_resource(op, IORESOURCE_MEM, 1);
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srot_base = devm_ioremap_resource(&op->dev, res);
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2019-02-13 22:53:29 +08:00
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if (IS_ERR(srot_base)) {
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ret = PTR_ERR(srot_base);
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goto err_put_device;
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}
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2018-09-12 17:52:50 +08:00
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2019-03-20 21:17:51 +08:00
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priv->srot_map = devm_regmap_init_mmio(dev, srot_base,
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2018-11-16 01:43:30 +08:00
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&tsens_srot_config);
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2019-03-20 21:17:44 +08:00
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if (IS_ERR(priv->srot_map)) {
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ret = PTR_ERR(priv->srot_map);
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2019-02-13 22:53:29 +08:00
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goto err_put_device;
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}
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2018-07-18 14:43:09 +08:00
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} else {
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/* old DTs where SROT and TM were in a contiguous 2K block */
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2019-03-20 21:17:44 +08:00
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priv->tm_offset = 0x1000;
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2018-07-18 14:43:09 +08:00
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}
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2018-07-26 18:33:09 +08:00
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res = platform_get_resource(op, IORESOURCE_MEM, 0);
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2018-09-12 17:52:49 +08:00
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tm_base = devm_ioremap_resource(&op->dev, res);
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2019-02-13 22:53:29 +08:00
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if (IS_ERR(tm_base)) {
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ret = PTR_ERR(tm_base);
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goto err_put_device;
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}
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2018-07-26 18:33:09 +08:00
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2019-03-20 21:17:51 +08:00
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priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
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2019-03-20 21:17:44 +08:00
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if (IS_ERR(priv->tm_map)) {
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ret = PTR_ERR(priv->tm_map);
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2019-02-13 22:53:29 +08:00
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goto err_put_device;
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}
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2016-05-05 16:51:39 +08:00
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2019-03-20 21:17:51 +08:00
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priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
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2019-03-20 21:17:50 +08:00
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priv->fields[TSENS_EN]);
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if (IS_ERR(priv->rf[TSENS_EN])) {
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ret = PTR_ERR(priv->rf[TSENS_EN]);
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goto err_put_device;
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}
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ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
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if (ret)
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goto err_put_device;
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if (!enabled) {
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2019-03-20 21:17:51 +08:00
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dev_err(dev, "tsens device is not enabled\n");
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2019-03-20 21:17:50 +08:00
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ret = -ENODEV;
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goto err_put_device;
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}
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2019-03-20 21:17:51 +08:00
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priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
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2019-03-20 21:17:50 +08:00
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priv->fields[SENSOR_EN]);
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if (IS_ERR(priv->rf[SENSOR_EN])) {
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ret = PTR_ERR(priv->rf[SENSOR_EN]);
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goto err_put_device;
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}
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/* now alloc regmap_fields in tm_map */
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2019-03-20 21:17:55 +08:00
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for (i = 0, j = LAST_TEMP_0; i < priv->feat->max_sensors; i++, j++) {
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2019-03-20 21:17:51 +08:00
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priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map,
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2019-03-20 21:17:50 +08:00
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priv->fields[j]);
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if (IS_ERR(priv->rf[j])) {
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ret = PTR_ERR(priv->rf[j]);
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2019-02-13 22:53:29 +08:00
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goto err_put_device;
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2019-03-20 21:17:50 +08:00
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}
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}
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2019-03-20 21:17:55 +08:00
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for (i = 0, j = VALID_0; i < priv->feat->max_sensors; i++, j++) {
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2019-03-20 21:17:51 +08:00
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priv->rf[j] = devm_regmap_field_alloc(dev, priv->tm_map,
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2019-03-20 21:17:50 +08:00
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priv->fields[j]);
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if (IS_ERR(priv->rf[j])) {
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ret = PTR_ERR(priv->rf[j]);
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2019-02-13 22:53:29 +08:00
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goto err_put_device;
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2018-09-12 17:52:53 +08:00
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}
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}
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2016-05-05 16:51:39 +08:00
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return 0;
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2019-02-13 22:53:29 +08:00
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err_put_device:
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put_device(&op->dev);
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return ret;
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2016-05-05 16:51:39 +08:00
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}
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