2019-05-27 14:55:01 +08:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2006-10-04 05:01:26 +08:00
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/* include/asm-generic/tlb.h
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2005-04-17 06:20:36 +08:00
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*
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* Generic TLB shootdown code
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*
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* Copyright 2001 Red Hat, Inc.
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* Based on code from mm/memory.c Copyright Linus Torvalds and others.
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*
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2015-11-16 18:08:45 +08:00
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* Copyright 2011 Red Hat, Inc., Peter Zijlstra
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2005-04-17 06:20:36 +08:00
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*/
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#ifndef _ASM_GENERIC__TLB_H
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#define _ASM_GENERIC__TLB_H
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2018-08-23 16:47:09 +08:00
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#include <linux/mmu_notifier.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/swap.h>
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2020-04-07 11:03:51 +08:00
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#include <linux/hugetlb_inline.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/tlbflush.h>
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2018-08-27 19:00:17 +08:00
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#include <asm/cacheflush.h>
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2005-04-17 06:20:36 +08:00
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2019-04-26 08:11:42 +08:00
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/*
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* Blindly accessing user memory from NMI context can be dangerous
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* if we're in the middle of switching the current user task or switching
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* the loaded mm.
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*/
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#ifndef nmi_uaccess_okay
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# define nmi_uaccess_okay() true
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#endif
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2018-08-24 20:28:28 +08:00
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#ifdef CONFIG_MMU
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2018-09-04 16:43:14 +08:00
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/*
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* Generic MMU-gather implementation.
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*
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* The mmu_gather data structure is used by the mm code to implement the
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* correct and efficient ordering of freeing pages and TLB invalidations.
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*
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* This correct ordering is:
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*
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* 1) unhook page
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* 2) TLB invalidate page
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* 3) free page
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*
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* That is, we must never free a page before we have ensured there are no live
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* translations left to it. Otherwise it might be possible to observe (or
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* worse, change) the page content after it has been reused.
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*
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* The mmu_gather API consists of:
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*
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2021-01-28 07:53:44 +08:00
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* - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu()
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*
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* start and finish a mmu_gather
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2018-09-04 16:43:14 +08:00
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*
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* Finish in particular will issue a (final) TLB invalidate and free
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* all (remaining) queued pages.
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*
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* - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
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*
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* Defaults to flushing at tlb_end_vma() to reset the range; helps when
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* there's large holes between the VMAs.
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*
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2020-02-04 09:37:11 +08:00
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* - tlb_remove_table()
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*
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* tlb_remove_table() is the basic primitive to free page-table directories
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* (__p*_free_tlb()). In it's most primitive form it is an alias for
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* tlb_remove_page() below, for when page directories are pages and have no
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* additional constraints.
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*
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* See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE.
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*
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2018-09-04 16:43:14 +08:00
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* - tlb_remove_page() / __tlb_remove_page()
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* - tlb_remove_page_size() / __tlb_remove_page_size()
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*
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* __tlb_remove_page_size() is the basic primitive that queues a page for
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* freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a
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* boolean indicating if the queue is (now) full and a call to
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* tlb_flush_mmu() is required.
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*
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* tlb_remove_page() and tlb_remove_page_size() imply the call to
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* tlb_flush_mmu() when required and has no return value.
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*
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2018-08-31 20:46:08 +08:00
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* - tlb_change_page_size()
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2018-09-04 16:43:14 +08:00
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*
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* call before __tlb_remove_page*() to set the current page-size; implies a
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* possible tlb_flush_mmu() call.
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*
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2018-09-20 16:54:04 +08:00
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* - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
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2018-09-04 16:43:14 +08:00
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*
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* tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
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* related state, like the range)
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*
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2018-09-20 16:54:04 +08:00
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* tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
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* whatever pages are still batched.
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2018-09-04 16:43:14 +08:00
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*
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* - mmu_gather::fullmm
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*
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2021-01-28 07:53:44 +08:00
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* A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free
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2018-09-04 16:43:14 +08:00
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* the entire mm; this allows a number of optimizations.
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*
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* - We can ignore tlb_{start,end}_vma(); because we don't
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* care about ranges. Everything will be shot down.
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*
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* - (RISC) architectures that use ASIDs can cycle to a new ASID
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* and delay the invalidation until ASID space runs out.
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*
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* - mmu_gather::need_flush_all
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*
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* A flag that can be set by the arch code if it wants to force
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* flush the entire TLB irrespective of the range. For instance
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* x86-PAE needs this when changing top-level entries.
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*
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2018-09-04 19:18:15 +08:00
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* And allows the architecture to provide and implement tlb_flush():
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2018-09-04 16:43:14 +08:00
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*
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* tlb_flush() may, in addition to the above mentioned mmu_gather fields, make
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* use of:
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*
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* - mmu_gather::start / mmu_gather::end
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*
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* which provides the range that needs to be flushed to cover the pages to
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* be freed.
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*
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* - mmu_gather::freed_tables
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*
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* set when we freed page table pages
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*
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* - tlb_get_unmap_shift() / tlb_get_unmap_size()
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*
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2018-09-04 19:18:15 +08:00
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* returns the smallest TLB entry size unmapped in this range.
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*
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* If an architecture does not provide tlb_flush() a default implementation
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2018-10-11 22:51:51 +08:00
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* based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is
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* specified, in which case we'll default to flush_tlb_mm().
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2018-09-04 16:43:14 +08:00
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*
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* Additionally there are a few opt-in features:
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*
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2020-02-04 09:37:05 +08:00
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* MMU_GATHER_PAGE_SIZE
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2018-08-31 20:46:08 +08:00
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*
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* This ensures we call tlb_flush() every time tlb_change_page_size() actually
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* changes the size and provides mmu_gather::page_size to tlb_flush().
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*
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2020-02-04 09:37:05 +08:00
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* This might be useful if your architecture has size specific TLB
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* invalidation instructions.
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*
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2020-02-04 09:37:11 +08:00
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* MMU_GATHER_TABLE_FREE
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2018-09-04 16:43:14 +08:00
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*
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* This provides tlb_remove_table(), to be used instead of tlb_remove_page()
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2020-02-04 09:37:11 +08:00
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* for page directores (__p*_free_tlb()).
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*
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* Useful if your architecture has non-page page directories.
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2018-09-04 16:43:14 +08:00
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*
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* When used, an architecture is expected to provide __tlb_remove_table()
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* which does the actual freeing of these pages.
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*
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2020-02-04 09:37:11 +08:00
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* MMU_GATHER_RCU_TABLE_FREE
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*
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* Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see
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* comment below).
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*
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* Useful if your architecture doesn't use IPIs for remote TLB invalidates
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* and therefore doesn't naturally serialize with software page-table walkers.
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*
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2022-07-08 15:18:03 +08:00
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* MMU_GATHER_NO_FLUSH_CACHE
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*
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* Indicates the architecture has flush_cache_range() but it needs *NOT* be called
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* before unmapping a VMA.
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*
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* NOTE: strictly speaking we shouldn't have this knob and instead rely on
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* flush_cache_range() being a NOP, except Sparc64 seems to be
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* different here.
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*
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* MMU_GATHER_MERGE_VMAS
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*
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* Indicates the architecture wants to merge ranges over VMAs; typical when
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* multiple range invalidates are more expensive than a full invalidate.
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*
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2018-10-11 22:51:51 +08:00
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* MMU_GATHER_NO_RANGE
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*
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2022-07-08 15:18:03 +08:00
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* Use this if your architecture lacks an efficient flush_tlb_range(). This
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* option implies MMU_GATHER_MERGE_VMAS above.
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2020-02-04 09:37:08 +08:00
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*
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* MMU_GATHER_NO_GATHER
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*
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* If the option is set the mmu_gather will not track individual pages for
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* delayed page free anymore. A platform that enables the option needs to
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* provide its own implementation of the __tlb_remove_page_size() function to
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* free pages.
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*
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* This is useful if your architecture already flushes TLB entries in the
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* various ptep_get_and_clear() functions.
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2018-09-04 16:43:14 +08:00
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*/
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2020-02-04 09:37:11 +08:00
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#ifdef CONFIG_MMU_GATHER_TABLE_FREE
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2011-05-25 08:12:00 +08:00
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struct mmu_table_batch {
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2020-02-04 09:37:11 +08:00
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#ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
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2011-05-25 08:12:00 +08:00
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struct rcu_head rcu;
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2020-02-04 09:37:11 +08:00
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#endif
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2011-05-25 08:12:00 +08:00
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unsigned int nr;
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2022-02-15 09:11:44 +08:00
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void *tables[];
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2011-05-25 08:12:00 +08:00
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};
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#define MAX_TABLE_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
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extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
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2020-02-04 09:37:11 +08:00
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#else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */
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/*
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* Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based
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* page directories and we can use the normal page batching to free them.
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*/
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#define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page))
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#endif /* CONFIG_MMU_GATHER_TABLE_FREE */
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#ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
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2020-02-04 09:36:49 +08:00
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/*
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* This allows an architecture that does not use the linux page-tables for
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* hardware to skip the TLBI when freeing page tables.
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*/
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#ifndef tlb_needs_table_invalidate
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#define tlb_needs_table_invalidate() (true)
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2011-05-25 08:12:00 +08:00
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#endif
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2022-11-26 05:37:13 +08:00
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void tlb_remove_table_sync_one(void);
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2020-02-04 09:36:49 +08:00
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#else
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#ifdef tlb_needs_table_invalidate
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2020-02-04 09:37:02 +08:00
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#error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE
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2020-02-04 09:36:49 +08:00
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#endif
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2022-11-26 05:37:13 +08:00
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static inline void tlb_remove_table_sync_one(void) { }
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2020-02-04 09:37:02 +08:00
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#endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */
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2020-02-04 09:36:49 +08:00
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2020-02-04 09:37:08 +08:00
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#ifndef CONFIG_MMU_GATHER_NO_GATHER
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2011-05-25 08:11:45 +08:00
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/*
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* If we can't allocate a page to make a big batch of page pointers
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* to work on, then just handle a few from the on-stack structure.
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*/
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#define MMU_GATHER_BUNDLE 8
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2011-05-25 08:12:01 +08:00
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struct mmu_gather_batch {
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struct mmu_gather_batch *next;
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unsigned int nr;
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unsigned int max;
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2022-11-10 04:30:50 +08:00
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struct encoded_page *encoded_pages[];
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2011-05-25 08:12:01 +08:00
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};
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#define MAX_GATHER_BATCH \
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((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
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2013-01-05 07:35:12 +08:00
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/*
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* Limit the maximum number of mmu_gather batches to reduce a risk of soft
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* lockups for non-preemptible kernels on huge machines when a lot of memory
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* is zapped during unmapping.
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* 10K pages freed at once should be safe even without a preemption point.
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*/
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#define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
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2022-11-10 04:30:50 +08:00
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extern bool __tlb_remove_page_size(struct mmu_gather *tlb,
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struct encoded_page *page,
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2018-09-18 20:51:50 +08:00
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int page_size);
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mm: delay page_remove_rmap() until after the TLB has been flushed
When we remove a page table entry, we are very careful to only free the
page after we have flushed the TLB, because other CPUs could still be
using the page through stale TLB entries until after the flush.
However, we have removed the rmap entry for that page early, which means
that functions like folio_mkclean() would end up not serializing with the
page table lock because the page had already been made invisible to rmap.
And that is a problem, because while the TLB entry exists, we could end up
with the following situation:
(a) one CPU could come in and clean it, never seeing our mapping of the
page
(b) another CPU could continue to use the stale and dirty TLB entry and
continue to write to said page
resulting in a page that has been dirtied, but then marked clean again,
all while another CPU might have dirtied it some more.
End result: possibly lost dirty data.
This extends our current TLB gather infrastructure to optionally track a
"should I do a delayed page_remove_rmap() for this page after flushing the
TLB". It uses the newly introduced 'encoded page pointer' to do that
without having to keep separate data around.
Note, this is complicated by a couple of issues:
- we want to delay the rmap removal, but not past the page table lock,
because that simplifies the memcg accounting
- only SMP configurations want to delay TLB flushing, since on UP
there are obviously no remote TLBs to worry about, and the page
table lock means there are no preemption issues either
- s390 has its own mmu_gather model that doesn't delay TLB flushing,
and as a result also does not want the delayed rmap. As such, we can
treat S390 like the UP case and use a common fallback for the "no
delays" case.
- we can track an enormous number of pages in our mmu_gather structure,
with MAX_GATHER_BATCH_COUNT batches of MAX_TABLE_BATCH pages each,
all set up to be approximately 10k pending pages.
We do not want to have a huge number of batched pages that we then
need to check for delayed rmap handling inside the page table lock.
Particularly that last point results in a noteworthy detail, where the
normal page batch gathering is limited once we have delayed rmaps pending,
in such a way that only the last batch (the so-called "active batch") in
the mmu_gather structure can have any delayed entries.
NOTE! While the "possibly lost dirty data" sounds catastrophic, for this
all to happen you need to have a user thread doing either madvise() with
MADV_DONTNEED or a full re-mmap() of the area concurrently with another
thread continuing to use said mapping.
So arguably this is about user space doing crazy things, but from a VM
consistency standpoint it's better if we track the dirty bit properly even
when user space goes off the rails.
[akpm@linux-foundation.org: fix UP build, per Linus]
Link: https://lore.kernel.org/all/B88D3073-440A-41C7-95F4-895D3F657EF2@gmail.com/
Link: https://lkml.kernel.org/r/20221109203051.1835763-4-torvalds@linux-foundation.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Hugh Dickins <hughd@google.com>
Reported-by: Nadav Amit <nadav.amit@gmail.com>
Tested-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-11-10 04:30:51 +08:00
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#ifdef CONFIG_SMP
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/*
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* This both sets 'delayed_rmap', and returns true. It would be an inline
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* function, except we define it before the 'struct mmu_gather'.
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*/
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#define tlb_delay_rmap(tlb) (((tlb)->delayed_rmap = 1), true)
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extern void tlb_flush_rmaps(struct mmu_gather *tlb, struct vm_area_struct *vma);
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#endif
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#endif
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/*
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* We have a no-op version of the rmap removal that doesn't
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* delay anything. That is used on S390, which flushes remote
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* TLBs synchronously, and on UP, which doesn't have any
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* remote TLBs to flush and is not preemptible due to this
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* all happening under the page table lock.
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*/
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#ifndef tlb_delay_rmap
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#define tlb_delay_rmap(tlb) (false)
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static inline void tlb_flush_rmaps(struct mmu_gather *tlb, struct vm_area_struct *vma) { }
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2018-09-18 20:51:50 +08:00
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#endif
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2018-09-04 16:43:14 +08:00
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/*
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* struct mmu_gather is an opaque type used by the mm code for passing around
|
2005-10-30 09:16:01 +08:00
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* any data needed by arch specific code for tlb_remove_page.
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2005-04-17 06:20:36 +08:00
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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2018-09-04 16:43:14 +08:00
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2020-02-04 09:37:11 +08:00
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#ifdef CONFIG_MMU_GATHER_TABLE_FREE
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2011-05-25 08:12:00 +08:00
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struct mmu_table_batch *batch;
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#endif
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2018-09-04 16:43:14 +08:00
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2012-06-28 09:02:21 +08:00
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unsigned long start;
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unsigned long end;
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2018-08-24 03:27:25 +08:00
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/*
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* we are in the middle of an operation to clear
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* a full mm and can make some optimizations
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*/
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unsigned int fullmm : 1;
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/*
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* we have performed an operation which
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* requires a complete flush of the tlb
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*/
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unsigned int need_flush_all : 1;
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/*
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* we have removed page directories
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*/
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unsigned int freed_tables : 1;
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2011-05-25 08:12:01 +08:00
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mm: delay page_remove_rmap() until after the TLB has been flushed
When we remove a page table entry, we are very careful to only free the
page after we have flushed the TLB, because other CPUs could still be
using the page through stale TLB entries until after the flush.
However, we have removed the rmap entry for that page early, which means
that functions like folio_mkclean() would end up not serializing with the
page table lock because the page had already been made invisible to rmap.
And that is a problem, because while the TLB entry exists, we could end up
with the following situation:
(a) one CPU could come in and clean it, never seeing our mapping of the
page
(b) another CPU could continue to use the stale and dirty TLB entry and
continue to write to said page
resulting in a page that has been dirtied, but then marked clean again,
all while another CPU might have dirtied it some more.
End result: possibly lost dirty data.
This extends our current TLB gather infrastructure to optionally track a
"should I do a delayed page_remove_rmap() for this page after flushing the
TLB". It uses the newly introduced 'encoded page pointer' to do that
without having to keep separate data around.
Note, this is complicated by a couple of issues:
- we want to delay the rmap removal, but not past the page table lock,
because that simplifies the memcg accounting
- only SMP configurations want to delay TLB flushing, since on UP
there are obviously no remote TLBs to worry about, and the page
table lock means there are no preemption issues either
- s390 has its own mmu_gather model that doesn't delay TLB flushing,
and as a result also does not want the delayed rmap. As such, we can
treat S390 like the UP case and use a common fallback for the "no
delays" case.
- we can track an enormous number of pages in our mmu_gather structure,
with MAX_GATHER_BATCH_COUNT batches of MAX_TABLE_BATCH pages each,
all set up to be approximately 10k pending pages.
We do not want to have a huge number of batched pages that we then
need to check for delayed rmap handling inside the page table lock.
Particularly that last point results in a noteworthy detail, where the
normal page batch gathering is limited once we have delayed rmaps pending,
in such a way that only the last batch (the so-called "active batch") in
the mmu_gather structure can have any delayed entries.
NOTE! While the "possibly lost dirty data" sounds catastrophic, for this
all to happen you need to have a user thread doing either madvise() with
MADV_DONTNEED or a full re-mmap() of the area concurrently with another
thread continuing to use said mapping.
So arguably this is about user space doing crazy things, but from a VM
consistency standpoint it's better if we track the dirty bit properly even
when user space goes off the rails.
[akpm@linux-foundation.org: fix UP build, per Linus]
Link: https://lore.kernel.org/all/B88D3073-440A-41C7-95F4-895D3F657EF2@gmail.com/
Link: https://lkml.kernel.org/r/20221109203051.1835763-4-torvalds@linux-foundation.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Hugh Dickins <hughd@google.com>
Reported-by: Nadav Amit <nadav.amit@gmail.com>
Tested-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-11-10 04:30:51 +08:00
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|
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/*
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|
* Do we have pending delayed rmap removals?
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|
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|
*/
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|
|
unsigned int delayed_rmap : 1;
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|
2018-08-24 04:01:46 +08:00
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|
|
/*
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|
* at which levels have we cleared entries?
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|
|
|
*/
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unsigned int cleared_ptes : 1;
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unsigned int cleared_pmds : 1;
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unsigned int cleared_puds : 1;
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|
|
unsigned int cleared_p4ds : 1;
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|
2018-09-04 19:18:15 +08:00
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|
|
/*
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|
* tracks VM_EXEC | VM_HUGETLB in tlb_start_vma
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|
|
|
*/
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|
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|
unsigned int vma_exec : 1;
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|
|
unsigned int vma_huge : 1;
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2022-07-08 15:18:06 +08:00
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|
unsigned int vma_pfn : 1;
|
2018-09-04 19:18:15 +08:00
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|
2018-08-31 20:46:08 +08:00
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|
|
unsigned int batch_count;
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|
|
|
2020-02-04 09:37:08 +08:00
|
|
|
#ifndef CONFIG_MMU_GATHER_NO_GATHER
|
2011-05-25 08:12:01 +08:00
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|
struct mmu_gather_batch *active;
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|
|
struct mmu_gather_batch local;
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|
|
|
struct page *__pages[MMU_GATHER_BUNDLE];
|
2018-08-31 20:46:08 +08:00
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|
|
2020-02-04 09:37:05 +08:00
|
|
|
#ifdef CONFIG_MMU_GATHER_PAGE_SIZE
|
2018-08-31 20:46:08 +08:00
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|
|
unsigned int page_size;
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|
|
|
#endif
|
2018-09-18 20:51:50 +08:00
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
};
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|
|
2011-05-25 08:12:14 +08:00
|
|
|
void tlb_flush_mmu(struct mmu_gather *tlb);
|
2005-04-17 06:20:36 +08:00
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|
2014-10-29 18:03:09 +08:00
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|
|
static inline void __tlb_adjust_range(struct mmu_gather *tlb,
|
2016-12-13 08:42:34 +08:00
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|
unsigned long address,
|
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|
|
unsigned int range_size)
|
2014-10-29 18:03:09 +08:00
|
|
|
{
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|
|
|
tlb->start = min(tlb->start, address);
|
2016-12-13 08:42:34 +08:00
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|
tlb->end = max(tlb->end, address + range_size);
|
2014-10-29 18:03:09 +08:00
|
|
|
}
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|
|
static inline void __tlb_reset_range(struct mmu_gather *tlb)
|
|
|
|
{
|
2015-01-13 03:10:55 +08:00
|
|
|
if (tlb->fullmm) {
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|
|
tlb->start = tlb->end = ~0;
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|
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} else {
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|
tlb->start = TASK_SIZE;
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|
|
tlb->end = 0;
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|
|
|
}
|
2018-08-24 03:27:25 +08:00
|
|
|
tlb->freed_tables = 0;
|
2018-08-24 04:01:46 +08:00
|
|
|
tlb->cleared_ptes = 0;
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|
|
|
tlb->cleared_pmds = 0;
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|
|
|
tlb->cleared_puds = 0;
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|
|
|
tlb->cleared_p4ds = 0;
|
2018-09-04 19:18:15 +08:00
|
|
|
/*
|
|
|
|
* Do not reset mmu_gather::vma_* fields here, we do not
|
|
|
|
* call into tlb_start_vma() again to set them if there is an
|
|
|
|
* intermediate flush.
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
2018-10-11 22:51:51 +08:00
|
|
|
#ifdef CONFIG_MMU_GATHER_NO_RANGE
|
|
|
|
|
2022-07-08 15:18:05 +08:00
|
|
|
#if defined(tlb_flush)
|
|
|
|
#error MMU_GATHER_NO_RANGE relies on default tlb_flush()
|
2018-10-11 22:51:51 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* When an architecture does not have efficient means of range flushing TLBs
|
|
|
|
* there is no point in doing intermediate flushes on tlb_end_vma() to keep the
|
|
|
|
* range small. We equally don't have to worry about page granularity or other
|
|
|
|
* things.
|
|
|
|
*
|
|
|
|
* All we need to do is issue a full flush for any !0 range.
|
|
|
|
*/
|
|
|
|
static inline void tlb_flush(struct mmu_gather *tlb)
|
|
|
|
{
|
|
|
|
if (tlb->end)
|
|
|
|
flush_tlb_mm(tlb->mm);
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* CONFIG_MMU_GATHER_NO_RANGE */
|
|
|
|
|
2018-09-04 19:18:15 +08:00
|
|
|
#ifndef tlb_flush
|
2018-10-11 22:51:51 +08:00
|
|
|
/*
|
|
|
|
* When an architecture does not provide its own tlb_flush() implementation
|
|
|
|
* but does have a reasonably efficient flush_vma_range() implementation
|
|
|
|
* use that.
|
|
|
|
*/
|
2018-09-04 19:18:15 +08:00
|
|
|
static inline void tlb_flush(struct mmu_gather *tlb)
|
|
|
|
{
|
|
|
|
if (tlb->fullmm || tlb->need_flush_all) {
|
|
|
|
flush_tlb_mm(tlb->mm);
|
|
|
|
} else if (tlb->end) {
|
|
|
|
struct vm_area_struct vma = {
|
|
|
|
.vm_mm = tlb->mm,
|
|
|
|
.vm_flags = (tlb->vma_exec ? VM_EXEC : 0) |
|
|
|
|
(tlb->vma_huge ? VM_HUGETLB : 0),
|
|
|
|
};
|
|
|
|
|
|
|
|
flush_tlb_range(&vma, tlb->start, tlb->end);
|
|
|
|
}
|
|
|
|
}
|
2022-07-08 15:18:06 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* CONFIG_MMU_GATHER_NO_RANGE */
|
2018-09-04 19:18:15 +08:00
|
|
|
|
|
|
|
static inline void
|
|
|
|
tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* flush_tlb_range() implementations that look at VM_HUGETLB (tile,
|
|
|
|
* mips-4k) flush only large pages.
|
|
|
|
*
|
|
|
|
* flush_tlb_range() implementations that flush I-TLB also flush D-TLB
|
|
|
|
* (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing
|
|
|
|
* range.
|
|
|
|
*
|
|
|
|
* We rely on tlb_end_vma() to issue a flush, such that when we reset
|
|
|
|
* these values the batch is empty.
|
|
|
|
*/
|
2020-04-07 11:03:51 +08:00
|
|
|
tlb->vma_huge = is_vm_hugetlb_page(vma);
|
2018-09-04 19:18:15 +08:00
|
|
|
tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
|
2022-07-08 15:18:06 +08:00
|
|
|
tlb->vma_pfn = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP));
|
2014-10-29 18:03:09 +08:00
|
|
|
}
|
|
|
|
|
2018-08-23 16:47:09 +08:00
|
|
|
static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
|
|
|
|
{
|
2020-02-04 09:36:53 +08:00
|
|
|
/*
|
|
|
|
* Anything calling __tlb_adjust_range() also sets at least one of
|
|
|
|
* these bits.
|
|
|
|
*/
|
|
|
|
if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds ||
|
|
|
|
tlb->cleared_puds || tlb->cleared_p4ds))
|
2018-08-23 16:47:09 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
tlb_flush(tlb);
|
|
|
|
mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
|
|
|
|
__tlb_reset_range(tlb);
|
|
|
|
}
|
|
|
|
|
2016-07-27 06:24:12 +08:00
|
|
|
static inline void tlb_remove_page_size(struct mmu_gather *tlb,
|
|
|
|
struct page *page, int page_size)
|
|
|
|
{
|
2022-11-10 04:30:50 +08:00
|
|
|
if (__tlb_remove_page_size(tlb, encode_page(page, 0), page_size))
|
2016-07-27 06:24:12 +08:00
|
|
|
tlb_flush_mmu(tlb);
|
|
|
|
}
|
|
|
|
|
mm: delay page_remove_rmap() until after the TLB has been flushed
When we remove a page table entry, we are very careful to only free the
page after we have flushed the TLB, because other CPUs could still be
using the page through stale TLB entries until after the flush.
However, we have removed the rmap entry for that page early, which means
that functions like folio_mkclean() would end up not serializing with the
page table lock because the page had already been made invisible to rmap.
And that is a problem, because while the TLB entry exists, we could end up
with the following situation:
(a) one CPU could come in and clean it, never seeing our mapping of the
page
(b) another CPU could continue to use the stale and dirty TLB entry and
continue to write to said page
resulting in a page that has been dirtied, but then marked clean again,
all while another CPU might have dirtied it some more.
End result: possibly lost dirty data.
This extends our current TLB gather infrastructure to optionally track a
"should I do a delayed page_remove_rmap() for this page after flushing the
TLB". It uses the newly introduced 'encoded page pointer' to do that
without having to keep separate data around.
Note, this is complicated by a couple of issues:
- we want to delay the rmap removal, but not past the page table lock,
because that simplifies the memcg accounting
- only SMP configurations want to delay TLB flushing, since on UP
there are obviously no remote TLBs to worry about, and the page
table lock means there are no preemption issues either
- s390 has its own mmu_gather model that doesn't delay TLB flushing,
and as a result also does not want the delayed rmap. As such, we can
treat S390 like the UP case and use a common fallback for the "no
delays" case.
- we can track an enormous number of pages in our mmu_gather structure,
with MAX_GATHER_BATCH_COUNT batches of MAX_TABLE_BATCH pages each,
all set up to be approximately 10k pending pages.
We do not want to have a huge number of batched pages that we then
need to check for delayed rmap handling inside the page table lock.
Particularly that last point results in a noteworthy detail, where the
normal page batch gathering is limited once we have delayed rmaps pending,
in such a way that only the last batch (the so-called "active batch") in
the mmu_gather structure can have any delayed entries.
NOTE! While the "possibly lost dirty data" sounds catastrophic, for this
all to happen you need to have a user thread doing either madvise() with
MADV_DONTNEED or a full re-mmap() of the area concurrently with another
thread continuing to use said mapping.
So arguably this is about user space doing crazy things, but from a VM
consistency standpoint it's better if we track the dirty bit properly even
when user space goes off the rails.
[akpm@linux-foundation.org: fix UP build, per Linus]
Link: https://lore.kernel.org/all/B88D3073-440A-41C7-95F4-895D3F657EF2@gmail.com/
Link: https://lkml.kernel.org/r/20221109203051.1835763-4-torvalds@linux-foundation.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Hugh Dickins <hughd@google.com>
Reported-by: Nadav Amit <nadav.amit@gmail.com>
Tested-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-11-10 04:30:51 +08:00
|
|
|
static __always_inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page, unsigned int flags)
|
2016-07-27 06:24:12 +08:00
|
|
|
{
|
mm: delay page_remove_rmap() until after the TLB has been flushed
When we remove a page table entry, we are very careful to only free the
page after we have flushed the TLB, because other CPUs could still be
using the page through stale TLB entries until after the flush.
However, we have removed the rmap entry for that page early, which means
that functions like folio_mkclean() would end up not serializing with the
page table lock because the page had already been made invisible to rmap.
And that is a problem, because while the TLB entry exists, we could end up
with the following situation:
(a) one CPU could come in and clean it, never seeing our mapping of the
page
(b) another CPU could continue to use the stale and dirty TLB entry and
continue to write to said page
resulting in a page that has been dirtied, but then marked clean again,
all while another CPU might have dirtied it some more.
End result: possibly lost dirty data.
This extends our current TLB gather infrastructure to optionally track a
"should I do a delayed page_remove_rmap() for this page after flushing the
TLB". It uses the newly introduced 'encoded page pointer' to do that
without having to keep separate data around.
Note, this is complicated by a couple of issues:
- we want to delay the rmap removal, but not past the page table lock,
because that simplifies the memcg accounting
- only SMP configurations want to delay TLB flushing, since on UP
there are obviously no remote TLBs to worry about, and the page
table lock means there are no preemption issues either
- s390 has its own mmu_gather model that doesn't delay TLB flushing,
and as a result also does not want the delayed rmap. As such, we can
treat S390 like the UP case and use a common fallback for the "no
delays" case.
- we can track an enormous number of pages in our mmu_gather structure,
with MAX_GATHER_BATCH_COUNT batches of MAX_TABLE_BATCH pages each,
all set up to be approximately 10k pending pages.
We do not want to have a huge number of batched pages that we then
need to check for delayed rmap handling inside the page table lock.
Particularly that last point results in a noteworthy detail, where the
normal page batch gathering is limited once we have delayed rmaps pending,
in such a way that only the last batch (the so-called "active batch") in
the mmu_gather structure can have any delayed entries.
NOTE! While the "possibly lost dirty data" sounds catastrophic, for this
all to happen you need to have a user thread doing either madvise() with
MADV_DONTNEED or a full re-mmap() of the area concurrently with another
thread continuing to use said mapping.
So arguably this is about user space doing crazy things, but from a VM
consistency standpoint it's better if we track the dirty bit properly even
when user space goes off the rails.
[akpm@linux-foundation.org: fix UP build, per Linus]
Link: https://lore.kernel.org/all/B88D3073-440A-41C7-95F4-895D3F657EF2@gmail.com/
Link: https://lkml.kernel.org/r/20221109203051.1835763-4-torvalds@linux-foundation.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Hugh Dickins <hughd@google.com>
Reported-by: Nadav Amit <nadav.amit@gmail.com>
Tested-by: Nadav Amit <nadav.amit@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-11-10 04:30:51 +08:00
|
|
|
return __tlb_remove_page_size(tlb, encode_page(page, flags), PAGE_SIZE);
|
2016-07-27 06:24:12 +08:00
|
|
|
}
|
|
|
|
|
2016-07-27 06:24:09 +08:00
|
|
|
/* tlb_remove_page
|
|
|
|
* Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
|
|
|
|
* required.
|
|
|
|
*/
|
|
|
|
static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
|
|
|
|
{
|
2016-07-27 06:24:12 +08:00
|
|
|
return tlb_remove_page_size(tlb, page, PAGE_SIZE);
|
2016-07-27 06:24:09 +08:00
|
|
|
}
|
|
|
|
|
2018-08-31 20:46:08 +08:00
|
|
|
static inline void tlb_change_page_size(struct mmu_gather *tlb,
|
2016-12-13 08:42:40 +08:00
|
|
|
unsigned int page_size)
|
|
|
|
{
|
2020-02-04 09:37:05 +08:00
|
|
|
#ifdef CONFIG_MMU_GATHER_PAGE_SIZE
|
2018-08-31 20:46:08 +08:00
|
|
|
if (tlb->page_size && tlb->page_size != page_size) {
|
2019-10-24 15:58:01 +08:00
|
|
|
if (!tlb->fullmm && !tlb->need_flush_all)
|
2018-08-31 20:46:08 +08:00
|
|
|
tlb_flush_mmu(tlb);
|
|
|
|
}
|
|
|
|
|
2016-12-13 08:42:40 +08:00
|
|
|
tlb->page_size = page_size;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2018-08-24 04:01:46 +08:00
|
|
|
static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb)
|
|
|
|
{
|
|
|
|
if (tlb->cleared_ptes)
|
|
|
|
return PAGE_SHIFT;
|
|
|
|
if (tlb->cleared_pmds)
|
|
|
|
return PMD_SHIFT;
|
|
|
|
if (tlb->cleared_puds)
|
|
|
|
return PUD_SHIFT;
|
|
|
|
if (tlb->cleared_p4ds)
|
|
|
|
return P4D_SHIFT;
|
|
|
|
|
|
|
|
return PAGE_SHIFT;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb)
|
|
|
|
{
|
|
|
|
return 1UL << tlb_get_unmap_shift(tlb);
|
|
|
|
}
|
|
|
|
|
2014-10-29 18:03:09 +08:00
|
|
|
/*
|
|
|
|
* In the case of tlb vma handling, we can optimise these away in the
|
|
|
|
* case where we're doing a full MM flush. When we're doing a munmap,
|
|
|
|
* the vmas are adjusted to only cover the region to be torn down.
|
|
|
|
*/
|
2018-09-04 19:18:15 +08:00
|
|
|
static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
if (tlb->fullmm)
|
|
|
|
return;
|
|
|
|
|
|
|
|
tlb_update_vma_flags(tlb, vma);
|
2022-07-08 15:18:03 +08:00
|
|
|
#ifndef CONFIG_MMU_GATHER_NO_FLUSH_CACHE
|
2018-09-04 19:18:15 +08:00
|
|
|
flush_cache_range(vma, vma->vm_start, vma->vm_end);
|
2022-07-08 15:18:03 +08:00
|
|
|
#endif
|
2018-09-04 19:18:15 +08:00
|
|
|
}
|
2014-10-29 18:03:09 +08:00
|
|
|
|
2018-09-04 19:18:15 +08:00
|
|
|
static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
|
|
|
|
{
|
2022-07-08 15:18:06 +08:00
|
|
|
if (tlb->fullmm)
|
2018-09-04 19:18:15 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
2022-07-08 15:18:06 +08:00
|
|
|
* VM_PFNMAP is more fragile because the core mm will not track the
|
|
|
|
* page mapcount -- there might not be page-frames for these PFNs after
|
|
|
|
* all. Force flush TLBs for such ranges to avoid munmap() vs
|
|
|
|
* unmap_mapping_range() races.
|
2018-09-04 19:18:15 +08:00
|
|
|
*/
|
2022-07-08 15:18:06 +08:00
|
|
|
if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) {
|
|
|
|
/*
|
|
|
|
* Do a TLB flush and reset the range at VMA boundaries; this avoids
|
|
|
|
* the ranges growing with the unused space between consecutive VMAs.
|
|
|
|
*/
|
|
|
|
tlb_flush_mmu_tlbonly(tlb);
|
|
|
|
}
|
2018-09-04 19:18:15 +08:00
|
|
|
}
|
2014-10-29 18:03:09 +08:00
|
|
|
|
2020-06-25 16:03:12 +08:00
|
|
|
/*
|
|
|
|
* tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end,
|
|
|
|
* and set corresponding cleared_*.
|
|
|
|
*/
|
|
|
|
static inline void tlb_flush_pte_range(struct mmu_gather *tlb,
|
|
|
|
unsigned long address, unsigned long size)
|
|
|
|
{
|
|
|
|
__tlb_adjust_range(tlb, address, size);
|
|
|
|
tlb->cleared_ptes = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void tlb_flush_pmd_range(struct mmu_gather *tlb,
|
|
|
|
unsigned long address, unsigned long size)
|
|
|
|
{
|
|
|
|
__tlb_adjust_range(tlb, address, size);
|
|
|
|
tlb->cleared_pmds = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void tlb_flush_pud_range(struct mmu_gather *tlb,
|
|
|
|
unsigned long address, unsigned long size)
|
|
|
|
{
|
|
|
|
__tlb_adjust_range(tlb, address, size);
|
|
|
|
tlb->cleared_puds = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void tlb_flush_p4d_range(struct mmu_gather *tlb,
|
|
|
|
unsigned long address, unsigned long size)
|
|
|
|
{
|
|
|
|
__tlb_adjust_range(tlb, address, size);
|
|
|
|
tlb->cleared_p4ds = 1;
|
|
|
|
}
|
|
|
|
|
2014-10-29 18:03:09 +08:00
|
|
|
#ifndef __tlb_remove_tlb_entry
|
|
|
|
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
|
|
|
|
#endif
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/**
|
|
|
|
* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
|
|
|
|
*
|
2014-10-29 18:03:09 +08:00
|
|
|
* Record the fact that pte's were really unmapped by updating the range,
|
|
|
|
* so we can later optimise away the tlb invalidate. This helps when
|
|
|
|
* userspace is unmapping already-unmapped pages, which happens quite a lot.
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
|
|
|
#define tlb_remove_tlb_entry(tlb, ptep, address) \
|
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pte_range(tlb, address, PAGE_SIZE); \
|
2005-04-17 06:20:36 +08:00
|
|
|
__tlb_remove_tlb_entry(tlb, ptep, address); \
|
|
|
|
} while (0)
|
|
|
|
|
2018-08-24 04:01:46 +08:00
|
|
|
#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
|
|
|
|
do { \
|
|
|
|
unsigned long _sz = huge_page_size(h); \
|
2022-03-30 19:25:43 +08:00
|
|
|
if (_sz >= P4D_SIZE) \
|
|
|
|
tlb_flush_p4d_range(tlb, address, _sz); \
|
|
|
|
else if (_sz >= PUD_SIZE) \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pud_range(tlb, address, _sz); \
|
2022-03-30 19:25:43 +08:00
|
|
|
else if (_sz >= PMD_SIZE) \
|
|
|
|
tlb_flush_pmd_range(tlb, address, _sz); \
|
|
|
|
else \
|
|
|
|
tlb_flush_pte_range(tlb, address, _sz); \
|
2018-08-24 04:01:46 +08:00
|
|
|
__tlb_remove_tlb_entry(tlb, ptep, address); \
|
2016-12-13 08:42:37 +08:00
|
|
|
} while (0)
|
|
|
|
|
2012-01-13 09:19:16 +08:00
|
|
|
/**
|
|
|
|
* tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
|
|
|
|
* This is a nop so far, because only x86 needs it.
|
|
|
|
*/
|
|
|
|
#ifndef __tlb_remove_pmd_tlb_entry
|
|
|
|
#define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
|
|
|
|
#endif
|
|
|
|
|
2016-12-13 08:42:34 +08:00
|
|
|
#define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
|
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \
|
2016-12-13 08:42:34 +08:00
|
|
|
__tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
|
2012-01-13 09:19:16 +08:00
|
|
|
} while (0)
|
|
|
|
|
2017-02-25 06:57:02 +08:00
|
|
|
/**
|
|
|
|
* tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
|
|
|
|
* invalidation. This is a nop so far, because only x86 needs it.
|
|
|
|
*/
|
|
|
|
#ifndef __tlb_remove_pud_tlb_entry
|
|
|
|
#define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
|
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \
|
2017-02-25 06:57:02 +08:00
|
|
|
__tlb_remove_pud_tlb_entry(tlb, pudp, address); \
|
|
|
|
} while (0)
|
|
|
|
|
2016-12-13 08:42:34 +08:00
|
|
|
/*
|
|
|
|
* For things like page tables caches (ie caching addresses "inside" the
|
|
|
|
* page tables, like x86 does), for legacy reasons, flushing an
|
|
|
|
* individual page had better flush the page table caches behind it. This
|
|
|
|
* is definitely how x86 works, for example. And if you have an
|
|
|
|
* architected non-legacy page table cache (which I'm not aware of
|
|
|
|
* anybody actually doing), you're going to have some architecturally
|
|
|
|
* explicit flushing for that, likely *separate* from a regular TLB entry
|
|
|
|
* flush, and thus you'd need more than just some range expansion..
|
|
|
|
*
|
|
|
|
* So if we ever find an architecture
|
|
|
|
* that would want something that odd, I think it is up to that
|
|
|
|
* architecture to do its own odd thing, not cause pain for others
|
|
|
|
* http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
|
|
|
|
*
|
|
|
|
* For now w.r.t page table cache, mark the range_size as PAGE_SIZE
|
|
|
|
*/
|
|
|
|
|
2018-07-14 07:59:03 +08:00
|
|
|
#ifndef pte_free_tlb
|
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
|
|
|
#define pte_free_tlb(tlb, ptep, address) \
|
2005-04-17 06:20:36 +08:00
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \
|
2018-08-24 04:01:46 +08:00
|
|
|
tlb->freed_tables = 1; \
|
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
|
|
|
__pte_free_tlb(tlb, ptep, address); \
|
2005-04-17 06:20:36 +08:00
|
|
|
} while (0)
|
2018-07-14 07:59:03 +08:00
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-07-14 07:59:03 +08:00
|
|
|
#ifndef pmd_free_tlb
|
2017-03-09 22:24:06 +08:00
|
|
|
#define pmd_free_tlb(tlb, pmdp, address) \
|
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_pud_range(tlb, address, PAGE_SIZE); \
|
2018-08-24 04:01:46 +08:00
|
|
|
tlb->freed_tables = 1; \
|
2017-03-09 22:24:06 +08:00
|
|
|
__pmd_free_tlb(tlb, pmdp, address); \
|
|
|
|
} while (0)
|
2018-07-14 07:59:03 +08:00
|
|
|
#endif
|
2017-03-09 22:24:06 +08:00
|
|
|
|
2018-07-14 07:59:03 +08:00
|
|
|
#ifndef pud_free_tlb
|
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
|
|
|
#define pud_free_tlb(tlb, pudp, address) \
|
2005-04-17 06:20:36 +08:00
|
|
|
do { \
|
2020-06-25 16:03:12 +08:00
|
|
|
tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \
|
2018-08-24 04:01:46 +08:00
|
|
|
tlb->freed_tables = 1; \
|
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-22 13:44:28 +08:00
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__pud_free_tlb(tlb, pudp, address); \
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2005-04-17 06:20:36 +08:00
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} while (0)
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#endif
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2018-07-14 07:59:03 +08:00
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#ifndef p4d_free_tlb
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2017-03-09 22:24:06 +08:00
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#define p4d_free_tlb(tlb, pudp, address) \
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2005-04-17 06:20:36 +08:00
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do { \
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2018-08-24 03:27:25 +08:00
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__tlb_adjust_range(tlb, address, PAGE_SIZE); \
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2018-08-24 04:01:46 +08:00
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tlb->freed_tables = 1; \
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2017-03-09 22:24:06 +08:00
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__p4d_free_tlb(tlb, pudp, address); \
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2005-04-17 06:20:36 +08:00
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} while (0)
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2017-03-09 22:24:06 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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2022-05-10 09:20:50 +08:00
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#ifndef pte_needs_flush
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static inline bool pte_needs_flush(pte_t oldpte, pte_t newpte)
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{
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return true;
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}
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#endif
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#ifndef huge_pmd_needs_flush
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static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd)
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{
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return true;
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}
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#endif
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2018-08-24 20:28:28 +08:00
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#endif /* CONFIG_MMU */
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2005-04-17 06:20:36 +08:00
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#endif /* _ASM_GENERIC__TLB_H */
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