2017-11-07 01:11:51 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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2005-04-17 06:20:36 +08:00
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/*
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* Based on drivers/serial/8250.c by Russell King.
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*
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* Author: Nicolas Pitre
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* Created: Feb 20, 2003
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* Copyright: (C) 2003 Monta Vista Software, Inc.
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*
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* Note 1: This driver is made separate from the already too overloaded
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* 8250.c because it needs some kirks of its own and that'll make it
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* easier to add DMA support.
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*
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* Note 2: I'm too sick of device allocation policies for serial ports.
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* If someone else wants to request an "official" allocation of major/minor
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* for this driver please be my guest. And don't forget that new hardware
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* to come from Intel might have more than 3 or 4 of those UARTs. Let's
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* hope for a better port registration and dynamic device allocation scheme
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* with the serial core maintainer satisfaction to appear soon.
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*/
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/serial_reg.h>
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#include <linux/circ_buf.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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2012-02-29 16:09:05 +08:00
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#include <linux/of.h>
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2005-10-30 02:07:23 +08:00
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#include <linux/platform_device.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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2007-08-20 17:28:15 +08:00
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#include <linux/clk.h>
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2009-01-14 19:12:42 +08:00
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#include <linux/io.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2005-04-17 06:20:36 +08:00
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2012-02-29 16:09:05 +08:00
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#define PXA_NAME_LEN 8
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2005-04-17 06:20:36 +08:00
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struct uart_pxa_port {
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struct uart_port port;
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unsigned char ier;
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unsigned char lcr;
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unsigned char mcr;
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unsigned int lsr_break_flag;
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2007-08-20 17:28:15 +08:00
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struct clk *clk;
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2012-02-29 16:09:05 +08:00
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char name[PXA_NAME_LEN];
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2005-04-17 06:20:36 +08:00
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};
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static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
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{
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offset <<= 2;
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return readl(up->port.membase + offset);
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}
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static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
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{
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offset <<= 2;
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writel(value, up->port.membase + offset);
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}
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static void serial_pxa_enable_ms(struct uart_port *port)
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{
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struct uart_pxa_port *up = (struct uart_pxa_port *)port;
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up->ier |= UART_IER_MSI;
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serial_out(up, UART_IER, up->ier);
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}
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2005-08-31 17:12:14 +08:00
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static void serial_pxa_stop_tx(struct uart_port *port)
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2005-04-17 06:20:36 +08:00
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{
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struct uart_pxa_port *up = (struct uart_pxa_port *)port;
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if (up->ier & UART_IER_THRI) {
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up->ier &= ~UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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}
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}
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static void serial_pxa_stop_rx(struct uart_port *port)
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{
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struct uart_pxa_port *up = (struct uart_pxa_port *)port;
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up->ier &= ~UART_IER_RLSI;
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up->port.read_status_mask &= ~UART_LSR_DR;
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serial_out(up, UART_IER, up->ier);
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}
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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
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static inline void receive_chars(struct uart_pxa_port *up, int *status)
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2005-04-17 06:20:36 +08:00
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{
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unsigned int ch, flag;
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int max_count = 256;
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do {
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2011-08-30 19:53:10 +08:00
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/* work around Errata #20 according to
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* Intel(R) PXA27x Processor Family
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* Specification Update (May 2005)
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*
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* Step 2
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* Disable the Reciever Time Out Interrupt via IER[RTOEI]
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*/
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up->ier &= ~UART_IER_RTOIE;
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serial_out(up, UART_IER, up->ier);
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2005-04-17 06:20:36 +08:00
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ch = serial_in(up, UART_RX);
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flag = TTY_NORMAL;
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up->port.icount.rx++;
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if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
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UART_LSR_FE | UART_LSR_OE))) {
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/*
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* For statistics only
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*/
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if (*status & UART_LSR_BI) {
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*status &= ~(UART_LSR_FE | UART_LSR_PE);
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up->port.icount.brk++;
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/*
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* We do the SysRQ and SAK checking
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* here because otherwise the break
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* may get masked by ignore_status_mask
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* or read_status_mask.
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*/
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if (uart_handle_break(&up->port))
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goto ignore_char;
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} else if (*status & UART_LSR_PE)
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up->port.icount.parity++;
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else if (*status & UART_LSR_FE)
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up->port.icount.frame++;
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if (*status & UART_LSR_OE)
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up->port.icount.overrun++;
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/*
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* Mask off conditions which should be ignored.
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*/
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*status &= up->port.read_status_mask;
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#ifdef CONFIG_SERIAL_PXA_CONSOLE
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if (up->port.line == up->port.cons->index) {
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/* Recover the break flag from console xmit */
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*status |= up->lsr_break_flag;
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up->lsr_break_flag = 0;
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}
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#endif
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if (*status & UART_LSR_BI) {
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flag = TTY_BREAK;
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} else if (*status & UART_LSR_PE)
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flag = TTY_PARITY;
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else if (*status & UART_LSR_FE)
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flag = TTY_FRAME;
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}
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2005-05-10 06:21:59 +08:00
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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
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if (uart_handle_sysrq_char(&up->port, ch))
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2005-04-17 06:20:36 +08:00
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goto ignore_char;
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2005-05-10 06:21:59 +08:00
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uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
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2005-04-17 06:20:36 +08:00
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ignore_char:
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*status = serial_in(up, UART_LSR);
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} while ((*status & UART_LSR_DR) && (max_count-- > 0));
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2013-01-03 22:53:06 +08:00
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tty_flip_buffer_push(&up->port.state->port);
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2011-08-30 19:53:10 +08:00
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/* work around Errata #20 according to
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* Intel(R) PXA27x Processor Family
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|
|
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* Specification Update (May 2005)
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*
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* Step 6:
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* No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
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*/
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up->ier |= UART_IER_RTOIE;
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serial_out(up, UART_IER, up->ier);
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2005-04-17 06:20:36 +08:00
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}
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static void transmit_chars(struct uart_pxa_port *up)
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{
|
2009-09-20 04:13:28 +08:00
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struct circ_buf *xmit = &up->port.state->xmit;
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2005-04-17 06:20:36 +08:00
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int count;
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if (up->port.x_char) {
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serial_out(up, UART_TX, up->port.x_char);
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up->port.icount.tx++;
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up->port.x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
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2005-08-31 17:12:14 +08:00
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serial_pxa_stop_tx(&up->port);
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2005-04-17 06:20:36 +08:00
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return;
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}
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count = up->port.fifosize / 2;
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do {
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serial_out(up, UART_TX, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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up->port.icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&up->port);
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if (uart_circ_empty(xmit))
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2005-08-31 17:12:14 +08:00
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serial_pxa_stop_tx(&up->port);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2005-08-31 17:12:14 +08:00
|
|
|
static void serial_pxa_start_tx(struct uart_port *port)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
|
|
|
|
|
if (!(up->ier & UART_IER_THRI)) {
|
|
|
|
|
up->ier |= UART_IER_THRI;
|
|
|
|
|
serial_out(up, UART_IER, up->ier);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-11-26 17:21:56 +08:00
|
|
|
/* should hold up->port.lock */
|
2005-04-17 06:20:36 +08:00
|
|
|
static inline void check_modem_status(struct uart_pxa_port *up)
|
|
|
|
|
{
|
|
|
|
|
int status;
|
|
|
|
|
|
|
|
|
|
status = serial_in(up, UART_MSR);
|
|
|
|
|
|
|
|
|
|
if ((status & UART_MSR_ANY_DELTA) == 0)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if (status & UART_MSR_TERI)
|
|
|
|
|
up->port.icount.rng++;
|
|
|
|
|
if (status & UART_MSR_DDSR)
|
|
|
|
|
up->port.icount.dsr++;
|
|
|
|
|
if (status & UART_MSR_DDCD)
|
|
|
|
|
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
|
|
|
|
|
if (status & UART_MSR_DCTS)
|
|
|
|
|
uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
|
|
|
|
|
|
2009-09-20 04:13:31 +08:00
|
|
|
wake_up_interruptible(&up->port.state->port.delta_msr_wait);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* This handles the interrupt from one port.
|
|
|
|
|
*/
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-10-07 03:00:58 +08:00
|
|
|
struct uart_pxa_port *up = dev_id;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned int iir, lsr;
|
|
|
|
|
|
|
|
|
|
iir = serial_in(up, UART_IIR);
|
|
|
|
|
if (iir & UART_IIR_NO_INT)
|
|
|
|
|
return IRQ_NONE;
|
2014-11-26 17:21:56 +08:00
|
|
|
spin_lock(&up->port.lock);
|
2005-04-17 06:20:36 +08:00
|
|
|
lsr = serial_in(up, UART_LSR);
|
|
|
|
|
if (lsr & UART_LSR_DR)
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
receive_chars(up, &lsr);
|
2005-04-17 06:20:36 +08:00
|
|
|
check_modem_status(up);
|
|
|
|
|
if (lsr & UART_LSR_THRE)
|
|
|
|
|
transmit_chars(up);
|
2014-11-26 17:21:56 +08:00
|
|
|
spin_unlock(&up->port.lock);
|
2005-04-17 06:20:36 +08:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned int serial_pxa_tx_empty(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
unsigned int ret;
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
|
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
|
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned char status;
|
|
|
|
|
unsigned int ret;
|
|
|
|
|
|
|
|
|
|
status = serial_in(up, UART_MSR);
|
|
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
if (status & UART_MSR_DCD)
|
|
|
|
|
ret |= TIOCM_CAR;
|
|
|
|
|
if (status & UART_MSR_RI)
|
|
|
|
|
ret |= TIOCM_RNG;
|
|
|
|
|
if (status & UART_MSR_DSR)
|
|
|
|
|
ret |= TIOCM_DSR;
|
|
|
|
|
if (status & UART_MSR_CTS)
|
|
|
|
|
ret |= TIOCM_CTS;
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned char mcr = 0;
|
|
|
|
|
|
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
|
|
|
mcr |= UART_MCR_RTS;
|
|
|
|
|
if (mctrl & TIOCM_DTR)
|
|
|
|
|
mcr |= UART_MCR_DTR;
|
|
|
|
|
if (mctrl & TIOCM_OUT1)
|
|
|
|
|
mcr |= UART_MCR_OUT1;
|
|
|
|
|
if (mctrl & TIOCM_OUT2)
|
|
|
|
|
mcr |= UART_MCR_OUT2;
|
|
|
|
|
if (mctrl & TIOCM_LOOP)
|
|
|
|
|
mcr |= UART_MCR_LOOP;
|
|
|
|
|
|
|
|
|
|
mcr |= up->mcr;
|
|
|
|
|
|
|
|
|
|
serial_out(up, UART_MCR, mcr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
|
if (break_state == -1)
|
|
|
|
|
up->lcr |= UART_LCR_SBC;
|
|
|
|
|
else
|
|
|
|
|
up->lcr &= ~UART_LCR_SBC;
|
|
|
|
|
serial_out(up, UART_LCR, up->lcr);
|
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int serial_pxa_startup(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
int retval;
|
|
|
|
|
|
2005-10-28 23:25:02 +08:00
|
|
|
if (port->line == 3) /* HWUART */
|
|
|
|
|
up->mcr |= UART_MCR_AFE;
|
|
|
|
|
else
|
2005-12-30 23:57:35 +08:00
|
|
|
up->mcr = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-08-20 17:28:15 +08:00
|
|
|
up->port.uartclk = clk_get_rate(up->clk);
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
|
* Allocate the IRQ
|
|
|
|
|
*/
|
|
|
|
|
retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
|
|
|
|
|
if (retval)
|
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Clear the FIFO buffers and disable them.
|
|
|
|
|
* (they will be reenabled in set_termios())
|
|
|
|
|
*/
|
|
|
|
|
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
|
|
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
|
|
|
|
|
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
|
|
|
|
serial_out(up, UART_FCR, 0);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Clear the interrupt registers.
|
|
|
|
|
*/
|
|
|
|
|
(void) serial_in(up, UART_LSR);
|
|
|
|
|
(void) serial_in(up, UART_RX);
|
|
|
|
|
(void) serial_in(up, UART_IIR);
|
|
|
|
|
(void) serial_in(up, UART_MSR);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Now, initialize the UART
|
|
|
|
|
*/
|
|
|
|
|
serial_out(up, UART_LCR, UART_LCR_WLEN8);
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
|
up->port.mctrl |= TIOCM_OUT2;
|
|
|
|
|
serial_pxa_set_mctrl(&up->port, up->port.mctrl);
|
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Finally, enable interrupts. Note: Modem status interrupts
|
2006-07-01 00:27:16 +08:00
|
|
|
* are set via set_termios(), which will be occurring imminently
|
2005-04-17 06:20:36 +08:00
|
|
|
* anyway, so we don't enable them here.
|
|
|
|
|
*/
|
|
|
|
|
up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
|
|
|
|
|
serial_out(up, UART_IER, up->ier);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* And clear the interrupt registers again for luck.
|
|
|
|
|
*/
|
|
|
|
|
(void) serial_in(up, UART_LSR);
|
|
|
|
|
(void) serial_in(up, UART_RX);
|
|
|
|
|
(void) serial_in(up, UART_IIR);
|
|
|
|
|
(void) serial_in(up, UART_MSR);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_shutdown(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
free_irq(up->port.irq, up);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Disable interrupts from this port
|
|
|
|
|
*/
|
|
|
|
|
up->ier = 0;
|
|
|
|
|
serial_out(up, UART_IER, 0);
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
|
up->port.mctrl &= ~TIOCM_OUT2;
|
|
|
|
|
serial_pxa_set_mctrl(&up->port, up->port.mctrl);
|
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Disable break condition and FIFOs
|
|
|
|
|
*/
|
|
|
|
|
serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
|
|
|
|
|
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
|
|
|
|
|
UART_FCR_CLEAR_RCVR |
|
|
|
|
|
UART_FCR_CLEAR_XMIT);
|
|
|
|
|
serial_out(up, UART_FCR, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
2006-12-08 18:38:45 +08:00
|
|
|
serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
|
|
struct ktermios *old)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned char cval, fcr = 0;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
unsigned int baud, quot;
|
2009-11-07 04:40:46 +08:00
|
|
|
unsigned int dll;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
|
|
|
case CS5:
|
2005-06-25 02:48:22 +08:00
|
|
|
cval = UART_LCR_WLEN5;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
case CS6:
|
2005-06-25 02:48:22 +08:00
|
|
|
cval = UART_LCR_WLEN6;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
case CS7:
|
2005-06-25 02:48:22 +08:00
|
|
|
cval = UART_LCR_WLEN7;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
case CS8:
|
2005-06-25 02:48:22 +08:00
|
|
|
cval = UART_LCR_WLEN8;
|
2005-04-17 06:20:36 +08:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
2005-06-25 02:48:22 +08:00
|
|
|
cval |= UART_LCR_STOP;
|
2005-04-17 06:20:36 +08:00
|
|
|
if (termios->c_cflag & PARENB)
|
|
|
|
|
cval |= UART_LCR_PARITY;
|
|
|
|
|
if (!(termios->c_cflag & PARODD))
|
|
|
|
|
cval |= UART_LCR_EPAR;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ask the core to calculate the divisor for us.
|
|
|
|
|
*/
|
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
|
|
|
quot = uart_get_divisor(port, baud);
|
|
|
|
|
|
|
|
|
|
if ((up->port.uartclk / quot) < (2400 * 16))
|
|
|
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
|
2005-10-28 23:25:02 +08:00
|
|
|
else if ((up->port.uartclk / quot) < (230400 * 16))
|
2005-04-17 06:20:36 +08:00
|
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
|
2005-10-28 23:25:02 +08:00
|
|
|
else
|
|
|
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ok, we're now changing the port state. Do it with
|
|
|
|
|
* interrupts disabled.
|
|
|
|
|
*/
|
|
|
|
|
spin_lock_irqsave(&up->port.lock, flags);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Ensure the port will be enabled.
|
|
|
|
|
* This is required especially for serial console.
|
|
|
|
|
*/
|
2009-01-14 19:12:42 +08:00
|
|
|
up->ier |= UART_IER_UUE;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Update the per-port timeout.
|
|
|
|
|
*/
|
2005-10-13 02:58:11 +08:00
|
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
|
|
|
|
|
if (termios->c_iflag & INPCK)
|
|
|
|
|
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
|
2014-06-16 20:10:41 +08:00
|
|
|
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
2005-04-17 06:20:36 +08:00
|
|
|
up->port.read_status_mask |= UART_LSR_BI;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Characters to ignore
|
|
|
|
|
*/
|
|
|
|
|
up->port.ignore_status_mask = 0;
|
|
|
|
|
if (termios->c_iflag & IGNPAR)
|
|
|
|
|
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
|
|
|
|
|
if (termios->c_iflag & IGNBRK) {
|
|
|
|
|
up->port.ignore_status_mask |= UART_LSR_BI;
|
|
|
|
|
/*
|
|
|
|
|
* If we're ignoring parity and break indicators,
|
|
|
|
|
* ignore overruns too (for real raw support).
|
|
|
|
|
*/
|
|
|
|
|
if (termios->c_iflag & IGNPAR)
|
|
|
|
|
up->port.ignore_status_mask |= UART_LSR_OE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* ignore all characters if CREAD is not set
|
|
|
|
|
*/
|
|
|
|
|
if ((termios->c_cflag & CREAD) == 0)
|
|
|
|
|
up->port.ignore_status_mask |= UART_LSR_DR;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* CTS flow control flag and modem status interrupts
|
|
|
|
|
*/
|
|
|
|
|
up->ier &= ~UART_IER_MSI;
|
|
|
|
|
if (UART_ENABLE_MS(&up->port, termios->c_cflag))
|
|
|
|
|
up->ier |= UART_IER_MSI;
|
|
|
|
|
|
|
|
|
|
serial_out(up, UART_IER, up->ier);
|
|
|
|
|
|
2008-09-07 06:01:32 +08:00
|
|
|
if (termios->c_cflag & CRTSCTS)
|
|
|
|
|
up->mcr |= UART_MCR_AFE;
|
|
|
|
|
else
|
|
|
|
|
up->mcr &= ~UART_MCR_AFE;
|
|
|
|
|
|
2009-11-07 04:40:46 +08:00
|
|
|
serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
|
2005-04-17 06:20:36 +08:00
|
|
|
serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
|
2009-11-07 04:40:46 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* work around Errata #75 according to Intel(R) PXA27x Processor Family
|
|
|
|
|
* Specification Update (Nov 2005)
|
|
|
|
|
*/
|
|
|
|
|
dll = serial_in(up, UART_DLL);
|
|
|
|
|
WARN_ON(dll != (quot & 0xff));
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
|
2009-11-07 04:40:46 +08:00
|
|
|
serial_out(up, UART_LCR, cval); /* reset DLAB */
|
2005-04-17 06:20:36 +08:00
|
|
|
up->lcr = cval; /* Save LCR */
|
|
|
|
|
serial_pxa_set_mctrl(&up->port, up->port.mctrl);
|
|
|
|
|
serial_out(up, UART_FCR, fcr);
|
|
|
|
|
spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
serial_pxa_pm(struct uart_port *port, unsigned int state,
|
|
|
|
|
unsigned int oldstate)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
2007-08-20 17:28:15 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
if (!state)
|
2012-03-16 02:15:15 +08:00
|
|
|
clk_prepare_enable(up->clk);
|
2007-08-20 17:28:15 +08:00
|
|
|
else
|
2012-03-16 02:15:15 +08:00
|
|
|
clk_disable_unprepare(up->clk);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_release_port(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int serial_pxa_request_port(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_config_port(struct uart_port *port, int flags)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
up->port.type = PORT_PXA;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
|
|
|
{
|
|
|
|
|
/* we don't want the core code to modify any port params */
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const char *
|
|
|
|
|
serial_pxa_type(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
return up->name;
|
|
|
|
|
}
|
|
|
|
|
|
2007-08-20 16:47:41 +08:00
|
|
|
static struct uart_pxa_port *serial_pxa_ports[4];
|
2005-09-15 05:36:03 +08:00
|
|
|
static struct uart_driver serial_pxa_reg;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-11-23 00:52:47 +08:00
|
|
|
#ifdef CONFIG_SERIAL_PXA_CONSOLE
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Wait for transmitter & holding register to empty
|
|
|
|
|
*/
|
2015-10-28 01:46:41 +08:00
|
|
|
static void wait_for_xmitr(struct uart_pxa_port *up)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
|
unsigned int status, tmout = 10000;
|
|
|
|
|
|
|
|
|
|
/* Wait up to 10ms for the character(s) to be sent. */
|
|
|
|
|
do {
|
|
|
|
|
status = serial_in(up, UART_LSR);
|
|
|
|
|
|
|
|
|
|
if (status & UART_LSR_BI)
|
|
|
|
|
up->lsr_break_flag = UART_LSR_BI;
|
|
|
|
|
|
|
|
|
|
if (--tmout == 0)
|
|
|
|
|
break;
|
|
|
|
|
udelay(1);
|
|
|
|
|
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
|
|
|
|
|
|
|
|
|
|
/* Wait up to 1s for flow control if necessary */
|
|
|
|
|
if (up->port.flags & UPF_CONS_FLOW) {
|
|
|
|
|
tmout = 1000000;
|
|
|
|
|
while (--tmout &&
|
|
|
|
|
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
|
|
|
|
|
udelay(1);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2006-03-21 04:00:09 +08:00
|
|
|
static void serial_pxa_console_putchar(struct uart_port *port, int ch)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
|
|
|
|
|
wait_for_xmitr(up);
|
|
|
|
|
serial_out(up, UART_TX, ch);
|
|
|
|
|
}
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
|
* Print a string to the serial port trying not to disturb
|
|
|
|
|
* any possible real use of the port...
|
|
|
|
|
*
|
|
|
|
|
* The console_lock must be held when we get here.
|
|
|
|
|
*/
|
|
|
|
|
static void
|
|
|
|
|
serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
|
|
|
|
|
{
|
2007-08-20 16:47:41 +08:00
|
|
|
struct uart_pxa_port *up = serial_pxa_ports[co->index];
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned int ier;
|
2012-06-14 12:18:46 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
int locked = 1;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2013-01-23 09:52:25 +08:00
|
|
|
clk_enable(up->clk);
|
2012-06-14 12:18:46 +08:00
|
|
|
local_irq_save(flags);
|
|
|
|
|
if (up->port.sysrq)
|
|
|
|
|
locked = 0;
|
|
|
|
|
else if (oops_in_progress)
|
|
|
|
|
locked = spin_trylock(&up->port.lock);
|
|
|
|
|
else
|
|
|
|
|
spin_lock(&up->port.lock);
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*
|
2005-12-30 23:57:35 +08:00
|
|
|
* First save the IER then disable the interrupts
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
|
|
|
|
ier = serial_in(up, UART_IER);
|
|
|
|
|
serial_out(up, UART_IER, UART_IER_UUE);
|
|
|
|
|
|
2006-03-21 04:00:09 +08:00
|
|
|
uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Finally, wait for transmitter to become empty
|
|
|
|
|
* and restore the IER
|
|
|
|
|
*/
|
|
|
|
|
wait_for_xmitr(up);
|
|
|
|
|
serial_out(up, UART_IER, ier);
|
2007-08-20 17:28:15 +08:00
|
|
|
|
2012-06-14 12:18:46 +08:00
|
|
|
if (locked)
|
|
|
|
|
spin_unlock(&up->port.lock);
|
|
|
|
|
local_irq_restore(flags);
|
2013-01-23 09:52:25 +08:00
|
|
|
clk_disable(up->clk);
|
2012-06-14 12:18:46 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2012-10-21 12:00:30 +08:00
|
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
|
|
|
/*
|
|
|
|
|
* Console polling routines for writing and reading from the uart while
|
|
|
|
|
* in an interrupt or debug context.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
static int serial_pxa_get_poll_char(struct uart_port *port)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
unsigned char lsr = serial_in(up, UART_LSR);
|
|
|
|
|
|
|
|
|
|
while (!(lsr & UART_LSR_DR))
|
|
|
|
|
lsr = serial_in(up, UART_LSR);
|
|
|
|
|
|
|
|
|
|
return serial_in(up, UART_RX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void serial_pxa_put_poll_char(struct uart_port *port,
|
|
|
|
|
unsigned char c)
|
|
|
|
|
{
|
|
|
|
|
unsigned int ier;
|
|
|
|
|
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* First save the IER then disable the interrupts
|
|
|
|
|
*/
|
|
|
|
|
ier = serial_in(up, UART_IER);
|
|
|
|
|
serial_out(up, UART_IER, UART_IER_UUE);
|
|
|
|
|
|
|
|
|
|
wait_for_xmitr(up);
|
|
|
|
|
/*
|
|
|
|
|
* Send the character out.
|
|
|
|
|
*/
|
|
|
|
|
serial_out(up, UART_TX, c);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Finally, wait for transmitter to become empty
|
|
|
|
|
* and restore the IER
|
|
|
|
|
*/
|
|
|
|
|
wait_for_xmitr(up);
|
|
|
|
|
serial_out(up, UART_IER, ier);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif /* CONFIG_CONSOLE_POLL */
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
static int __init
|
|
|
|
|
serial_pxa_console_setup(struct console *co, char *options)
|
|
|
|
|
{
|
|
|
|
|
struct uart_pxa_port *up;
|
|
|
|
|
int baud = 9600;
|
|
|
|
|
int bits = 8;
|
|
|
|
|
int parity = 'n';
|
|
|
|
|
int flow = 'n';
|
|
|
|
|
|
|
|
|
|
if (co->index == -1 || co->index >= serial_pxa_reg.nr)
|
|
|
|
|
co->index = 0;
|
2007-08-20 16:47:41 +08:00
|
|
|
up = serial_pxa_ports[co->index];
|
|
|
|
|
if (!up)
|
|
|
|
|
return -ENODEV;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
if (options)
|
|
|
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
|
|
|
|
|
|
return uart_set_options(&up->port, co, baud, parity, bits, flow);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct console serial_pxa_console = {
|
|
|
|
|
.name = "ttyS",
|
|
|
|
|
.write = serial_pxa_console_write,
|
|
|
|
|
.device = uart_console_device,
|
|
|
|
|
.setup = serial_pxa_console_setup,
|
|
|
|
|
.flags = CON_PRINTBUFFER,
|
|
|
|
|
.index = -1,
|
|
|
|
|
.data = &serial_pxa_reg,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define PXA_CONSOLE &serial_pxa_console
|
|
|
|
|
#else
|
|
|
|
|
#define PXA_CONSOLE NULL
|
|
|
|
|
#endif
|
|
|
|
|
|
2017-01-26 01:48:52 +08:00
|
|
|
static const struct uart_ops serial_pxa_pops = {
|
2005-04-17 06:20:36 +08:00
|
|
|
.tx_empty = serial_pxa_tx_empty,
|
|
|
|
|
.set_mctrl = serial_pxa_set_mctrl,
|
|
|
|
|
.get_mctrl = serial_pxa_get_mctrl,
|
|
|
|
|
.stop_tx = serial_pxa_stop_tx,
|
|
|
|
|
.start_tx = serial_pxa_start_tx,
|
|
|
|
|
.stop_rx = serial_pxa_stop_rx,
|
|
|
|
|
.enable_ms = serial_pxa_enable_ms,
|
|
|
|
|
.break_ctl = serial_pxa_break_ctl,
|
|
|
|
|
.startup = serial_pxa_startup,
|
|
|
|
|
.shutdown = serial_pxa_shutdown,
|
|
|
|
|
.set_termios = serial_pxa_set_termios,
|
|
|
|
|
.pm = serial_pxa_pm,
|
|
|
|
|
.type = serial_pxa_type,
|
|
|
|
|
.release_port = serial_pxa_release_port,
|
|
|
|
|
.request_port = serial_pxa_request_port,
|
|
|
|
|
.config_port = serial_pxa_config_port,
|
|
|
|
|
.verify_port = serial_pxa_verify_port,
|
2014-02-18 23:14:20 +08:00
|
|
|
#if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
|
2012-10-21 12:00:30 +08:00
|
|
|
.poll_get_char = serial_pxa_get_poll_char,
|
|
|
|
|
.poll_put_char = serial_pxa_put_poll_char,
|
|
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct uart_driver serial_pxa_reg = {
|
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
|
.driver_name = "PXA serial",
|
|
|
|
|
.dev_name = "ttyS",
|
|
|
|
|
.major = TTY_MAJOR,
|
|
|
|
|
.minor = 64,
|
2007-08-20 16:47:41 +08:00
|
|
|
.nr = 4,
|
2005-04-17 06:20:36 +08:00
|
|
|
.cons = PXA_CONSOLE,
|
|
|
|
|
};
|
|
|
|
|
|
2009-07-21 22:48:43 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
static int serial_pxa_suspend(struct device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2009-07-21 22:48:43 +08:00
|
|
|
struct uart_pxa_port *sport = dev_get_drvdata(dev);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2005-10-29 00:52:56 +08:00
|
|
|
if (sport)
|
2005-04-17 06:20:36 +08:00
|
|
|
uart_suspend_port(&serial_pxa_reg, &sport->port);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2009-07-21 22:48:43 +08:00
|
|
|
static int serial_pxa_resume(struct device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2009-07-21 22:48:43 +08:00
|
|
|
struct uart_pxa_port *sport = dev_get_drvdata(dev);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2005-10-29 00:52:56 +08:00
|
|
|
if (sport)
|
2005-04-17 06:20:36 +08:00
|
|
|
uart_resume_port(&serial_pxa_reg, &sport->port);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2009-12-15 10:00:08 +08:00
|
|
|
static const struct dev_pm_ops serial_pxa_pm_ops = {
|
2009-07-21 22:48:43 +08:00
|
|
|
.suspend = serial_pxa_suspend,
|
|
|
|
|
.resume = serial_pxa_resume,
|
|
|
|
|
};
|
|
|
|
|
#endif
|
|
|
|
|
|
2015-03-17 03:17:11 +08:00
|
|
|
static const struct of_device_id serial_pxa_dt_ids[] = {
|
2012-02-29 16:09:05 +08:00
|
|
|
{ .compatible = "mrvl,pxa-uart", },
|
|
|
|
|
{ .compatible = "mrvl,mmp-uart", },
|
|
|
|
|
{}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int serial_pxa_probe_dt(struct platform_device *pdev,
|
|
|
|
|
struct uart_pxa_port *sport)
|
|
|
|
|
{
|
|
|
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
if (!np)
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
ret = of_alias_get_id(np, "serial");
|
|
|
|
|
if (ret < 0) {
|
|
|
|
|
dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
sport->port.line = ret;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static int serial_pxa_probe(struct platform_device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2007-08-20 16:47:41 +08:00
|
|
|
struct uart_pxa_port *sport;
|
|
|
|
|
struct resource *mmres, *irqres;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
|
|
|
irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
|
|
|
|
|
if (!mmres || !irqres)
|
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
|
|
sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
|
|
|
|
|
if (!sport)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2008-11-12 01:52:32 +08:00
|
|
|
sport->clk = clk_get(&dev->dev, NULL);
|
2007-08-20 17:28:15 +08:00
|
|
|
if (IS_ERR(sport->clk)) {
|
|
|
|
|
ret = PTR_ERR(sport->clk);
|
|
|
|
|
goto err_free;
|
|
|
|
|
}
|
|
|
|
|
|
2013-01-23 09:52:25 +08:00
|
|
|
ret = clk_prepare(sport->clk);
|
|
|
|
|
if (ret) {
|
|
|
|
|
clk_put(sport->clk);
|
|
|
|
|
goto err_free;
|
|
|
|
|
}
|
|
|
|
|
|
2007-08-20 16:47:41 +08:00
|
|
|
sport->port.type = PORT_PXA;
|
|
|
|
|
sport->port.iotype = UPIO_MEM;
|
|
|
|
|
sport->port.mapbase = mmres->start;
|
|
|
|
|
sport->port.irq = irqres->start;
|
|
|
|
|
sport->port.fifosize = 64;
|
|
|
|
|
sport->port.ops = &serial_pxa_pops;
|
|
|
|
|
sport->port.dev = &dev->dev;
|
|
|
|
|
sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
|
2007-08-20 17:28:15 +08:00
|
|
|
sport->port.uartclk = clk_get_rate(sport->clk);
|
2019-12-13 08:06:33 +08:00
|
|
|
sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PXA_CONSOLE);
|
2007-08-20 16:47:41 +08:00
|
|
|
|
2012-02-29 16:09:05 +08:00
|
|
|
ret = serial_pxa_probe_dt(dev, sport);
|
|
|
|
|
if (ret > 0)
|
|
|
|
|
sport->port.line = dev->id;
|
|
|
|
|
else if (ret < 0)
|
|
|
|
|
goto err_clk;
|
2018-02-23 21:38:33 +08:00
|
|
|
if (sport->port.line >= ARRAY_SIZE(serial_pxa_ports)) {
|
|
|
|
|
dev_err(&dev->dev, "serial%d out of range\n", sport->port.line);
|
2018-06-12 01:30:35 +08:00
|
|
|
ret = -EINVAL;
|
|
|
|
|
goto err_clk;
|
2018-02-23 21:38:33 +08:00
|
|
|
}
|
2012-02-29 16:09:05 +08:00
|
|
|
snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
|
2007-08-20 16:47:41 +08:00
|
|
|
|
2011-06-10 00:13:32 +08:00
|
|
|
sport->port.membase = ioremap(mmres->start, resource_size(mmres));
|
2007-08-20 16:47:41 +08:00
|
|
|
if (!sport->port.membase) {
|
|
|
|
|
ret = -ENOMEM;
|
2007-08-20 17:28:15 +08:00
|
|
|
goto err_clk;
|
2007-08-20 16:47:41 +08:00
|
|
|
}
|
|
|
|
|
|
2012-02-29 16:09:05 +08:00
|
|
|
serial_pxa_ports[sport->port.line] = sport;
|
2007-08-20 16:47:41 +08:00
|
|
|
|
|
|
|
|
uart_add_one_port(&serial_pxa_reg, &sport->port);
|
|
|
|
|
platform_set_drvdata(dev, sport);
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
2007-08-20 16:47:41 +08:00
|
|
|
|
2007-08-20 17:28:15 +08:00
|
|
|
err_clk:
|
2013-01-23 09:52:25 +08:00
|
|
|
clk_unprepare(sport->clk);
|
2007-08-20 17:28:15 +08:00
|
|
|
clk_put(sport->clk);
|
2007-08-20 16:47:41 +08:00
|
|
|
err_free:
|
|
|
|
|
kfree(sport);
|
|
|
|
|
return ret;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static struct platform_driver serial_pxa_driver = {
|
2005-04-17 06:20:36 +08:00
|
|
|
.probe = serial_pxa_probe,
|
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
.driver = {
|
|
|
|
|
.name = "pxa2xx-uart",
|
2009-07-21 22:48:43 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
.pm = &serial_pxa_pm_ops,
|
|
|
|
|
#endif
|
2016-06-21 06:55:03 +08:00
|
|
|
.suppress_bind_attrs = true,
|
2012-02-29 16:09:05 +08:00
|
|
|
.of_match_table = serial_pxa_dt_ids,
|
2005-11-10 06:32:44 +08:00
|
|
|
},
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
|
2016-09-28 00:23:16 +08:00
|
|
|
|
|
|
|
|
/* 8250 driver for PXA serial ports should be used */
|
2016-11-08 22:50:41 +08:00
|
|
|
static int __init serial_pxa_init(void)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
ret = uart_register_driver(&serial_pxa_reg);
|
|
|
|
|
if (ret != 0)
|
|
|
|
|
return ret;
|
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
ret = platform_driver_register(&serial_pxa_driver);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (ret != 0)
|
|
|
|
|
uart_unregister_driver(&serial_pxa_reg);
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
2016-06-21 06:55:03 +08:00
|
|
|
device_initcall(serial_pxa_init);
|