2019-05-20 15:19:02 +08:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2005-04-26 04:43:25 +08:00
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/*
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2012-01-20 03:02:27 +08:00
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* w83627ehf - Driver for the hardware monitoring functionality of
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* the Winbond W83627EHF Super-I/O chip
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2014-01-30 03:40:08 +08:00
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* Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
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2012-01-20 03:02:27 +08:00
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* Copyright (C) 2006 Yuan Mu (Winbond),
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* Rudolf Marek <r.marek@assembler.cz>
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* David Hubbard <david.c.hubbard@gmail.com>
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* Daniel J Blueman <daniel.blueman@gmail.com>
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* Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
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*
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* Shamelessly ripped from the w83627hf driver
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* Copyright (C) 2003 Mark Studebaker
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*
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* Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
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* in testing and debugging this driver.
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*
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* This driver also supports the W83627EHG, which is the lead-free
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* version of the W83627EHF.
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*
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* Supports the following chips:
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*
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* Chip #vin #fan #pwm #temp chip IDs man ID
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* w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
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* 0x8860 0xa1
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* w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
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* w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
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* w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3
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* w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
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* w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
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*/
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2005-04-26 04:43:25 +08:00
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2010-10-20 14:51:54 +08:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2005-04-26 04:43:25 +08:00
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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2007-06-24 17:16:15 +08:00
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#include <linux/jiffies.h>
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#include <linux/platform_device.h>
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2005-07-16 09:39:18 +08:00
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#include <linux/hwmon.h>
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2006-02-06 06:24:16 +08:00
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#include <linux/hwmon-sysfs.h>
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2007-06-24 17:19:42 +08:00
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#include <linux/hwmon-vid.h>
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2005-07-16 09:39:18 +08:00
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#include <linux/err.h>
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2006-01-19 06:19:26 +08:00
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#include <linux/mutex.h>
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2009-01-07 23:37:35 +08:00
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#include <linux/acpi.h>
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2009-09-15 23:18:13 +08:00
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#include <linux/io.h>
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2005-04-26 04:43:25 +08:00
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#include "lm75.h"
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2011-11-04 19:00:48 +08:00
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enum kinds {
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w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
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2019-12-25 10:32:23 +08:00
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w83667hg, w83667hg_b,
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2011-11-04 19:00:48 +08:00
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};
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2005-04-26 04:43:25 +08:00
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2007-06-24 17:16:15 +08:00
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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
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2011-02-05 05:24:30 +08:00
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static const char * const w83627ehf_device_names[] = {
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2007-06-24 17:16:15 +08:00
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"w83627ehf",
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"w83627dhg",
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2009-06-16 00:39:50 +08:00
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"w83627dhg",
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2011-11-04 19:00:48 +08:00
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"w83627uhg",
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2009-03-31 03:46:42 +08:00
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"w83667hg",
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2010-08-15 03:08:55 +08:00
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"w83667hg",
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2007-06-24 17:16:15 +08:00
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};
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2007-12-07 06:13:42 +08:00
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static unsigned short force_id;
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module_param(force_id, ushort, 0);
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MODULE_PARM_DESC(force_id, "Override the detected device ID");
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2007-06-24 17:16:15 +08:00
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#define DRVNAME "w83627ehf"
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2005-04-26 04:43:25 +08:00
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2007-02-15 04:15:04 +08:00
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/*
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2007-06-24 17:16:15 +08:00
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* Super-I/O constants and functions
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2007-02-15 04:15:04 +08:00
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*/
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2005-04-26 04:43:25 +08:00
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#define W83627EHF_LD_HWM 0x0b
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2011-02-05 05:24:30 +08:00
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#define W83667HG_LD_VID 0x0d
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2005-04-26 04:43:25 +08:00
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#define SIO_REG_LDSEL 0x07 /* Logical device select */
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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
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2007-06-24 17:19:42 +08:00
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#define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
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2005-04-26 04:43:25 +08:00
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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2007-06-24 17:19:42 +08:00
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#define SIO_REG_VID_CTRL 0xF0 /* VID control */
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#define SIO_REG_VID_DATA 0xF1 /* VID data */
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2005-04-26 04:43:25 +08:00
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2007-02-15 04:15:04 +08:00
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#define SIO_W83627EHF_ID 0x8850
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#define SIO_W83627EHG_ID 0x8860
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#define SIO_W83627DHG_ID 0xa020
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2009-06-16 00:39:50 +08:00
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#define SIO_W83627DHG_P_ID 0xb070
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2011-11-04 19:00:48 +08:00
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#define SIO_W83627UHG_ID 0xa230
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2011-02-05 05:24:30 +08:00
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#define SIO_W83667HG_ID 0xa510
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2010-08-15 03:08:55 +08:00
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#define SIO_W83667HG_B_ID 0xb350
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2007-02-15 04:15:04 +08:00
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#define SIO_ID_MASK 0xFFF0
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2005-04-26 04:43:25 +08:00
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static inline void
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2007-06-24 17:16:15 +08:00
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superio_outb(int ioreg, int reg, int val)
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2005-04-26 04:43:25 +08:00
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{
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2007-06-24 17:16:15 +08:00
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outb(reg, ioreg);
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outb(val, ioreg + 1);
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2005-04-26 04:43:25 +08:00
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}
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static inline int
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2007-06-24 17:16:15 +08:00
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superio_inb(int ioreg, int reg)
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2005-04-26 04:43:25 +08:00
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{
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2007-06-24 17:16:15 +08:00
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outb(reg, ioreg);
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return inb(ioreg + 1);
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2005-04-26 04:43:25 +08:00
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}
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static inline void
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2007-06-24 17:16:15 +08:00
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superio_select(int ioreg, int ld)
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2005-04-26 04:43:25 +08:00
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{
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2007-06-24 17:16:15 +08:00
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outb(SIO_REG_LDSEL, ioreg);
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outb(ld, ioreg + 1);
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2005-04-26 04:43:25 +08:00
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}
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2017-02-22 12:32:10 +08:00
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static inline int
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2007-06-24 17:16:15 +08:00
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superio_enter(int ioreg)
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2005-04-26 04:43:25 +08:00
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{
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2017-02-22 12:32:10 +08:00
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if (!request_muxed_region(ioreg, 2, DRVNAME))
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return -EBUSY;
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2007-06-24 17:16:15 +08:00
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outb(0x87, ioreg);
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outb(0x87, ioreg);
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2017-02-22 12:32:10 +08:00
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return 0;
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2005-04-26 04:43:25 +08:00
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}
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static inline void
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2007-06-24 17:16:15 +08:00
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superio_exit(int ioreg)
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2005-04-26 04:43:25 +08:00
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{
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2010-09-17 23:24:13 +08:00
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outb(0xaa, ioreg);
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2007-06-24 17:16:15 +08:00
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outb(0x02, ioreg);
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outb(0x02, ioreg + 1);
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2017-02-22 12:32:10 +08:00
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release_region(ioreg, 2);
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2005-04-26 04:43:25 +08:00
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}
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/*
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* ISA constants
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*/
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2011-02-05 05:24:30 +08:00
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#define IOREGION_ALIGNMENT (~7)
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2007-04-24 05:41:16 +08:00
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#define IOREGION_OFFSET 5
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#define IOREGION_LENGTH 2
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2007-06-24 17:16:15 +08:00
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#define ADDR_REG_OFFSET 0
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#define DATA_REG_OFFSET 1
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2005-04-26 04:43:25 +08:00
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#define W83627EHF_REG_BANK 0x4E
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#define W83627EHF_REG_CONFIG 0x40
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2007-02-15 04:15:04 +08:00
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2012-01-20 03:02:27 +08:00
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/*
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* Not currently used:
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2007-02-15 04:15:04 +08:00
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* REG_MAN_ID has the value 0x5ca3 for all supported chips.
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* REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
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* REG_MAN_ID is at port 0x4f
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2012-01-20 03:02:27 +08:00
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* REG_CHIP_ID is at port 0x58
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*/
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2005-04-26 04:43:25 +08:00
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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
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static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
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2006-03-23 23:25:22 +08:00
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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */
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#define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
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(0x554 + (((nr) - 7) * 2)))
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#define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
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(0x555 + (((nr) - 7) * 2)))
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#define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
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(0x550 + (nr) - 7))
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2011-02-08 07:08:54 +08:00
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static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
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static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
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static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
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static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
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2005-04-26 04:43:25 +08:00
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/* Fan clock dividers are spread over the following five registers */
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#define W83627EHF_REG_FANDIV1 0x47
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#define W83627EHF_REG_FANDIV2 0x4B
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#define W83627EHF_REG_VBAT 0x5D
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#define W83627EHF_REG_DIODE 0x59
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#define W83627EHF_REG_SMI_OVT 0x4C
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2006-03-23 23:30:29 +08:00
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#define W83627EHF_REG_ALARM1 0x459
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#define W83627EHF_REG_ALARM2 0x45A
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#define W83627EHF_REG_ALARM3 0x45B
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2011-08-13 04:41:11 +08:00
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#define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */
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#define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */
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2006-07-06 00:14:31 +08:00
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/* SmartFan registers */
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2009-12-15 10:01:37 +08:00
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#define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
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#define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
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2006-07-06 00:14:31 +08:00
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/* DC or PWM output fan configuration */
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static const u8 W83627EHF_REG_PWM_ENABLE[] = {
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0x04, /* SYS FAN0 output mode and PWM mode */
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0x04, /* CPU FAN0 output mode and PWM mode */
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0x12, /* AUX FAN mode */
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2009-12-15 10:01:37 +08:00
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0x62, /* CPU FAN1 mode */
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2006-07-06 00:14:31 +08:00
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};
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static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
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static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
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/* FAN Duty Cycle, be used to control */
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2011-02-14 14:34:47 +08:00
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static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
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static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
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2006-07-06 00:14:31 +08:00
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static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
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/* Advanced Fan control, some values are common for all fans */
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2011-02-14 14:34:47 +08:00
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static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
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static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
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static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
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2010-08-15 03:08:55 +08:00
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2011-02-14 14:34:47 +08:00
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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
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2010-08-15 03:08:55 +08:00
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= { 0xff, 0x67, 0xff, 0x69 };
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2011-02-14 14:34:47 +08:00
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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
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2010-08-15 03:08:55 +08:00
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= { 0xff, 0x68, 0xff, 0x6a };
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2011-02-14 14:34:47 +08:00
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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
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= { 0x68, 0x6a, 0x6c };
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2006-07-06 00:14:31 +08:00
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2012-02-09 01:29:11 +08:00
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static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
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2011-02-08 07:08:54 +08:00
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static const char *const w83667hg_b_temp_label[] = {
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"SYSTIN",
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"CPUTIN",
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"AUXTIN",
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"AMDTSI",
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"PECI Agent 1",
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"PECI Agent 2",
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"PECI Agent 3",
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"PECI Agent 4"
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};
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2019-12-25 10:32:23 +08:00
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#define NUM_REG_TEMP ARRAY_SIZE(W83627EHF_REG_TEMP)
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2011-02-08 07:08:54 +08:00
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2011-10-20 15:08:27 +08:00
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static int is_word_sized(u16 reg)
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2011-02-05 04:54:14 +08:00
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{
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2011-02-03 00:46:49 +08:00
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return ((((reg & 0xff00) == 0x100
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2011-02-05 04:54:14 +08:00
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|| (reg & 0xff00) == 0x200)
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&& ((reg & 0x00ff) == 0x50
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|| (reg & 0x00ff) == 0x53
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2011-02-03 00:46:49 +08:00
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|| (reg & 0x00ff) == 0x55))
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|| (reg & 0xfff0) == 0x630
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|| reg == 0x640 || reg == 0x642
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|| ((reg & 0xfff0) == 0x650
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&& (reg & 0x000f) >= 0x06)
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|| reg == 0x73 || reg == 0x75 || reg == 0x77
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);
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2011-02-05 04:54:14 +08:00
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}
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2005-04-26 04:43:25 +08:00
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|
/*
|
|
|
|
* Conversions
|
|
|
|
*/
|
|
|
|
|
2006-07-06 00:14:31 +08:00
|
|
|
/* 1 is PWM mode, output in ms */
|
|
|
|
static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
|
|
|
|
{
|
|
|
|
return mode ? 100 * reg : 400 * reg;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
|
|
|
|
{
|
2013-01-10 00:09:34 +08:00
|
|
|
return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),
|
|
|
|
1, 255);
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
2011-02-12 00:00:58 +08:00
|
|
|
static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
2011-02-12 00:00:58 +08:00
|
|
|
if (reg == 0 || reg == 255)
|
2005-04-26 04:43:25 +08:00
|
|
|
return 0;
|
2011-02-12 00:00:58 +08:00
|
|
|
return 1350000U / (reg << divreg);
|
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
static inline unsigned int
|
|
|
|
div_from_reg(u8 reg)
|
|
|
|
{
|
|
|
|
return 1 << reg;
|
|
|
|
}
|
|
|
|
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Some of the voltage inputs have internal scaling, the tables below
|
|
|
|
* contain 8 (the ADC LSB in mV) * scaling factor * 100
|
|
|
|
*/
|
2011-11-04 19:00:48 +08:00
|
|
|
static const u16 scale_in_common[10] = {
|
|
|
|
800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
|
|
|
|
};
|
|
|
|
static const u16 scale_in_w83627uhg[9] = {
|
|
|
|
800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
|
|
|
|
};
|
2006-03-23 23:25:22 +08:00
|
|
|
|
2011-11-04 19:00:48 +08:00
|
|
|
static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
|
2006-03-23 23:25:22 +08:00
|
|
|
{
|
2011-11-04 19:00:48 +08:00
|
|
|
return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
|
2006-03-23 23:25:22 +08:00
|
|
|
}
|
|
|
|
|
2011-11-04 19:00:48 +08:00
|
|
|
static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
|
2006-03-23 23:25:22 +08:00
|
|
|
{
|
2013-01-10 00:09:34 +08:00
|
|
|
return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
|
2006-03-23 23:25:22 +08:00
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
/*
|
|
|
|
* Data structures and manipulation thereof
|
|
|
|
*/
|
|
|
|
|
|
|
|
struct w83627ehf_data {
|
2007-06-24 17:16:15 +08:00
|
|
|
int addr; /* IO base of hw monitor block */
|
|
|
|
const char *name;
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
struct mutex lock;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
u16 reg_temp[NUM_REG_TEMP];
|
|
|
|
u16 reg_temp_over[NUM_REG_TEMP];
|
|
|
|
u16 reg_temp_hyst[NUM_REG_TEMP];
|
|
|
|
u16 reg_temp_config[NUM_REG_TEMP];
|
2011-02-08 07:08:54 +08:00
|
|
|
u8 temp_src[NUM_REG_TEMP];
|
|
|
|
const char * const *temp_label;
|
|
|
|
|
2011-02-14 14:34:47 +08:00
|
|
|
const u16 *REG_FAN_MAX_OUTPUT;
|
|
|
|
const u16 *REG_FAN_STEP_OUTPUT;
|
2011-11-04 19:00:48 +08:00
|
|
|
const u16 *scale_in;
|
2010-08-15 03:08:55 +08:00
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
struct mutex update_lock;
|
2005-04-26 04:43:25 +08:00
|
|
|
char valid; /* !=0 if following fields are valid */
|
|
|
|
unsigned long last_updated; /* In jiffies */
|
|
|
|
|
|
|
|
/* Register values */
|
2011-02-07 00:10:15 +08:00
|
|
|
u8 bank; /* current register bank */
|
2007-06-24 17:16:15 +08:00
|
|
|
u8 in_num; /* number of in inputs we have */
|
2006-03-23 23:25:22 +08:00
|
|
|
u8 in[10]; /* Register value */
|
|
|
|
u8 in_max[10]; /* Register value */
|
|
|
|
u8 in_min[10]; /* Register value */
|
2011-02-14 05:08:23 +08:00
|
|
|
unsigned int rpm[5];
|
2011-02-03 00:46:49 +08:00
|
|
|
u16 fan_min[5];
|
2005-04-26 04:43:25 +08:00
|
|
|
u8 fan_div[5];
|
|
|
|
u8 has_fan; /* some fan inputs can be disabled */
|
2011-02-03 00:46:49 +08:00
|
|
|
u8 has_fan_min; /* some fans don't have min register */
|
2007-06-24 17:21:02 +08:00
|
|
|
u8 temp_type[3];
|
2012-02-09 01:29:11 +08:00
|
|
|
s8 temp_offset[3];
|
2011-02-03 00:46:49 +08:00
|
|
|
s16 temp[9];
|
|
|
|
s16 temp_max[9];
|
|
|
|
s16 temp_max_hyst[9];
|
2006-03-23 23:30:29 +08:00
|
|
|
u32 alarms;
|
2011-08-13 04:41:11 +08:00
|
|
|
u8 caseopen;
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
|
|
|
|
u8 pwm_enable[4]; /* 1->manual
|
2012-01-20 03:02:27 +08:00
|
|
|
* 2->thermal cruise mode (also called SmartFan I)
|
|
|
|
* 3->fan speed cruise mode
|
|
|
|
* 4->variable thermal cruise (also called
|
|
|
|
* SmartFan III)
|
|
|
|
* 5->enhanced variable thermal cruise (also called
|
|
|
|
* SmartFan IV)
|
|
|
|
*/
|
2011-02-14 15:01:25 +08:00
|
|
|
u8 pwm_enable_orig[4]; /* original value of pwm_enable */
|
2009-03-31 03:46:42 +08:00
|
|
|
u8 pwm_num; /* number of pwm */
|
2006-07-06 00:14:31 +08:00
|
|
|
u8 pwm[4];
|
|
|
|
u8 target_temp[4];
|
|
|
|
u8 tolerance[4];
|
|
|
|
|
2009-12-15 10:01:37 +08:00
|
|
|
u8 fan_start_output[4]; /* minimum fan speed when spinning up */
|
|
|
|
u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
|
|
|
|
u8 fan_stop_time[4]; /* time at minimum before disabling fan */
|
|
|
|
u8 fan_max_output[4]; /* maximum fan speed */
|
|
|
|
u8 fan_step_output[4]; /* rate of change output value */
|
2007-06-24 17:19:42 +08:00
|
|
|
|
|
|
|
u8 vid;
|
|
|
|
u8 vrm;
|
2009-03-31 03:46:43 +08:00
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
u16 have_temp;
|
2012-02-09 01:29:11 +08:00
|
|
|
u16 have_temp_offset;
|
2011-11-04 19:00:48 +08:00
|
|
|
u8 in6_skip:1;
|
|
|
|
u8 temp3_val_only:1;
|
2019-11-25 04:20:30 +08:00
|
|
|
u8 have_vid:1;
|
2012-12-20 05:16:59 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
/* Remember extra register values over suspend/resume */
|
|
|
|
u8 vbat;
|
|
|
|
u8 fandiv1;
|
|
|
|
u8 fandiv2;
|
|
|
|
#endif
|
2005-04-26 04:43:25 +08:00
|
|
|
};
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_sio_data {
|
|
|
|
int sioreg;
|
|
|
|
enum kinds kind;
|
|
|
|
};
|
|
|
|
|
2011-02-07 00:10:15 +08:00
|
|
|
/*
|
|
|
|
* On older chips, only registers 0x50-0x5f are banked.
|
|
|
|
* On more recent chips, all registers are banked.
|
|
|
|
* Assume that is the case and set the bank number for each access.
|
|
|
|
* Cache the bank number so it only needs to be set if it changes.
|
|
|
|
*/
|
2007-06-24 17:16:15 +08:00
|
|
|
static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
2011-02-07 00:10:15 +08:00
|
|
|
u8 bank = reg >> 8;
|
|
|
|
if (data->bank != bank) {
|
2007-06-24 17:16:15 +08:00
|
|
|
outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
|
2011-02-07 00:10:15 +08:00
|
|
|
outb_p(bank, data->addr + DATA_REG_OFFSET);
|
|
|
|
data->bank = bank;
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
|
|
|
int res, word_sized = is_word_sized(reg);
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_lock(&data->lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_set_bank(data, reg);
|
|
|
|
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
|
|
|
|
res = inb_p(data->addr + DATA_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
if (word_sized) {
|
|
|
|
outb_p((reg & 0xff) + 1,
|
2007-06-24 17:16:15 +08:00
|
|
|
data->addr + ADDR_REG_OFFSET);
|
|
|
|
res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_unlock(&data->lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2011-02-05 05:24:30 +08:00
|
|
|
static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
|
|
|
|
u16 value)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
|
|
|
int word_sized = is_word_sized(reg);
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_lock(&data->lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_set_bank(data, reg);
|
|
|
|
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
if (word_sized) {
|
2007-06-24 17:16:15 +08:00
|
|
|
outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
outb_p((reg & 0xff) + 1,
|
2007-06-24 17:16:15 +08:00
|
|
|
data->addr + ADDR_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
2007-06-24 17:16:15 +08:00
|
|
|
outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_unlock(&data->lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-10-20 15:13:31 +08:00
|
|
|
/* We left-align 8-bit temperature values to make the code simpler */
|
|
|
|
static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
|
|
|
|
{
|
|
|
|
u16 res;
|
|
|
|
|
|
|
|
res = w83627ehf_read_value(data, reg);
|
|
|
|
if (!is_word_sized(reg))
|
|
|
|
res <<= 8;
|
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
|
|
|
|
u16 value)
|
|
|
|
{
|
|
|
|
if (!is_word_sized(reg))
|
|
|
|
value >>= 8;
|
|
|
|
return w83627ehf_write_value(data, reg, value);
|
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
/* This function assumes that the caller holds data->update_lock */
|
2007-06-24 17:16:15 +08:00
|
|
|
static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
|
|
|
u8 reg;
|
|
|
|
|
|
|
|
switch (nr) {
|
|
|
|
case 0:
|
2007-06-24 17:16:15 +08:00
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[0] & 0x03) << 4);
|
2006-10-09 04:02:09 +08:00
|
|
|
/* fan5 input control bit is write only, compute the value */
|
|
|
|
reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
|
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[0] & 0x04) << 3);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
|
2005-04-26 04:43:25 +08:00
|
|
|
break;
|
|
|
|
case 1:
|
2007-06-24 17:16:15 +08:00
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[1] & 0x03) << 6);
|
2006-10-09 04:02:09 +08:00
|
|
|
/* fan5 input control bit is write only, compute the value */
|
|
|
|
reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
|
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[1] & 0x04) << 4);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
|
2005-04-26 04:43:25 +08:00
|
|
|
break;
|
|
|
|
case 2:
|
2007-06-24 17:16:15 +08:00
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[2] & 0x03) << 6);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
|
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[2] & 0x04) << 5);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
|
2005-04-26 04:43:25 +08:00
|
|
|
break;
|
|
|
|
case 3:
|
2007-06-24 17:16:15 +08:00
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
|
2005-04-26 04:43:25 +08:00
|
|
|
| (data->fan_div[3] & 0x03);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
|
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[3] & 0x04) << 5);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
|
2005-04-26 04:43:25 +08:00
|
|
|
break;
|
|
|
|
case 4:
|
2007-06-24 17:16:15 +08:00
|
|
|
reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
|
2007-04-17 15:32:27 +08:00
|
|
|
| ((data->fan_div[4] & 0x03) << 2)
|
2005-04-26 04:43:25 +08:00
|
|
|
| ((data->fan_div[4] & 0x04) << 5);
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
|
2005-04-26 04:43:25 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-08-06 00:19:01 +08:00
|
|
|
static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
|
|
|
|
data->fan_div[0] = (i >> 4) & 0x03;
|
|
|
|
data->fan_div[1] = (i >> 6) & 0x03;
|
|
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
|
|
|
|
data->fan_div[2] = (i >> 6) & 0x03;
|
|
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
|
|
|
|
data->fan_div[0] |= (i >> 3) & 0x04;
|
|
|
|
data->fan_div[1] |= (i >> 4) & 0x04;
|
|
|
|
data->fan_div[2] |= (i >> 5) & 0x04;
|
|
|
|
if (data->has_fan & ((1 << 3) | (1 << 4))) {
|
|
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
|
|
|
|
data->fan_div[3] = i & 0x03;
|
|
|
|
data->fan_div[4] = ((i >> 2) & 0x03)
|
|
|
|
| ((i >> 5) & 0x04);
|
|
|
|
}
|
|
|
|
if (data->has_fan & (1 << 3)) {
|
|
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
|
|
|
|
data->fan_div[3] |= (i >> 5) & 0x04;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
static void w83627ehf_update_pwm(struct w83627ehf_data *data)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
|
|
|
|
|
|
|
|
for (i = 0; i < data->pwm_num; i++) {
|
|
|
|
if (!(data->has_fan & (1 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
|
|
|
|
if (i != 1) {
|
|
|
|
pwmcfg = w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_PWM_ENABLE[i]);
|
|
|
|
tolerance = w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_TOLERANCE[i]);
|
|
|
|
}
|
|
|
|
data->pwm_mode[i] =
|
|
|
|
((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
|
|
|
|
data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
|
|
|
|
& 3) + 1;
|
2019-12-25 10:32:24 +08:00
|
|
|
data->pwm[i] = w83627ehf_read_value(data, W83627EHF_REG_PWM[i]);
|
2011-02-03 00:46:49 +08:00
|
|
|
|
|
|
|
data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
|
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
2005-04-26 04:43:25 +08:00
|
|
|
int i;
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_lock(&data->update_lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:19:01 +08:00
|
|
|
if (time_after(jiffies, data->last_updated + HZ + HZ/2)
|
2005-04-26 04:43:25 +08:00
|
|
|
|| !data->valid) {
|
|
|
|
/* Fan clock dividers */
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_update_fan_div(data);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2006-03-23 23:25:22 +08:00
|
|
|
/* Measured voltages and limits */
|
2007-06-24 17:16:15 +08:00
|
|
|
for (i = 0; i < data->in_num; i++) {
|
2011-10-13 22:40:53 +08:00
|
|
|
if ((i == 6) && data->in6_skip)
|
|
|
|
continue;
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
data->in[i] = w83627ehf_read_value(data,
|
2006-03-23 23:25:22 +08:00
|
|
|
W83627EHF_REG_IN(i));
|
2007-06-24 17:16:15 +08:00
|
|
|
data->in_min[i] = w83627ehf_read_value(data,
|
2006-03-23 23:25:22 +08:00
|
|
|
W83627EHF_REG_IN_MIN(i));
|
2007-06-24 17:16:15 +08:00
|
|
|
data->in_max[i] = w83627ehf_read_value(data,
|
2006-03-23 23:25:22 +08:00
|
|
|
W83627EHF_REG_IN_MAX(i));
|
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
/* Measured fan speeds and limits */
|
|
|
|
for (i = 0; i < 5; i++) {
|
2011-02-14 05:08:23 +08:00
|
|
|
u16 reg;
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
if (!(data->has_fan & (1 << i)))
|
|
|
|
continue;
|
|
|
|
|
2019-12-25 10:32:24 +08:00
|
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_FAN[i]);
|
|
|
|
data->rpm[i] = fan_from_reg8(reg, data->fan_div[i]);
|
2011-02-03 00:46:49 +08:00
|
|
|
|
|
|
|
if (data->has_fan_min & (1 << i))
|
|
|
|
data->fan_min[i] = w83627ehf_read_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_FAN_MIN[i]);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* If we failed to measure the fan speed and clock
|
|
|
|
* divider can be increased, let's try that for next
|
|
|
|
* time
|
|
|
|
*/
|
2019-12-25 10:32:24 +08:00
|
|
|
if (reg >= 0xff && data->fan_div[i] < 0x07) {
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_dbg(dev,
|
|
|
|
"Increasing fan%d clock divider from %u to %u\n",
|
2007-04-17 15:32:27 +08:00
|
|
|
i + 1, div_from_reg(data->fan_div[i]),
|
2005-04-26 04:43:25 +08:00
|
|
|
div_from_reg(data->fan_div[i] + 1));
|
|
|
|
data->fan_div[i]++;
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_fan_div(data, i);
|
2005-04-26 04:43:25 +08:00
|
|
|
/* Preserve min limit if possible */
|
2011-02-03 00:46:49 +08:00
|
|
|
if ((data->has_fan_min & (1 << i))
|
|
|
|
&& data->fan_min[i] >= 2
|
2005-04-26 04:43:25 +08:00
|
|
|
&& data->fan_min[i] != 255)
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_FAN_MIN[i],
|
2005-04-26 04:43:25 +08:00
|
|
|
(data->fan_min[i] /= 2));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_update_pwm(data);
|
2011-02-03 00:46:49 +08:00
|
|
|
|
2010-08-15 03:08:55 +08:00
|
|
|
for (i = 0; i < data->pwm_num; i++) {
|
|
|
|
if (!(data->has_fan & (1 << i)))
|
|
|
|
continue;
|
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
data->fan_start_output[i] =
|
|
|
|
w83627ehf_read_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_FAN_START_OUTPUT[i]);
|
2011-02-03 00:46:49 +08:00
|
|
|
data->fan_stop_output[i] =
|
|
|
|
w83627ehf_read_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_FAN_STOP_OUTPUT[i]);
|
2011-02-03 00:46:49 +08:00
|
|
|
data->fan_stop_time[i] =
|
|
|
|
w83627ehf_read_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_FAN_STOP_TIME[i]);
|
2011-02-03 00:46:49 +08:00
|
|
|
|
|
|
|
if (data->REG_FAN_MAX_OUTPUT &&
|
|
|
|
data->REG_FAN_MAX_OUTPUT[i] != 0xff)
|
2010-08-15 03:08:55 +08:00
|
|
|
data->fan_max_output[i] =
|
|
|
|
w83627ehf_read_value(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->REG_FAN_MAX_OUTPUT[i]);
|
2010-08-15 03:08:55 +08:00
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
if (data->REG_FAN_STEP_OUTPUT &&
|
|
|
|
data->REG_FAN_STEP_OUTPUT[i] != 0xff)
|
2010-08-15 03:08:55 +08:00
|
|
|
data->fan_step_output[i] =
|
|
|
|
w83627ehf_read_value(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->REG_FAN_STEP_OUTPUT[i]);
|
2010-08-15 03:08:55 +08:00
|
|
|
|
2006-07-06 00:14:31 +08:00
|
|
|
data->target_temp[i] =
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_read_value(data,
|
2019-12-25 10:32:24 +08:00
|
|
|
W83627EHF_REG_TARGET[i]) &
|
2006-07-06 00:14:31 +08:00
|
|
|
(data->pwm_mode[i] == 1 ? 0x7f : 0xff);
|
|
|
|
}
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
/* Measured temperatures and limits */
|
2011-02-08 07:08:54 +08:00
|
|
|
for (i = 0; i < NUM_REG_TEMP; i++) {
|
|
|
|
if (!(data->have_temp & (1 << i)))
|
|
|
|
continue;
|
2011-10-20 15:13:31 +08:00
|
|
|
data->temp[i] = w83627ehf_read_temp(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->reg_temp[i]);
|
|
|
|
if (data->reg_temp_over[i])
|
|
|
|
data->temp_max[i]
|
2011-10-20 15:13:31 +08:00
|
|
|
= w83627ehf_read_temp(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->reg_temp_over[i]);
|
|
|
|
if (data->reg_temp_hyst[i])
|
|
|
|
data->temp_max_hyst[i]
|
2011-10-20 15:13:31 +08:00
|
|
|
= w83627ehf_read_temp(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->reg_temp_hyst[i]);
|
2012-12-20 05:17:00 +08:00
|
|
|
if (i > 2)
|
|
|
|
continue;
|
2012-02-09 01:29:11 +08:00
|
|
|
if (data->have_temp_offset & (1 << i))
|
|
|
|
data->temp_offset[i]
|
|
|
|
= w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_TEMP_OFFSET[i]);
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
data->alarms = w83627ehf_read_value(data,
|
2006-03-23 23:30:29 +08:00
|
|
|
W83627EHF_REG_ALARM1) |
|
2007-06-24 17:16:15 +08:00
|
|
|
(w83627ehf_read_value(data,
|
2006-03-23 23:30:29 +08:00
|
|
|
W83627EHF_REG_ALARM2) << 8) |
|
2007-06-24 17:16:15 +08:00
|
|
|
(w83627ehf_read_value(data,
|
2006-03-23 23:30:29 +08:00
|
|
|
W83627EHF_REG_ALARM3) << 16);
|
|
|
|
|
2011-08-13 04:41:11 +08:00
|
|
|
data->caseopen = w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_CASEOPEN_DET);
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
data->last_updated = jiffies;
|
|
|
|
data->valid = 1;
|
|
|
|
}
|
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
2006-03-23 23:25:22 +08:00
|
|
|
#define store_in_reg(REG, reg) \
|
2019-11-25 04:20:30 +08:00
|
|
|
static int \
|
|
|
|
store_in_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
|
|
|
|
long val) \
|
2006-03-23 23:25:22 +08:00
|
|
|
{ \
|
2019-11-25 04:20:30 +08:00
|
|
|
if (val < 0) \
|
|
|
|
return -EINVAL; \
|
2006-03-23 23:25:22 +08:00
|
|
|
mutex_lock(&data->update_lock); \
|
2019-11-25 04:20:30 +08:00
|
|
|
data->in_##reg[channel] = in_to_reg(val, channel, data->scale_in); \
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(channel), \
|
|
|
|
data->in_##reg[channel]); \
|
2006-03-23 23:25:22 +08:00
|
|
|
mutex_unlock(&data->update_lock); \
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0; \
|
2006-03-23 23:25:22 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
store_in_reg(MIN, min)
|
|
|
|
store_in_reg(MAX, max)
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
store_fan_min(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
|
|
|
unsigned int reg;
|
|
|
|
u8 new_div;
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
if (val < 0)
|
|
|
|
return -EINVAL;
|
2011-02-05 04:54:14 +08:00
|
|
|
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_lock(&data->update_lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
if (!val) {
|
|
|
|
/* No min limit, alarm disabled */
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_min[channel] = 255;
|
|
|
|
new_div = data->fan_div[channel]; /* No change */
|
|
|
|
dev_info(dev, "fan%u low limit and alarm disabled\n",
|
|
|
|
channel + 1);
|
2005-04-26 04:43:25 +08:00
|
|
|
} else if ((reg = 1350000U / val) >= 128 * 255) {
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Speed below this value cannot possibly be represented,
|
|
|
|
* even with the highest divider (128)
|
|
|
|
*/
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_min[channel] = 254;
|
2005-04-26 04:43:25 +08:00
|
|
|
new_div = 7; /* 128 == (1 << 7) */
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_warn(dev,
|
|
|
|
"fan%u low limit %lu below minimum %u, set to minimum\n",
|
2019-12-25 10:32:24 +08:00
|
|
|
channel + 1, val, fan_from_reg8(254, 7));
|
2005-04-26 04:43:25 +08:00
|
|
|
} else if (!reg) {
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Speed above this value cannot possibly be represented,
|
|
|
|
* even with the lowest divider (1)
|
|
|
|
*/
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_min[channel] = 1;
|
2005-04-26 04:43:25 +08:00
|
|
|
new_div = 0; /* 1 == (1 << 0) */
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_warn(dev,
|
|
|
|
"fan%u low limit %lu above maximum %u, set to maximum\n",
|
2019-12-25 10:32:24 +08:00
|
|
|
channel + 1, val, fan_from_reg8(1, 0));
|
2005-04-26 04:43:25 +08:00
|
|
|
} else {
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Automatically pick the best divider, i.e. the one such
|
|
|
|
* that the min limit will correspond to a register value
|
|
|
|
* in the 96..192 range
|
|
|
|
*/
|
2005-04-26 04:43:25 +08:00
|
|
|
new_div = 0;
|
|
|
|
while (reg > 192 && new_div < 7) {
|
|
|
|
reg >>= 1;
|
|
|
|
new_div++;
|
|
|
|
}
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_min[channel] = reg;
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Write both the fan clock divider (if it changed) and the new
|
|
|
|
* fan min (unconditionally)
|
|
|
|
*/
|
2019-11-25 04:20:30 +08:00
|
|
|
if (new_div != data->fan_div[channel]) {
|
2005-04-26 04:43:25 +08:00
|
|
|
dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
|
2019-11-25 04:20:30 +08:00
|
|
|
channel + 1, div_from_reg(data->fan_div[channel]),
|
2005-04-26 04:43:25 +08:00
|
|
|
div_from_reg(new_div));
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_div[channel] = new_div;
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_fan_div(data, channel);
|
2007-06-24 17:19:01 +08:00
|
|
|
/* Give the chip time to sample a new speed value */
|
|
|
|
data->last_updated = jiffies;
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
2019-12-25 10:32:24 +08:00
|
|
|
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[channel],
|
2019-11-25 04:20:30 +08:00
|
|
|
data->fan_min[channel]);
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
#define store_temp_reg(addr, reg) \
|
2019-11-25 04:20:30 +08:00
|
|
|
static int \
|
|
|
|
store_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
|
|
|
|
long val) \
|
2005-04-26 04:43:25 +08:00
|
|
|
{ \
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_lock(&data->update_lock); \
|
2019-11-25 04:20:30 +08:00
|
|
|
data->reg[channel] = LM75_TEMP_TO_REG(val); \
|
|
|
|
w83627ehf_write_temp(data, data->addr[channel], data->reg[channel]); \
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_unlock(&data->update_lock); \
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0; \
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
2011-02-03 00:46:49 +08:00
|
|
|
store_temp_reg(reg_temp_over, temp_max);
|
|
|
|
store_temp_reg(reg_temp_hyst, temp_max_hyst);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
store_temp_offset(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2012-02-09 01:29:11 +08:00
|
|
|
{
|
2013-01-10 00:09:34 +08:00
|
|
|
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
|
2012-02-09 01:29:11 +08:00
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
data->temp_offset[channel] = val;
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[channel], val);
|
2012-02-09 01:29:11 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
store_pwm_mode(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2006-07-06 00:14:31 +08:00
|
|
|
{
|
|
|
|
u16 reg;
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
if (val < 0 || val > 1)
|
2006-07-06 00:14:31 +08:00
|
|
|
return -EINVAL;
|
2012-01-28 09:56:06 +08:00
|
|
|
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_lock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[channel]);
|
|
|
|
data->pwm_mode[channel] = val;
|
|
|
|
reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[channel]);
|
2006-07-06 00:14:31 +08:00
|
|
|
if (!val)
|
2019-11-25 04:20:30 +08:00
|
|
|
reg |= 1 << W83627EHF_PWM_MODE_SHIFT[channel];
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], reg);
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
store_pwm(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2006-07-06 00:14:31 +08:00
|
|
|
{
|
2013-01-10 00:09:34 +08:00
|
|
|
val = clamp_val(val, 0, 255);
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
data->pwm[channel] = val;
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM[channel], val);
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
store_pwm_enable(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2006-07-06 00:14:31 +08:00
|
|
|
{
|
|
|
|
u16 reg;
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
if (!val || val < 0 ||
|
|
|
|
(val > 4 && val != data->pwm_enable_orig[channel]))
|
2006-07-06 00:14:31 +08:00
|
|
|
return -EINVAL;
|
2011-02-03 00:46:49 +08:00
|
|
|
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_lock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
data->pwm_enable[channel] = val;
|
2019-12-25 10:32:23 +08:00
|
|
|
reg = w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_PWM_ENABLE[channel]);
|
|
|
|
reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[channel]);
|
|
|
|
reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[channel];
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel],
|
|
|
|
reg);
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#define show_tol_temp(reg) \
|
|
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
|
|
char *buf) \
|
|
|
|
{ \
|
2019-11-25 04:20:30 +08:00
|
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
|
2011-02-05 05:24:30 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = \
|
|
|
|
to_sensor_dev_attr(attr); \
|
2006-07-06 00:14:31 +08:00
|
|
|
int nr = sensor_attr->index; \
|
2011-02-05 04:54:14 +08:00
|
|
|
return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
|
2006-07-06 00:14:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
show_tol_temp(tolerance)
|
|
|
|
show_tol_temp(target_temp)
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
store_target_temp(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
2006-07-06 00:14:31 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
|
|
int nr = sensor_attr->index;
|
2011-02-05 04:54:14 +08:00
|
|
|
long val;
|
|
|
|
int err;
|
|
|
|
|
2012-01-05 03:58:52 +08:00
|
|
|
err = kstrtol(buf, 10, &val);
|
2011-02-05 04:54:14 +08:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2013-01-10 00:09:34 +08:00
|
|
|
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
|
|
|
data->target_temp[nr] = val;
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
store_tolerance(struct device *dev, struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
2006-07-06 00:14:31 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
|
|
int nr = sensor_attr->index;
|
|
|
|
u16 reg;
|
2011-02-05 04:54:14 +08:00
|
|
|
long val;
|
|
|
|
int err;
|
|
|
|
|
2012-01-05 03:58:52 +08:00
|
|
|
err = kstrtol(buf, 10, &val);
|
2011-02-05 04:54:14 +08:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2006-07-06 00:14:31 +08:00
|
|
|
/* Limit the temp to 0C - 15C */
|
2013-01-10 00:09:34 +08:00
|
|
|
val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
2019-12-25 10:32:23 +08:00
|
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
|
|
|
|
if (nr == 1)
|
|
|
|
reg = (reg & 0x0f) | (val << 4);
|
|
|
|
else
|
2006-07-06 00:14:31 +08:00
|
|
|
reg = (reg & 0xf0) | val;
|
2019-12-25 10:32:23 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
|
2011-02-03 00:46:49 +08:00
|
|
|
data->tolerance[nr] = val;
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_target, 0644, show_target_temp,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_target_temp, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_target, 0644, show_target_temp,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_target_temp, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_target, 0644, show_target_temp,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_target_temp, 2);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_target, 0644, show_target_temp,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_target_temp, 3);
|
|
|
|
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_tolerance, 0644, show_tolerance,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_tolerance, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_tolerance, 0644, show_tolerance,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_tolerance, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_tolerance, 0644, show_tolerance,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_tolerance, 2);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_tolerance, 0644, show_tolerance,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_tolerance, 3);
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
/* Smart Fan registers */
|
|
|
|
|
|
|
|
#define fan_functions(reg, REG) \
|
|
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
|
|
char *buf) \
|
|
|
|
{ \
|
2019-11-25 04:20:30 +08:00
|
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
|
2011-02-05 05:24:30 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = \
|
|
|
|
to_sensor_dev_attr(attr); \
|
2006-07-06 00:14:31 +08:00
|
|
|
int nr = sensor_attr->index; \
|
|
|
|
return sprintf(buf, "%d\n", data->reg[nr]); \
|
2011-02-05 05:24:30 +08:00
|
|
|
} \
|
2006-07-06 00:14:31 +08:00
|
|
|
static ssize_t \
|
|
|
|
store_##reg(struct device *dev, struct device_attribute *attr, \
|
|
|
|
const char *buf, size_t count) \
|
2011-02-05 05:24:30 +08:00
|
|
|
{ \
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
2011-02-05 05:24:30 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = \
|
|
|
|
to_sensor_dev_attr(attr); \
|
2006-07-06 00:14:31 +08:00
|
|
|
int nr = sensor_attr->index; \
|
2011-02-05 04:54:14 +08:00
|
|
|
unsigned long val; \
|
|
|
|
int err; \
|
2012-01-05 03:58:52 +08:00
|
|
|
err = kstrtoul(buf, 10, &val); \
|
2011-02-05 04:54:14 +08:00
|
|
|
if (err < 0) \
|
|
|
|
return err; \
|
2013-01-10 00:09:34 +08:00
|
|
|
val = clamp_val(val, 1, 255); \
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_lock(&data->update_lock); \
|
|
|
|
data->reg[nr] = val; \
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_value(data, REG[nr], val); \
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock); \
|
|
|
|
return count; \
|
|
|
|
}
|
|
|
|
|
2019-12-25 10:32:24 +08:00
|
|
|
fan_functions(fan_start_output, W83627EHF_REG_FAN_START_OUTPUT)
|
|
|
|
fan_functions(fan_stop_output, W83627EHF_REG_FAN_STOP_OUTPUT)
|
|
|
|
fan_functions(fan_max_output, data->REG_FAN_MAX_OUTPUT)
|
|
|
|
fan_functions(fan_step_output, data->REG_FAN_STEP_OUTPUT)
|
2006-07-06 00:14:31 +08:00
|
|
|
|
|
|
|
#define fan_time_functions(reg, REG) \
|
|
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
|
|
char *buf) \
|
|
|
|
{ \
|
2019-11-25 04:20:30 +08:00
|
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
|
2011-02-05 05:24:30 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = \
|
|
|
|
to_sensor_dev_attr(attr); \
|
2006-07-06 00:14:31 +08:00
|
|
|
int nr = sensor_attr->index; \
|
|
|
|
return sprintf(buf, "%d\n", \
|
2011-02-05 05:24:30 +08:00
|
|
|
step_time_from_reg(data->reg[nr], \
|
|
|
|
data->pwm_mode[nr])); \
|
2006-07-06 00:14:31 +08:00
|
|
|
} \
|
|
|
|
\
|
|
|
|
static ssize_t \
|
|
|
|
store_##reg(struct device *dev, struct device_attribute *attr, \
|
|
|
|
const char *buf, size_t count) \
|
|
|
|
{ \
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
2011-02-05 05:24:30 +08:00
|
|
|
struct sensor_device_attribute *sensor_attr = \
|
|
|
|
to_sensor_dev_attr(attr); \
|
2006-07-06 00:14:31 +08:00
|
|
|
int nr = sensor_attr->index; \
|
2011-02-05 04:54:14 +08:00
|
|
|
unsigned long val; \
|
|
|
|
int err; \
|
2012-01-05 03:58:52 +08:00
|
|
|
err = kstrtoul(buf, 10, &val); \
|
2011-02-05 04:54:14 +08:00
|
|
|
if (err < 0) \
|
|
|
|
return err; \
|
|
|
|
val = step_time_to_reg(val, data->pwm_mode[nr]); \
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_lock(&data->update_lock); \
|
|
|
|
data->reg[nr] = val; \
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_value(data, REG[nr], val); \
|
2006-07-06 00:14:31 +08:00
|
|
|
mutex_unlock(&data->update_lock); \
|
|
|
|
return count; \
|
|
|
|
} \
|
|
|
|
|
2019-12-25 10:32:24 +08:00
|
|
|
fan_time_functions(fan_stop_time, W83627EHF_REG_FAN_STOP_TIME)
|
2006-07-06 00:14:31 +08:00
|
|
|
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_stop_time, 0644, show_fan_stop_time,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_time, 3);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_start_output, 0644, show_fan_start_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_start_output, 3);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_stop_output, 0644, show_fan_stop_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_output, 3);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_max_output, 0644, show_fan_max_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_max_output, 3);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm4_step_output, 0644, show_fan_step_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_step_output, 3);
|
|
|
|
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_stop_time, 0644, show_fan_stop_time,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_time, 2);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_start_output, 0644, show_fan_start_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_start_output, 2);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_stop_output, 0644, show_fan_stop_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_output, 2);
|
|
|
|
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_stop_time, 0644, show_fan_stop_time,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_time, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_stop_time, 0644, show_fan_stop_time,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_time, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_start_output, 0644, show_fan_start_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_start_output, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_start_output, 0644, show_fan_start_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_start_output, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_stop_output, 0644, show_fan_stop_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_output, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_stop_output, 0644, show_fan_stop_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_stop_output, 1);
|
2009-12-15 10:01:37 +08:00
|
|
|
|
2010-08-15 03:08:55 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* pwm1 and pwm3 don't support max and step settings on all chips.
|
|
|
|
* Need to check support while generating/removing attribute files.
|
|
|
|
*/
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_max_output, 0644, show_fan_max_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_max_output, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_step_output, 0644, show_fan_step_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_step_output, 0);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_max_output, 0644, show_fan_max_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_max_output, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm2_step_output, 0644, show_fan_step_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_step_output, 1);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_max_output, 0644, show_fan_max_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_max_output, 2);
|
2019-12-13 09:56:05 +08:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm3_step_output, 0644, show_fan_step_output,
|
2019-11-25 04:20:30 +08:00
|
|
|
store_fan_step_output, 2);
|
2006-07-06 00:14:31 +08:00
|
|
|
|
2007-06-24 17:19:42 +08:00
|
|
|
static ssize_t
|
2016-12-22 20:05:10 +08:00
|
|
|
cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
|
2007-06-24 17:19:42 +08:00
|
|
|
{
|
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
|
|
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
|
|
|
|
}
|
2019-11-25 04:20:30 +08:00
|
|
|
DEVICE_ATTR_RO(cpu0_vid);
|
2007-06-24 17:19:42 +08:00
|
|
|
|
2011-08-13 04:41:11 +08:00
|
|
|
|
|
|
|
/* Case open detection */
|
2019-11-25 04:20:30 +08:00
|
|
|
static int
|
|
|
|
clear_caseopen(struct device *dev, struct w83627ehf_data *data, int channel,
|
|
|
|
long val)
|
2011-08-13 04:41:11 +08:00
|
|
|
{
|
2019-12-25 10:32:25 +08:00
|
|
|
const u16 mask = 0x80;
|
|
|
|
u16 reg;
|
2011-08-13 04:41:11 +08:00
|
|
|
|
2019-12-25 10:32:25 +08:00
|
|
|
if (val != 0 || channel != 0)
|
2011-08-13 04:41:11 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
|
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
|
|
|
|
data->valid = 0; /* Force cache refresh */
|
|
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
2011-08-13 04:41:11 +08:00
|
|
|
}
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static umode_t w83627ehf_attrs_visible(struct kobject *kobj,
|
|
|
|
struct attribute *a, int n)
|
2006-09-25 03:04:38 +08:00
|
|
|
{
|
2019-11-25 04:20:30 +08:00
|
|
|
struct device *dev = container_of(kobj, struct device, kobj);
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
2019-11-25 04:20:30 +08:00
|
|
|
struct device_attribute *devattr;
|
|
|
|
struct sensor_device_attribute *sda;
|
|
|
|
|
|
|
|
devattr = container_of(a, struct device_attribute, attr);
|
|
|
|
|
|
|
|
/* Not sensor */
|
|
|
|
if (devattr->show == cpu0_vid_show && data->have_vid)
|
|
|
|
return a->mode;
|
|
|
|
|
|
|
|
sda = (struct sensor_device_attribute *)devattr;
|
|
|
|
|
|
|
|
if (sda->index < 2 &&
|
|
|
|
(devattr->show == show_fan_stop_time ||
|
|
|
|
devattr->show == show_fan_start_output ||
|
|
|
|
devattr->show == show_fan_stop_output))
|
|
|
|
return a->mode;
|
|
|
|
|
|
|
|
if (sda->index < 3 &&
|
|
|
|
(devattr->show == show_fan_max_output ||
|
|
|
|
devattr->show == show_fan_step_output) &&
|
|
|
|
data->REG_FAN_STEP_OUTPUT &&
|
|
|
|
data->REG_FAN_STEP_OUTPUT[sda->index] != 0xff)
|
|
|
|
return a->mode;
|
|
|
|
|
|
|
|
/* if fan3 and fan4 are enabled create the files for them */
|
|
|
|
if (sda->index == 2 &&
|
|
|
|
(data->has_fan & (1 << 2)) && data->pwm_num >= 3 &&
|
|
|
|
(devattr->show == show_fan_stop_time ||
|
|
|
|
devattr->show == show_fan_start_output ||
|
|
|
|
devattr->show == show_fan_stop_output))
|
|
|
|
return a->mode;
|
|
|
|
|
|
|
|
if (sda->index == 3 &&
|
|
|
|
(data->has_fan & (1 << 3)) && data->pwm_num >= 4 &&
|
|
|
|
(devattr->show == show_fan_stop_time ||
|
|
|
|
devattr->show == show_fan_start_output ||
|
|
|
|
devattr->show == show_fan_stop_output ||
|
|
|
|
devattr->show == show_fan_max_output ||
|
|
|
|
devattr->show == show_fan_step_output))
|
|
|
|
return a->mode;
|
|
|
|
|
|
|
|
if ((devattr->show == show_target_temp ||
|
|
|
|
devattr->show == show_tolerance) &&
|
|
|
|
(data->has_fan & (1 << sda->index)) &&
|
|
|
|
sda->index < data->pwm_num)
|
|
|
|
return a->mode;
|
2006-09-25 03:04:38 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2006-09-25 03:04:38 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
/* These groups handle non-standard attributes used in this device */
|
|
|
|
static struct attribute *w83627ehf_attrs[] = {
|
|
|
|
|
|
|
|
&sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_start_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_max_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_step_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_target.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_tolerance.dev_attr.attr,
|
|
|
|
|
|
|
|
&sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_start_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_max_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_step_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_target.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm2_tolerance.dev_attr.attr,
|
|
|
|
|
|
|
|
&sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_start_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_max_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_step_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_target.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm3_tolerance.dev_attr.attr,
|
|
|
|
|
|
|
|
&sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_start_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_max_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_step_output.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_target.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm4_tolerance.dev_attr.attr,
|
|
|
|
|
|
|
|
&dev_attr_cpu0_vid.attr,
|
|
|
|
NULL
|
|
|
|
};
|
2011-08-13 04:41:11 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
static const struct attribute_group w83627ehf_group = {
|
|
|
|
.attrs = w83627ehf_attrs,
|
|
|
|
.is_visible = w83627ehf_attrs_visible,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group *w83627ehf_groups[] = {
|
|
|
|
&w83627ehf_group,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Driver and device management
|
|
|
|
*/
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
/* Get the monitoring functions started */
|
2012-11-20 02:22:35 +08:00
|
|
|
static inline void w83627ehf_init_device(struct w83627ehf_data *data,
|
2011-10-14 03:49:08 +08:00
|
|
|
enum kinds kind)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
|
|
|
int i;
|
2007-06-24 17:21:02 +08:00
|
|
|
u8 tmp, diode;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
|
|
|
/* Start monitoring is needed */
|
2007-06-24 17:16:15 +08:00
|
|
|
tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
|
2005-04-26 04:43:25 +08:00
|
|
|
if (!(tmp & 0x01))
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
|
2005-04-26 04:43:25 +08:00
|
|
|
tmp | 0x01);
|
|
|
|
|
2011-02-08 07:08:54 +08:00
|
|
|
/* Enable temperature sensors if needed */
|
|
|
|
for (i = 0; i < NUM_REG_TEMP; i++) {
|
|
|
|
if (!(data->have_temp & (1 << i)))
|
|
|
|
continue;
|
2011-02-03 00:46:49 +08:00
|
|
|
if (!data->reg_temp_config[i])
|
2011-02-08 07:08:54 +08:00
|
|
|
continue;
|
2007-06-24 17:16:15 +08:00
|
|
|
tmp = w83627ehf_read_value(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->reg_temp_config[i]);
|
2005-04-26 04:43:25 +08:00
|
|
|
if (tmp & 0x01)
|
2007-06-24 17:16:15 +08:00
|
|
|
w83627ehf_write_value(data,
|
2011-02-03 00:46:49 +08:00
|
|
|
data->reg_temp_config[i],
|
2005-04-26 04:43:25 +08:00
|
|
|
tmp & 0xfe);
|
|
|
|
}
|
2007-06-24 17:20:13 +08:00
|
|
|
|
|
|
|
/* Enable VBAT monitoring if needed */
|
|
|
|
tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
|
|
|
|
if (!(tmp & 0x01))
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
|
2007-06-24 17:21:02 +08:00
|
|
|
|
|
|
|
/* Get thermal sensor types */
|
2011-10-14 03:49:08 +08:00
|
|
|
switch (kind) {
|
|
|
|
case w83627ehf:
|
|
|
|
diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
|
|
|
|
break;
|
2011-11-04 19:00:48 +08:00
|
|
|
case w83627uhg:
|
|
|
|
diode = 0x00;
|
|
|
|
break;
|
2011-10-14 03:49:08 +08:00
|
|
|
default:
|
|
|
|
diode = 0x70;
|
|
|
|
}
|
2007-06-24 17:21:02 +08:00
|
|
|
for (i = 0; i < 3; i++) {
|
2011-11-07 03:25:18 +08:00
|
|
|
const char *label = NULL;
|
|
|
|
|
|
|
|
if (data->temp_label)
|
|
|
|
label = data->temp_label[data->temp_src[i]];
|
2011-11-04 19:00:47 +08:00
|
|
|
|
|
|
|
/* Digital source overrides analog type */
|
2011-11-07 03:25:18 +08:00
|
|
|
if (label && strncmp(label, "PECI", 4) == 0)
|
2011-11-04 19:00:47 +08:00
|
|
|
data->temp_type[i] = 6;
|
2011-11-07 03:25:18 +08:00
|
|
|
else if (label && strncmp(label, "AMD", 3) == 0)
|
2011-11-04 19:00:47 +08:00
|
|
|
data->temp_type[i] = 5;
|
|
|
|
else if ((tmp & (0x02 << i)))
|
2011-10-14 03:49:08 +08:00
|
|
|
data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
|
2007-06-24 17:21:02 +08:00
|
|
|
else
|
|
|
|
data->temp_type[i] = 4; /* thermistor */
|
|
|
|
}
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2012-11-20 02:22:35 +08:00
|
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static void
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2011-11-04 19:00:47 +08:00
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w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
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{
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int i;
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for (i = 0; i < n_temp; i++) {
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data->reg_temp[i] = W83627EHF_REG_TEMP[i];
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data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
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data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
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data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
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}
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}
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2012-11-20 02:22:35 +08:00
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static void
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2011-10-13 22:43:14 +08:00
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w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
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struct w83627ehf_data *data)
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{
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2020-01-08 11:45:14 +08:00
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int fan3pin, fan4pin, fan5pin, regval;
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2011-10-13 22:43:14 +08:00
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2011-11-04 19:00:48 +08:00
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/* The W83627UHG is simple, only two fan inputs, no config */
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if (sio_data->kind == w83627uhg) {
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data->has_fan = 0x03; /* fan1 and fan2 */
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data->has_fan_min = 0x03;
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return;
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}
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2011-10-13 22:43:14 +08:00
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/* fan4 and fan5 share some pins with the GPIO and serial flash */
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2019-12-25 10:32:23 +08:00
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if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
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2011-10-13 22:43:14 +08:00
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fan3pin = 1;
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fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
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fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
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} else {
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fan3pin = 1;
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fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
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fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
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}
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data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
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data->has_fan |= (fan3pin << 2);
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data->has_fan_min |= (fan3pin << 2);
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2019-12-25 10:32:23 +08:00
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/*
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* It looks like fan4 and fan5 pins can be alternatively used
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* as fan on/off switches, but fan5 control is write only :/
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* We assume that if the serial interface is disabled, designers
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* connected fan5 as input unless they are emitting log 1, which
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* is not the default.
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*/
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regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
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if ((regval & (1 << 2)) && fan4pin) {
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data->has_fan |= (1 << 3);
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data->has_fan_min |= (1 << 3);
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}
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if (!(regval & (1 << 1)) && fan5pin) {
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data->has_fan |= (1 << 4);
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data->has_fan_min |= (1 << 4);
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2011-10-13 22:43:14 +08:00
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}
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}
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2019-11-25 04:20:30 +08:00
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static umode_t
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w83627ehf_is_visible(const void *drvdata, enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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const struct w83627ehf_data *data = drvdata;
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switch (type) {
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case hwmon_temp:
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/* channel 0.., name 1.. */
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if (!(data->have_temp & (1 << channel)))
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return 0;
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2020-02-20 22:29:48 +08:00
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if (attr == hwmon_temp_input)
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2019-11-25 04:20:30 +08:00
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return 0444;
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2020-02-20 22:29:48 +08:00
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if (attr == hwmon_temp_label) {
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if (data->temp_label)
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return 0444;
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return 0;
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}
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2019-11-25 04:20:30 +08:00
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if (channel == 2 && data->temp3_val_only)
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return 0;
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if (attr == hwmon_temp_max) {
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if (data->reg_temp_over[channel])
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return 0644;
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else
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return 0;
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}
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if (attr == hwmon_temp_max_hyst) {
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if (data->reg_temp_hyst[channel])
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return 0644;
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else
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return 0;
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}
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if (channel > 2)
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return 0;
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if (attr == hwmon_temp_alarm || attr == hwmon_temp_type)
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return 0444;
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if (attr == hwmon_temp_offset) {
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if (data->have_temp_offset & (1 << channel))
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return 0644;
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else
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return 0;
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}
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break;
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case hwmon_fan:
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/* channel 0.., name 1.. */
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if (!(data->has_fan & (1 << channel)))
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return 0;
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if (attr == hwmon_fan_input || attr == hwmon_fan_alarm)
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return 0444;
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if (attr == hwmon_fan_div) {
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2019-12-25 10:32:23 +08:00
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return 0444;
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2019-11-25 04:20:30 +08:00
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}
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if (attr == hwmon_fan_min) {
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if (data->has_fan_min & (1 << channel))
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return 0644;
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else
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return 0;
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}
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break;
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case hwmon_in:
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/* channel 0.., name 0.. */
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if (channel >= data->in_num)
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return 0;
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if (channel == 6 && data->in6_skip)
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return 0;
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if (attr == hwmon_in_alarm || attr == hwmon_in_input)
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return 0444;
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if (attr == hwmon_in_min || attr == hwmon_in_max)
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return 0644;
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break;
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case hwmon_pwm:
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/* channel 0.., name 1.. */
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if (!(data->has_fan & (1 << channel)) ||
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channel >= data->pwm_num)
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return 0;
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if (attr == hwmon_pwm_mode || attr == hwmon_pwm_enable ||
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attr == hwmon_pwm_input)
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return 0644;
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break;
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case hwmon_intrusion:
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2019-12-25 10:32:25 +08:00
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return 0644;
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2019-11-25 04:20:30 +08:00
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default: /* Shouldn't happen */
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return 0;
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}
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return 0; /* Shouldn't happen */
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}
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static int
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w83627ehf_do_read_temp(struct w83627ehf_data *data, u32 attr,
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int channel, long *val)
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{
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switch (attr) {
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case hwmon_temp_input:
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*val = LM75_TEMP_FROM_REG(data->temp[channel]);
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return 0;
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case hwmon_temp_max:
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*val = LM75_TEMP_FROM_REG(data->temp_max[channel]);
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return 0;
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case hwmon_temp_max_hyst:
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*val = LM75_TEMP_FROM_REG(data->temp_max_hyst[channel]);
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return 0;
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case hwmon_temp_offset:
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*val = data->temp_offset[channel] * 1000;
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return 0;
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case hwmon_temp_type:
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*val = (int)data->temp_type[channel];
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return 0;
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case hwmon_temp_alarm:
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if (channel < 3) {
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int bit[] = { 4, 5, 13 };
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*val = (data->alarms >> bit[channel]) & 1;
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return 0;
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}
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break;
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_do_read_in(struct w83627ehf_data *data, u32 attr,
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int channel, long *val)
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{
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switch (attr) {
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case hwmon_in_input:
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*val = in_from_reg(data->in[channel], channel, data->scale_in);
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return 0;
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case hwmon_in_min:
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*val = in_from_reg(data->in_min[channel], channel,
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data->scale_in);
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return 0;
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case hwmon_in_max:
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*val = in_from_reg(data->in_max[channel], channel,
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data->scale_in);
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return 0;
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case hwmon_in_alarm:
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if (channel < 10) {
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int bit[] = { 0, 1, 2, 3, 8, 21, 20, 16, 17, 19 };
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*val = (data->alarms >> bit[channel]) & 1;
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return 0;
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}
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break;
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_do_read_fan(struct w83627ehf_data *data, u32 attr,
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int channel, long *val)
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{
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switch (attr) {
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case hwmon_fan_input:
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*val = data->rpm[channel];
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return 0;
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case hwmon_fan_min:
|
2019-12-25 10:32:24 +08:00
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*val = fan_from_reg8(data->fan_min[channel],
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data->fan_div[channel]);
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2019-11-25 04:20:30 +08:00
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return 0;
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case hwmon_fan_div:
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*val = div_from_reg(data->fan_div[channel]);
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return 0;
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case hwmon_fan_alarm:
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if (channel < 5) {
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int bit[] = { 6, 7, 11, 10, 23 };
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*val = (data->alarms >> bit[channel]) & 1;
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return 0;
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}
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break;
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_do_read_pwm(struct w83627ehf_data *data, u32 attr,
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int channel, long *val)
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{
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switch (attr) {
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case hwmon_pwm_input:
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*val = data->pwm[channel];
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return 0;
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case hwmon_pwm_enable:
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*val = data->pwm_enable[channel];
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return 0;
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case hwmon_pwm_mode:
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*val = data->pwm_enable[channel];
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return 0;
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_do_read_intrusion(struct w83627ehf_data *data, u32 attr,
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int channel, long *val)
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{
|
2019-12-25 10:32:25 +08:00
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if (attr != hwmon_intrusion_alarm || channel != 0)
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2019-11-25 04:20:30 +08:00
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return -EOPNOTSUPP; /* shouldn't happen */
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2019-12-25 10:32:25 +08:00
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*val = !!(data->caseopen & 0x10);
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2019-11-25 04:20:30 +08:00
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return 0;
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}
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static int
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w83627ehf_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct w83627ehf_data *data = w83627ehf_update_device(dev->parent);
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switch (type) {
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case hwmon_fan:
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return w83627ehf_do_read_fan(data, attr, channel, val);
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case hwmon_in:
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return w83627ehf_do_read_in(data, attr, channel, val);
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case hwmon_pwm:
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return w83627ehf_do_read_pwm(data, attr, channel, val);
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case hwmon_temp:
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return w83627ehf_do_read_temp(data, attr, channel, val);
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case hwmon_intrusion:
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return w83627ehf_do_read_intrusion(data, attr, channel, val);
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_read_string(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, const char **str)
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{
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struct w83627ehf_data *data = dev_get_drvdata(dev);
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switch (type) {
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case hwmon_temp:
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if (attr == hwmon_temp_label) {
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*str = data->temp_label[data->temp_src[channel]];
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return 0;
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}
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break;
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default:
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break;
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}
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/* Nothing else should be read as a string */
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return -EOPNOTSUPP;
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}
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static int
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w83627ehf_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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struct w83627ehf_data *data = dev_get_drvdata(dev);
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if (type == hwmon_in && attr == hwmon_in_min)
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return store_in_min(dev, data, channel, val);
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if (type == hwmon_in && attr == hwmon_in_max)
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return store_in_max(dev, data, channel, val);
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if (type == hwmon_fan && attr == hwmon_fan_min)
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return store_fan_min(dev, data, channel, val);
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if (type == hwmon_temp && attr == hwmon_temp_max)
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return store_temp_max(dev, data, channel, val);
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if (type == hwmon_temp && attr == hwmon_temp_max_hyst)
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return store_temp_max_hyst(dev, data, channel, val);
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|
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if (type == hwmon_temp && attr == hwmon_temp_offset)
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return store_temp_offset(dev, data, channel, val);
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if (type == hwmon_pwm && attr == hwmon_pwm_mode)
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return store_pwm_mode(dev, data, channel, val);
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|
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if (type == hwmon_pwm && attr == hwmon_pwm_enable)
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|
|
return store_pwm_enable(dev, data, channel, val);
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|
|
if (type == hwmon_pwm && attr == hwmon_pwm_input)
|
|
|
|
return store_pwm(dev, data, channel, val);
|
|
|
|
|
|
|
|
if (type == hwmon_intrusion && attr == hwmon_intrusion_alarm)
|
|
|
|
return clear_caseopen(dev, data, channel, val);
|
|
|
|
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct hwmon_ops w83627ehf_ops = {
|
|
|
|
.is_visible = w83627ehf_is_visible,
|
|
|
|
.read = w83627ehf_read,
|
|
|
|
.read_string = w83627ehf_read_string,
|
|
|
|
.write = w83627ehf_write,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct hwmon_channel_info *w83627ehf_info[] = {
|
|
|
|
HWMON_CHANNEL_INFO(fan,
|
|
|
|
HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
|
|
|
|
HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
|
|
|
|
HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
|
|
|
|
HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
|
|
|
|
HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN),
|
|
|
|
HWMON_CHANNEL_INFO(in,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
|
|
|
|
HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN),
|
|
|
|
HWMON_CHANNEL_INFO(pwm,
|
|
|
|
HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
|
|
|
|
HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
|
|
|
|
HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
|
|
|
|
HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE),
|
|
|
|
HWMON_CHANNEL_INFO(temp,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
|
|
|
|
HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
|
|
|
|
HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE),
|
|
|
|
HWMON_CHANNEL_INFO(intrusion,
|
|
|
|
HWMON_INTRUSION_ALARM),
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct hwmon_chip_info w83627ehf_chip_info = {
|
|
|
|
.ops = &w83627ehf_ops,
|
|
|
|
.info = w83627ehf_info,
|
|
|
|
};
|
|
|
|
|
2012-11-20 02:22:35 +08:00
|
|
|
static int w83627ehf_probe(struct platform_device *pdev)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
struct device *dev = &pdev->dev;
|
2013-07-30 16:13:06 +08:00
|
|
|
struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
|
2005-04-26 04:43:25 +08:00
|
|
|
struct w83627ehf_data *data;
|
2007-06-24 17:16:15 +08:00
|
|
|
struct resource *res;
|
2011-10-13 22:43:14 +08:00
|
|
|
u8 en_vrm10;
|
2005-04-26 04:43:25 +08:00
|
|
|
int i, err = 0;
|
2019-11-25 04:20:30 +08:00
|
|
|
struct device *hwmon_dev;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
|
|
|
|
if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
|
2005-04-26 04:43:25 +08:00
|
|
|
err = -EBUSY;
|
2007-06-24 17:16:15 +08:00
|
|
|
dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
|
|
|
|
(unsigned long)res->start,
|
|
|
|
(unsigned long)res->start + IOREGION_LENGTH - 1);
|
2005-04-26 04:43:25 +08:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2012-03-12 23:33:10 +08:00
|
|
|
data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
|
|
|
|
GFP_KERNEL);
|
2011-02-05 05:24:30 +08:00
|
|
|
if (!data) {
|
2005-04-26 04:43:25 +08:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto exit_release;
|
|
|
|
}
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
data->addr = res->start;
|
2006-01-19 06:19:26 +08:00
|
|
|
mutex_init(&data->lock);
|
|
|
|
mutex_init(&data->update_lock);
|
2007-06-24 17:16:15 +08:00
|
|
|
data->name = w83627ehf_device_names[sio_data->kind];
|
2012-11-06 04:54:39 +08:00
|
|
|
data->bank = 0xff; /* Force initial bank selection */
|
2007-06-24 17:16:15 +08:00
|
|
|
platform_set_drvdata(pdev, data);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2009-03-31 03:46:42 +08:00
|
|
|
/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
|
|
|
|
data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
|
2019-12-25 10:32:23 +08:00
|
|
|
/* 667HG has 3 pwms, and 627UHG has only 2 */
|
2011-11-04 19:00:48 +08:00
|
|
|
switch (sio_data->kind) {
|
|
|
|
default:
|
|
|
|
data->pwm_num = 4;
|
|
|
|
break;
|
|
|
|
case w83667hg:
|
|
|
|
case w83667hg_b:
|
|
|
|
data->pwm_num = 3;
|
|
|
|
break;
|
|
|
|
case w83627uhg:
|
|
|
|
data->pwm_num = 2;
|
|
|
|
break;
|
|
|
|
}
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2011-11-04 19:00:47 +08:00
|
|
|
/* Default to 3 temperature inputs, code below will adjust as needed */
|
2011-02-08 07:08:54 +08:00
|
|
|
data->have_temp = 0x07;
|
2011-02-03 00:46:49 +08:00
|
|
|
|
|
|
|
/* Deal with temperature register setup first. */
|
2019-12-25 10:32:23 +08:00
|
|
|
if (sio_data->kind == w83667hg_b) {
|
2011-02-08 07:08:54 +08:00
|
|
|
u8 reg;
|
|
|
|
|
2011-11-04 19:00:47 +08:00
|
|
|
w83627ehf_set_temp_reg_ehf(data, 4);
|
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
/*
|
|
|
|
* Temperature sources are selected with bank 0, registers 0x49
|
|
|
|
* and 0x4a.
|
|
|
|
*/
|
2011-02-08 07:08:54 +08:00
|
|
|
reg = w83627ehf_read_value(data, 0x4a);
|
|
|
|
data->temp_src[0] = reg >> 5;
|
|
|
|
reg = w83627ehf_read_value(data, 0x49);
|
|
|
|
data->temp_src[1] = reg & 0x07;
|
2011-02-03 00:46:49 +08:00
|
|
|
data->temp_src[2] = (reg >> 4) & 0x07;
|
2011-02-08 07:08:54 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* W83667HG-B has another temperature register at 0x7e.
|
|
|
|
* The temperature source is selected with register 0x7d.
|
|
|
|
* Support it if the source differs from already reported
|
|
|
|
* sources.
|
|
|
|
*/
|
|
|
|
reg = w83627ehf_read_value(data, 0x7d);
|
|
|
|
reg &= 0x07;
|
|
|
|
if (reg != data->temp_src[0] && reg != data->temp_src[1]
|
|
|
|
&& reg != data->temp_src[2]) {
|
|
|
|
data->temp_src[3] = reg;
|
|
|
|
data->have_temp |= 1 << 3;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Chip supports either AUXTIN or VIN3. Try to find out which
|
|
|
|
* one.
|
|
|
|
*/
|
|
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
|
|
|
|
if (data->temp_src[2] == 2 && (reg & 0x01))
|
|
|
|
data->have_temp &= ~(1 << 2);
|
|
|
|
|
|
|
|
if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
|
|
|
|
|| (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
|
|
|
|
data->in6_skip = 1;
|
|
|
|
|
2011-11-04 19:00:48 +08:00
|
|
|
data->temp_label = w83667hg_b_temp_label;
|
2012-02-09 01:29:11 +08:00
|
|
|
data->have_temp_offset = data->have_temp & 0x07;
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
|
if (data->temp_src[i] > 2)
|
|
|
|
data->have_temp_offset &= ~(1 << i);
|
|
|
|
}
|
2011-11-04 19:00:48 +08:00
|
|
|
} else if (sio_data->kind == w83627uhg) {
|
|
|
|
u8 reg;
|
|
|
|
|
|
|
|
w83627ehf_set_temp_reg_ehf(data, 3);
|
|
|
|
|
|
|
|
/*
|
2012-03-13 16:03:27 +08:00
|
|
|
* Temperature sources for temp2 and temp3 are selected with
|
2011-11-04 19:00:48 +08:00
|
|
|
* bank 0, registers 0x49 and 0x4a.
|
|
|
|
*/
|
|
|
|
data->temp_src[0] = 0; /* SYSTIN */
|
|
|
|
reg = w83627ehf_read_value(data, 0x49) & 0x07;
|
|
|
|
/* Adjust to have the same mapping as other source registers */
|
|
|
|
if (reg == 0)
|
2012-03-13 16:03:27 +08:00
|
|
|
data->temp_src[1] = 1;
|
2011-11-04 19:00:48 +08:00
|
|
|
else if (reg >= 2 && reg <= 5)
|
2012-03-13 16:03:27 +08:00
|
|
|
data->temp_src[1] = reg + 2;
|
2011-11-04 19:00:48 +08:00
|
|
|
else /* should never happen */
|
|
|
|
data->have_temp &= ~(1 << 1);
|
|
|
|
reg = w83627ehf_read_value(data, 0x4a);
|
|
|
|
data->temp_src[2] = reg >> 5;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Skip temp3 if source is invalid or the same as temp1
|
|
|
|
* or temp2.
|
|
|
|
*/
|
|
|
|
if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
|
|
|
|
data->temp_src[2] == data->temp_src[0] ||
|
|
|
|
((data->have_temp & (1 << 1)) &&
|
|
|
|
data->temp_src[2] == data->temp_src[1]))
|
|
|
|
data->have_temp &= ~(1 << 2);
|
|
|
|
else
|
|
|
|
data->temp3_val_only = 1; /* No limit regs */
|
|
|
|
|
|
|
|
data->in6_skip = 1; /* No VIN3 */
|
|
|
|
|
2011-02-08 07:08:54 +08:00
|
|
|
data->temp_label = w83667hg_b_temp_label;
|
2012-02-09 01:29:11 +08:00
|
|
|
data->have_temp_offset = data->have_temp & 0x03;
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
|
if (data->temp_src[i] > 1)
|
|
|
|
data->have_temp_offset &= ~(1 << i);
|
|
|
|
}
|
2011-02-03 00:46:49 +08:00
|
|
|
} else {
|
2011-11-04 19:00:47 +08:00
|
|
|
w83627ehf_set_temp_reg_ehf(data, 3);
|
|
|
|
|
2011-02-03 00:46:49 +08:00
|
|
|
/* Temperature sources are fixed */
|
2011-11-04 19:00:47 +08:00
|
|
|
|
|
|
|
if (sio_data->kind == w83667hg) {
|
|
|
|
u8 reg;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Chip supports either AUXTIN or VIN3. Try to find
|
|
|
|
* out which one.
|
|
|
|
*/
|
|
|
|
reg = w83627ehf_read_value(data,
|
|
|
|
W83627EHF_REG_TEMP_CONFIG[2]);
|
|
|
|
if (reg & 0x01)
|
|
|
|
data->have_temp &= ~(1 << 2);
|
|
|
|
else
|
|
|
|
data->in6_skip = 1;
|
2011-02-03 00:46:49 +08:00
|
|
|
}
|
2012-02-09 01:29:11 +08:00
|
|
|
data->have_temp_offset = data->have_temp & 0x07;
|
2009-03-31 03:46:43 +08:00
|
|
|
}
|
|
|
|
|
2019-12-25 10:32:23 +08:00
|
|
|
if (sio_data->kind == w83667hg_b) {
|
2010-08-15 03:08:55 +08:00
|
|
|
data->REG_FAN_MAX_OUTPUT =
|
|
|
|
W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
|
|
|
|
data->REG_FAN_STEP_OUTPUT =
|
|
|
|
W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
|
|
|
|
} else {
|
|
|
|
data->REG_FAN_MAX_OUTPUT =
|
|
|
|
W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
|
|
|
|
data->REG_FAN_STEP_OUTPUT =
|
|
|
|
W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
|
|
|
|
}
|
2010-08-15 03:08:55 +08:00
|
|
|
|
2011-11-04 19:00:48 +08:00
|
|
|
/* Setup input voltage scaling factors */
|
|
|
|
if (sio_data->kind == w83627uhg)
|
|
|
|
data->scale_in = scale_in_w83627uhg;
|
|
|
|
else
|
|
|
|
data->scale_in = scale_in_common;
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
/* Initialize the chip */
|
2011-10-14 03:49:08 +08:00
|
|
|
w83627ehf_init_device(data, sio_data->kind);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:19:42 +08:00
|
|
|
data->vrm = vid_which_vrm();
|
2017-02-22 12:32:10 +08:00
|
|
|
|
|
|
|
err = superio_enter(sio_data->sioreg);
|
|
|
|
if (err)
|
|
|
|
goto exit_release;
|
|
|
|
|
2007-06-24 17:19:42 +08:00
|
|
|
/* Read VID value */
|
2019-12-25 10:32:23 +08:00
|
|
|
if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* W83667HG has different pins for VID input and output, so
|
|
|
|
* we can get the VID input values directly at logical device D
|
|
|
|
* 0xe3.
|
|
|
|
*/
|
2009-03-31 03:46:42 +08:00
|
|
|
superio_select(sio_data->sioreg, W83667HG_LD_VID);
|
|
|
|
data->vid = superio_inb(sio_data->sioreg, 0xe3);
|
2019-11-25 04:20:30 +08:00
|
|
|
data->have_vid = true;
|
2011-11-04 19:00:48 +08:00
|
|
|
} else if (sio_data->kind != w83627uhg) {
|
2009-03-31 03:46:42 +08:00
|
|
|
superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
|
|
|
|
if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* Set VID input sensibility if needed. In theory the
|
|
|
|
* BIOS should have set it, but in practice it's not
|
|
|
|
* always the case. We only do it for the W83627EHF/EHG
|
|
|
|
* because the W83627DHG is more complex in this
|
|
|
|
* respect.
|
|
|
|
*/
|
2009-03-31 03:46:42 +08:00
|
|
|
if (sio_data->kind == w83627ehf) {
|
|
|
|
en_vrm10 = superio_inb(sio_data->sioreg,
|
|
|
|
SIO_REG_EN_VRM10);
|
|
|
|
if ((en_vrm10 & 0x08) && data->vrm == 90) {
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_warn(dev,
|
|
|
|
"Setting VID input voltage to TTL\n");
|
2009-03-31 03:46:42 +08:00
|
|
|
superio_outb(sio_data->sioreg,
|
|
|
|
SIO_REG_EN_VRM10,
|
|
|
|
en_vrm10 & ~0x08);
|
|
|
|
} else if (!(en_vrm10 & 0x08)
|
|
|
|
&& data->vrm == 100) {
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_warn(dev,
|
|
|
|
"Setting VID input voltage to VRM10\n");
|
2009-03-31 03:46:42 +08:00
|
|
|
superio_outb(sio_data->sioreg,
|
|
|
|
SIO_REG_EN_VRM10,
|
|
|
|
en_vrm10 | 0x08);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
data->vid = superio_inb(sio_data->sioreg,
|
|
|
|
SIO_REG_VID_DATA);
|
|
|
|
if (sio_data->kind == w83627ehf) /* 6 VID pins only */
|
|
|
|
data->vid &= 0x3f;
|
2019-11-25 04:20:30 +08:00
|
|
|
data->have_vid = true;
|
2009-03-31 03:46:42 +08:00
|
|
|
} else {
|
2013-01-11 02:01:24 +08:00
|
|
|
dev_info(dev,
|
|
|
|
"VID pins in output mode, CPU VID not available\n");
|
2009-03-31 03:46:42 +08:00
|
|
|
}
|
2007-06-24 17:19:42 +08:00
|
|
|
}
|
|
|
|
|
2011-10-13 22:43:14 +08:00
|
|
|
w83627ehf_check_fan_inputs(sio_data, data);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2017-02-22 12:32:10 +08:00
|
|
|
superio_exit(sio_data->sioreg);
|
|
|
|
|
2007-08-06 00:19:01 +08:00
|
|
|
/* Read fan clock dividers immediately */
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_update_fan_div(data);
|
2011-02-03 00:46:49 +08:00
|
|
|
|
2011-02-14 15:01:25 +08:00
|
|
|
/* Read pwm data to save original values */
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_update_pwm(data);
|
2011-02-14 15:01:25 +08:00
|
|
|
for (i = 0; i < data->pwm_num; i++)
|
|
|
|
data->pwm_enable_orig[i] = data->pwm_enable[i];
|
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
|
|
|
|
data->name,
|
|
|
|
data,
|
|
|
|
&w83627ehf_chip_info,
|
|
|
|
w83627ehf_groups);
|
2006-03-23 23:25:22 +08:00
|
|
|
|
2019-11-25 04:20:30 +08:00
|
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
|
|
|
exit_release:
|
2007-06-24 17:16:15 +08:00
|
|
|
release_region(res->start, IOREGION_LENGTH);
|
2005-04-26 04:43:25 +08:00
|
|
|
exit:
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2012-11-20 02:25:51 +08:00
|
|
|
static int w83627ehf_remove(struct platform_device *pdev)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
struct w83627ehf_data *data = platform_get_drvdata(pdev);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
release_region(data->addr, IOREGION_LENGTH);
|
2005-04-26 04:43:25 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-20 05:16:59 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int w83627ehf_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev);
|
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
|
|
|
data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
|
|
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int w83627ehf_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
mutex_lock(&data->update_lock);
|
|
|
|
data->bank = 0xff; /* Force initial bank selection */
|
|
|
|
|
|
|
|
/* Restore limits */
|
|
|
|
for (i = 0; i < data->in_num; i++) {
|
|
|
|
if ((i == 6) && data->in6_skip)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
|
|
|
|
data->in_min[i]);
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
|
|
|
|
data->in_max[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 5; i++) {
|
|
|
|
if (!(data->has_fan_min & (1 << i)))
|
|
|
|
continue;
|
|
|
|
|
2019-12-25 10:32:24 +08:00
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[i],
|
2012-12-20 05:16:59 +08:00
|
|
|
data->fan_min[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_REG_TEMP; i++) {
|
|
|
|
if (!(data->have_temp & (1 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (data->reg_temp_over[i])
|
|
|
|
w83627ehf_write_temp(data, data->reg_temp_over[i],
|
|
|
|
data->temp_max[i]);
|
|
|
|
if (data->reg_temp_hyst[i])
|
|
|
|
w83627ehf_write_temp(data, data->reg_temp_hyst[i],
|
|
|
|
data->temp_max_hyst[i]);
|
2012-12-20 05:17:00 +08:00
|
|
|
if (i > 2)
|
|
|
|
continue;
|
2012-12-20 05:16:59 +08:00
|
|
|
if (data->have_temp_offset & (1 << i))
|
|
|
|
w83627ehf_write_value(data,
|
|
|
|
W83627EHF_REG_TEMP_OFFSET[i],
|
|
|
|
data->temp_offset[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Restore other settings */
|
|
|
|
w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
|
|
|
|
|
|
|
|
/* Force re-reading all values */
|
|
|
|
data->valid = 0;
|
|
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
|
|
|
|
.suspend = w83627ehf_suspend,
|
|
|
|
.resume = w83627ehf_resume,
|
2013-08-01 22:18:45 +08:00
|
|
|
.freeze = w83627ehf_suspend,
|
|
|
|
.restore = w83627ehf_resume,
|
2012-12-20 05:16:59 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
#define W83627EHF_DEV_PM_OPS (&w83627ehf_dev_pm_ops)
|
|
|
|
#else
|
|
|
|
#define W83627EHF_DEV_PM_OPS NULL
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
static struct platform_driver w83627ehf_driver = {
|
2005-11-27 03:37:41 +08:00
|
|
|
.driver = {
|
2007-06-24 17:16:15 +08:00
|
|
|
.name = DRVNAME,
|
2012-12-20 05:16:59 +08:00
|
|
|
.pm = W83627EHF_DEV_PM_OPS,
|
2005-11-27 03:37:41 +08:00
|
|
|
},
|
2007-06-24 17:16:15 +08:00
|
|
|
.probe = w83627ehf_probe,
|
2012-11-20 02:21:20 +08:00
|
|
|
.remove = w83627ehf_remove,
|
2005-04-26 04:43:25 +08:00
|
|
|
};
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
|
|
|
|
static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
|
|
|
|
struct w83627ehf_sio_data *sio_data)
|
2005-04-26 04:43:25 +08:00
|
|
|
{
|
2012-03-31 04:04:55 +08:00
|
|
|
static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
|
|
|
|
static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
|
|
|
|
static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
|
|
|
|
static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
|
|
|
|
static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
|
|
|
|
static const char sio_name_W83667HG[] __initconst = "W83667HG";
|
|
|
|
static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
|
2007-06-24 17:16:15 +08:00
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
u16 val;
|
2007-06-24 17:16:15 +08:00
|
|
|
const char *sio_name;
|
2017-02-22 12:32:10 +08:00
|
|
|
int err;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2017-02-22 12:32:10 +08:00
|
|
|
err = superio_enter(sioaddr);
|
|
|
|
if (err)
|
|
|
|
return err;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
2007-12-07 06:13:42 +08:00
|
|
|
if (force_id)
|
|
|
|
val = force_id;
|
|
|
|
else
|
|
|
|
val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
|
|
|
|
| superio_inb(sioaddr, SIO_REG_DEVID + 1);
|
2007-02-15 04:15:04 +08:00
|
|
|
switch (val & SIO_ID_MASK) {
|
|
|
|
case SIO_W83627EHF_ID:
|
2007-06-24 17:16:15 +08:00
|
|
|
sio_data->kind = w83627ehf;
|
|
|
|
sio_name = sio_name_W83627EHF;
|
|
|
|
break;
|
2007-02-15 04:15:04 +08:00
|
|
|
case SIO_W83627EHG_ID:
|
2007-06-24 17:16:15 +08:00
|
|
|
sio_data->kind = w83627ehf;
|
|
|
|
sio_name = sio_name_W83627EHG;
|
|
|
|
break;
|
|
|
|
case SIO_W83627DHG_ID:
|
|
|
|
sio_data->kind = w83627dhg;
|
|
|
|
sio_name = sio_name_W83627DHG;
|
2007-02-15 04:15:04 +08:00
|
|
|
break;
|
2009-06-16 00:39:50 +08:00
|
|
|
case SIO_W83627DHG_P_ID:
|
|
|
|
sio_data->kind = w83627dhg_p;
|
|
|
|
sio_name = sio_name_W83627DHG_P;
|
|
|
|
break;
|
2011-11-04 19:00:48 +08:00
|
|
|
case SIO_W83627UHG_ID:
|
|
|
|
sio_data->kind = w83627uhg;
|
|
|
|
sio_name = sio_name_W83627UHG;
|
|
|
|
break;
|
2009-03-31 03:46:42 +08:00
|
|
|
case SIO_W83667HG_ID:
|
|
|
|
sio_data->kind = w83667hg;
|
|
|
|
sio_name = sio_name_W83667HG;
|
|
|
|
break;
|
2010-08-15 03:08:55 +08:00
|
|
|
case SIO_W83667HG_B_ID:
|
|
|
|
sio_data->kind = w83667hg_b;
|
|
|
|
sio_name = sio_name_W83667HG_B;
|
|
|
|
break;
|
2007-02-15 04:15:04 +08:00
|
|
|
default:
|
2007-06-24 17:23:41 +08:00
|
|
|
if (val != 0xffff)
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_debug("unsupported chip ID: 0x%04x\n", val);
|
2007-06-24 17:16:15 +08:00
|
|
|
superio_exit(sioaddr);
|
2005-04-26 04:43:25 +08:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
/* We have a known chip, find the HWM I/O address */
|
|
|
|
superio_select(sioaddr, W83627EHF_LD_HWM);
|
|
|
|
val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
|
|
|
|
| superio_inb(sioaddr, SIO_REG_ADDR + 1);
|
2007-04-24 05:41:16 +08:00
|
|
|
*addr = val & IOREGION_ALIGNMENT;
|
[PATCH] I2C: Separate non-i2c hwmon drivers from i2c-core (5/9)
Call the ISA chip drivers detection function directly instead of relying
on i2c_detect. The net effect is that address lists won't be handled
anymore, but they were mostly useless in the ISA case anyway (pc87360,
smsc47m1, smsc47b397 had already dropped them).
We don't need to handle multiple devices, all we may need is a way to
force a given address instead of the original one (some drivers already
do: sis5595, via686a, w83627hf), and, for drivers supporting multiple
chips, a way to force one given kind. All this may be added later on
demand, but I actually don't think there will be much demand.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-07-20 05:56:35 +08:00
|
|
|
if (*addr == 0) {
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
|
2007-06-24 17:16:15 +08:00
|
|
|
superio_exit(sioaddr);
|
2005-04-26 04:43:25 +08:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Activate logical device if needed */
|
2007-06-24 17:16:15 +08:00
|
|
|
val = superio_inb(sioaddr, SIO_REG_ENABLE);
|
2007-06-24 17:17:09 +08:00
|
|
|
if (!(val & 0x01)) {
|
2013-01-11 02:01:24 +08:00
|
|
|
pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
|
2007-06-24 17:16:15 +08:00
|
|
|
superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
|
2007-06-24 17:17:09 +08:00
|
|
|
}
|
2007-06-24 17:16:15 +08:00
|
|
|
|
|
|
|
superio_exit(sioaddr);
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_info("Found %s chip at %#x\n", sio_name, *addr);
|
2007-06-24 17:16:15 +08:00
|
|
|
sio_data->sioreg = sioaddr;
|
2005-04-26 04:43:25 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* when Super-I/O functions move to a separate file, the Super-I/O
|
2007-06-24 17:16:15 +08:00
|
|
|
* bus will manage the lifetime of the device and this module will only keep
|
|
|
|
* track of the w83627ehf driver. But since we platform_device_alloc(), we
|
2012-01-20 03:02:27 +08:00
|
|
|
* must keep track of the device
|
|
|
|
*/
|
2007-06-24 17:16:15 +08:00
|
|
|
static struct platform_device *pdev;
|
|
|
|
|
2005-04-26 04:43:25 +08:00
|
|
|
static int __init sensors_w83627ehf_init(void)
|
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
int err;
|
|
|
|
unsigned short address;
|
|
|
|
struct resource res;
|
|
|
|
struct w83627ehf_sio_data sio_data;
|
|
|
|
|
2012-01-20 03:02:27 +08:00
|
|
|
/*
|
|
|
|
* initialize sio_data->kind and sio_data->sioreg.
|
2007-06-24 17:16:15 +08:00
|
|
|
*
|
|
|
|
* when Super-I/O functions move to a separate file, the Super-I/O
|
|
|
|
* driver will probe 0x2e and 0x4e and auto-detect the presence of a
|
2012-01-20 03:02:27 +08:00
|
|
|
* w83627ehf hardware monitor, and call probe()
|
|
|
|
*/
|
2007-06-24 17:16:15 +08:00
|
|
|
if (w83627ehf_find(0x2e, &address, &sio_data) &&
|
|
|
|
w83627ehf_find(0x4e, &address, &sio_data))
|
2005-04-26 04:43:25 +08:00
|
|
|
return -ENODEV;
|
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
err = platform_driver_register(&w83627ehf_driver);
|
|
|
|
if (err)
|
|
|
|
goto exit;
|
|
|
|
|
2011-02-05 05:24:30 +08:00
|
|
|
pdev = platform_device_alloc(DRVNAME, address);
|
|
|
|
if (!pdev) {
|
2007-06-24 17:16:15 +08:00
|
|
|
err = -ENOMEM;
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_err("Device allocation failed\n");
|
2007-06-24 17:16:15 +08:00
|
|
|
goto exit_unregister;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = platform_device_add_data(pdev, &sio_data,
|
|
|
|
sizeof(struct w83627ehf_sio_data));
|
|
|
|
if (err) {
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_err("Platform data allocation failed\n");
|
2007-06-24 17:16:15 +08:00
|
|
|
goto exit_device_put;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&res, 0, sizeof(res));
|
|
|
|
res.name = DRVNAME;
|
|
|
|
res.start = address + IOREGION_OFFSET;
|
|
|
|
res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
|
|
|
|
res.flags = IORESOURCE_IO;
|
2009-01-07 23:37:35 +08:00
|
|
|
|
|
|
|
err = acpi_check_resource_conflict(&res);
|
|
|
|
if (err)
|
2009-02-18 02:59:54 +08:00
|
|
|
goto exit_device_put;
|
2009-01-07 23:37:35 +08:00
|
|
|
|
2007-06-24 17:16:15 +08:00
|
|
|
err = platform_device_add_resources(pdev, &res, 1);
|
|
|
|
if (err) {
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_err("Device resource addition failed (%d)\n", err);
|
2007-06-24 17:16:15 +08:00
|
|
|
goto exit_device_put;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* platform_device_add calls probe() */
|
|
|
|
err = platform_device_add(pdev);
|
|
|
|
if (err) {
|
2010-10-20 14:51:54 +08:00
|
|
|
pr_err("Device addition failed (%d)\n", err);
|
2007-06-24 17:16:15 +08:00
|
|
|
goto exit_device_put;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
exit_device_put:
|
|
|
|
platform_device_put(pdev);
|
|
|
|
exit_unregister:
|
|
|
|
platform_driver_unregister(&w83627ehf_driver);
|
|
|
|
exit:
|
|
|
|
return err;
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit sensors_w83627ehf_exit(void)
|
|
|
|
{
|
2007-06-24 17:16:15 +08:00
|
|
|
platform_device_unregister(pdev);
|
|
|
|
platform_driver_unregister(&w83627ehf_driver);
|
2005-04-26 04:43:25 +08:00
|
|
|
}
|
|
|
|
|
2014-01-30 03:40:08 +08:00
|
|
|
MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
|
2005-04-26 04:43:25 +08:00
|
|
|
MODULE_DESCRIPTION("W83627EHF driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
module_init(sensors_w83627ehf_init);
|
|
|
|
module_exit(sensors_w83627ehf_exit);
|