2018-03-16 23:14:11 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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2015-01-13 20:28:55 +08:00
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/*
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* Mediatek Watchdog Driver
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*
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* Copyright (C) 2014 Matthias Brugger
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*
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* Matthias Brugger <matthias.bgg@gmail.com>
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*
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* Based on sunxi_wdt.c
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*/
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2020-01-15 16:58:28 +08:00
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#include <dt-bindings/reset-controller/mt2712-resets.h>
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2020-01-15 16:58:27 +08:00
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#include <dt-bindings/reset-controller/mt8183-resets.h>
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2020-10-14 21:19:36 +08:00
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#include <dt-bindings/reset-controller/mt8192-resets.h>
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2021-08-06 10:36:06 +08:00
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#include <dt-bindings/reset/mt8195-resets.h>
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2020-01-15 16:58:27 +08:00
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#include <linux/delay.h>
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2015-01-13 20:28:55 +08:00
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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2020-01-15 16:58:27 +08:00
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#include <linux/of_device.h>
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2015-01-13 20:28:55 +08:00
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#include <linux/platform_device.h>
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2020-01-15 16:58:27 +08:00
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#include <linux/reset-controller.h>
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2015-01-13 20:28:55 +08:00
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#include <linux/types.h>
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#include <linux/watchdog.h>
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2021-04-25 09:52:06 +08:00
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#include <linux/interrupt.h>
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2015-01-13 20:28:55 +08:00
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#define WDT_MAX_TIMEOUT 31
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2021-04-25 09:52:06 +08:00
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#define WDT_MIN_TIMEOUT 2
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2015-01-13 20:28:55 +08:00
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#define WDT_LENGTH_TIMEOUT(n) ((n) << 5)
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#define WDT_LENGTH 0x04
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#define WDT_LENGTH_KEY 0x8
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#define WDT_RST 0x08
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#define WDT_RST_RELOAD 0x1971
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#define WDT_MODE 0x00
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#define WDT_MODE_EN (1 << 0)
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#define WDT_MODE_EXT_POL_LOW (0 << 1)
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#define WDT_MODE_EXT_POL_HIGH (1 << 1)
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#define WDT_MODE_EXRST_EN (1 << 2)
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#define WDT_MODE_IRQ_EN (1 << 3)
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#define WDT_MODE_AUTO_START (1 << 4)
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#define WDT_MODE_DUAL_EN (1 << 6)
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#define WDT_MODE_KEY 0x22000000
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#define WDT_SWRST 0x14
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#define WDT_SWRST_KEY 0x1209
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2020-01-15 16:58:27 +08:00
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#define WDT_SWSYSRST 0x18U
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#define WDT_SWSYS_RST_KEY 0x88000000
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2015-01-13 20:28:55 +08:00
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#define DRV_NAME "mtk-wdt"
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#define DRV_VERSION "1.0"
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static bool nowayout = WATCHDOG_NOWAYOUT;
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2018-02-12 04:08:45 +08:00
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static unsigned int timeout;
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2015-01-13 20:28:55 +08:00
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struct mtk_wdt_dev {
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struct watchdog_device wdt_dev;
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void __iomem *wdt_base;
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2020-01-15 16:58:27 +08:00
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spinlock_t lock; /* protects WDT_SWSYSRST reg */
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struct reset_controller_dev rcdev;
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};
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struct mtk_wdt_data {
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int toprgu_sw_rst_num;
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2015-01-13 20:28:55 +08:00
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};
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2020-01-15 16:58:28 +08:00
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static const struct mtk_wdt_data mt2712_data = {
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.toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM,
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};
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2020-01-15 16:58:27 +08:00
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static const struct mtk_wdt_data mt8183_data = {
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.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
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};
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2020-10-14 21:19:36 +08:00
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static const struct mtk_wdt_data mt8192_data = {
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.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
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};
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2021-08-06 10:36:06 +08:00
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static const struct mtk_wdt_data mt8195_data = {
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.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
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};
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2020-01-15 16:58:27 +08:00
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static int toprgu_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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unsigned int tmp;
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unsigned long flags;
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struct mtk_wdt_dev *data =
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container_of(rcdev, struct mtk_wdt_dev, rcdev);
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spin_lock_irqsave(&data->lock, flags);
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tmp = readl(data->wdt_base + WDT_SWSYSRST);
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if (assert)
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tmp |= BIT(id);
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else
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tmp &= ~BIT(id);
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tmp |= WDT_SWSYS_RST_KEY;
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writel(tmp, data->wdt_base + WDT_SWSYSRST);
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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}
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static int toprgu_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return toprgu_reset_update(rcdev, id, true);
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}
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static int toprgu_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return toprgu_reset_update(rcdev, id, false);
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}
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static int toprgu_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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int ret;
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ret = toprgu_reset_assert(rcdev, id);
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if (ret)
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return ret;
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return toprgu_reset_deassert(rcdev, id);
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}
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static const struct reset_control_ops toprgu_reset_ops = {
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.assert = toprgu_reset_assert,
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.deassert = toprgu_reset_deassert,
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.reset = toprgu_reset,
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};
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static int toprgu_register_reset_controller(struct platform_device *pdev,
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int rst_num)
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{
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int ret;
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struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
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spin_lock_init(&mtk_wdt->lock);
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mtk_wdt->rcdev.owner = THIS_MODULE;
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mtk_wdt->rcdev.nr_resets = rst_num;
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mtk_wdt->rcdev.ops = &toprgu_reset_ops;
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mtk_wdt->rcdev.of_node = pdev->dev.of_node;
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ret = devm_reset_controller_register(&pdev->dev, &mtk_wdt->rcdev);
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if (ret != 0)
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dev_err(&pdev->dev,
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"couldn't register wdt reset controller: %d\n", ret);
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return ret;
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}
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2016-02-27 09:32:49 +08:00
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static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
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unsigned long action, void *data)
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2015-01-13 20:28:55 +08:00
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{
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2015-11-17 01:28:08 +08:00
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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2015-01-13 20:28:55 +08:00
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void __iomem *wdt_base;
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wdt_base = mtk_wdt->wdt_base;
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while (1) {
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writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
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mdelay(5);
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}
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2015-11-17 01:28:08 +08:00
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return 0;
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2015-01-13 20:28:55 +08:00
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}
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static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = mtk_wdt->wdt_base;
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iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
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return 0;
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}
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static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = mtk_wdt->wdt_base;
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u32 reg;
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wdt_dev->timeout = timeout;
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2021-04-25 09:52:06 +08:00
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/*
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* In dual mode, irq will be triggered at timeout / 2
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* the real timeout occurs at timeout
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*/
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if (wdt_dev->pretimeout)
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wdt_dev->pretimeout = timeout / 2;
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2015-01-13 20:28:55 +08:00
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/*
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* One bit is the value of 512 ticks
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* The clock has 32 KHz
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*/
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2021-04-25 09:52:06 +08:00
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reg = WDT_LENGTH_TIMEOUT((timeout - wdt_dev->pretimeout) << 6)
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| WDT_LENGTH_KEY;
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2015-01-13 20:28:55 +08:00
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iowrite32(reg, wdt_base + WDT_LENGTH);
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mtk_wdt_ping(wdt_dev);
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return 0;
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}
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2020-12-30 16:15:57 +08:00
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static void mtk_wdt_init(struct watchdog_device *wdt_dev)
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{
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base;
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wdt_base = mtk_wdt->wdt_base;
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if (readl(wdt_base + WDT_MODE) & WDT_MODE_EN) {
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set_bit(WDOG_HW_RUNNING, &wdt_dev->status);
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mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
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}
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}
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2015-01-13 20:28:55 +08:00
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static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = mtk_wdt->wdt_base;
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u32 reg;
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reg = readl(wdt_base + WDT_MODE);
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reg &= ~WDT_MODE_EN;
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2015-11-18 10:45:01 +08:00
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reg |= WDT_MODE_KEY;
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2015-01-13 20:28:55 +08:00
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iowrite32(reg, wdt_base + WDT_MODE);
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return 0;
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}
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static int mtk_wdt_start(struct watchdog_device *wdt_dev)
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{
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u32 reg;
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
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void __iomem *wdt_base = mtk_wdt->wdt_base;
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2015-02-11 18:26:21 +08:00
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int ret;
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2015-01-13 20:28:55 +08:00
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ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
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if (ret < 0)
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return ret;
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reg = ioread32(wdt_base + WDT_MODE);
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2021-04-25 09:52:06 +08:00
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if (wdt_dev->pretimeout)
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reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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else
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reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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2015-01-13 20:28:55 +08:00
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reg |= (WDT_MODE_EN | WDT_MODE_KEY);
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iowrite32(reg, wdt_base + WDT_MODE);
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return 0;
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}
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2021-04-25 09:52:06 +08:00
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static int mtk_wdt_set_pretimeout(struct watchdog_device *wdd,
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unsigned int timeout)
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{
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struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdd);
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void __iomem *wdt_base = mtk_wdt->wdt_base;
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u32 reg = ioread32(wdt_base + WDT_MODE);
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if (timeout && !wdd->pretimeout) {
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wdd->pretimeout = wdd->timeout / 2;
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reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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} else if (!timeout && wdd->pretimeout) {
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wdd->pretimeout = 0;
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reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
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} else {
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return 0;
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}
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reg |= WDT_MODE_KEY;
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iowrite32(reg, wdt_base + WDT_MODE);
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return mtk_wdt_set_timeout(wdd, wdd->timeout);
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}
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static irqreturn_t mtk_wdt_isr(int irq, void *arg)
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{
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struct watchdog_device *wdd = arg;
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watchdog_notify_pretimeout(wdd);
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return IRQ_HANDLED;
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}
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2015-01-13 20:28:55 +08:00
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static const struct watchdog_info mtk_wdt_info = {
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.identity = DRV_NAME,
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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2021-04-25 09:52:06 +08:00
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static const struct watchdog_info mtk_wdt_pt_info = {
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.identity = DRV_NAME,
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.options = WDIOF_SETTIMEOUT |
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WDIOF_PRETIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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2015-01-13 20:28:55 +08:00
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static const struct watchdog_ops mtk_wdt_ops = {
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.owner = THIS_MODULE,
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.start = mtk_wdt_start,
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.stop = mtk_wdt_stop,
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.ping = mtk_wdt_ping,
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.set_timeout = mtk_wdt_set_timeout,
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2021-04-25 09:52:06 +08:00
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.set_pretimeout = mtk_wdt_set_pretimeout,
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2015-11-17 01:28:08 +08:00
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.restart = mtk_wdt_restart,
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2015-01-13 20:28:55 +08:00
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};
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static int mtk_wdt_probe(struct platform_device *pdev)
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{
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2019-04-10 01:23:46 +08:00
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struct device *dev = &pdev->dev;
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2015-01-13 20:28:55 +08:00
|
|
|
struct mtk_wdt_dev *mtk_wdt;
|
2020-01-15 16:58:27 +08:00
|
|
|
const struct mtk_wdt_data *wdt_data;
|
2021-04-25 09:52:06 +08:00
|
|
|
int err, irq;
|
2015-01-13 20:28:55 +08:00
|
|
|
|
2019-04-10 01:23:46 +08:00
|
|
|
mtk_wdt = devm_kzalloc(dev, sizeof(*mtk_wdt), GFP_KERNEL);
|
2015-01-13 20:28:55 +08:00
|
|
|
if (!mtk_wdt)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, mtk_wdt);
|
|
|
|
|
watchdog: Convert to use devm_platform_ioremap_resource
Use devm_platform_ioremap_resource to reduce source code size,
improve readability, and reduce the likelyhood of bugs.
The conversion was done automatically with coccinelle using the
following semantic patch.
@r@
identifier res, pdev;
expression a;
expression index;
expression e;
@@
<+...
- res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(e, res);
+ a = devm_platform_ioremap_resource(pdev, index);
...+>
@depends on r@
identifier r.res;
@@
- struct resource *res;
... when != res
@@
identifier res, pdev;
expression index;
expression a;
@@
- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- a = devm_ioremap_resource(&pdev->dev, res);
+ a = devm_platform_ioremap_resource(pdev, index);
Cc: Joel Stanley <joel@jms.id.au>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Keguang Zhang <keguang.zhang@gmail.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Nancy Yuen <yuenn@google.com>
Cc: Brendan Higgins <brendanhiggins@google.com>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Barry Song <baohua@kernel.org>
Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Michal Simek <michal.simek@xilinx.com> (cadence/xilinx wdts)
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2019-04-03 03:01:53 +08:00
|
|
|
mtk_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
|
2015-01-13 20:28:55 +08:00
|
|
|
if (IS_ERR(mtk_wdt->wdt_base))
|
|
|
|
return PTR_ERR(mtk_wdt->wdt_base);
|
|
|
|
|
2021-04-25 09:52:06 +08:00
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
|
|
if (irq > 0) {
|
|
|
|
err = devm_request_irq(&pdev->dev, irq, mtk_wdt_isr, 0, "wdt_bark",
|
|
|
|
&mtk_wdt->wdt_dev);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
mtk_wdt->wdt_dev.info = &mtk_wdt_pt_info;
|
|
|
|
mtk_wdt->wdt_dev.pretimeout = WDT_MAX_TIMEOUT / 2;
|
|
|
|
} else {
|
|
|
|
if (irq == -EPROBE_DEFER)
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
|
|
|
mtk_wdt->wdt_dev.info = &mtk_wdt_info;
|
|
|
|
}
|
|
|
|
|
2015-01-13 20:28:55 +08:00
|
|
|
mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
|
|
|
|
mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
|
2020-12-30 16:15:57 +08:00
|
|
|
mtk_wdt->wdt_dev.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT * 1000;
|
2015-01-13 20:28:55 +08:00
|
|
|
mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
|
2019-04-10 01:23:46 +08:00
|
|
|
mtk_wdt->wdt_dev.parent = dev;
|
2015-01-13 20:28:55 +08:00
|
|
|
|
2019-04-10 01:23:46 +08:00
|
|
|
watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, dev);
|
2015-01-13 20:28:55 +08:00
|
|
|
watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
|
2015-11-17 01:28:08 +08:00
|
|
|
watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
|
2015-01-13 20:28:55 +08:00
|
|
|
|
|
|
|
watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
|
|
|
|
|
2020-12-30 16:15:57 +08:00
|
|
|
mtk_wdt_init(&mtk_wdt->wdt_dev);
|
2015-01-13 20:28:55 +08:00
|
|
|
|
2019-04-10 01:23:46 +08:00
|
|
|
watchdog_stop_on_reboot(&mtk_wdt->wdt_dev);
|
|
|
|
err = devm_watchdog_register_device(dev, &mtk_wdt->wdt_dev);
|
2015-01-13 20:28:55 +08:00
|
|
|
if (unlikely(err))
|
|
|
|
return err;
|
|
|
|
|
2019-04-10 01:23:46 +08:00
|
|
|
dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
|
|
|
|
mtk_wdt->wdt_dev.timeout, nowayout);
|
2015-01-13 20:28:55 +08:00
|
|
|
|
2020-01-15 16:58:27 +08:00
|
|
|
wdt_data = of_device_get_match_data(dev);
|
|
|
|
if (wdt_data) {
|
|
|
|
err = toprgu_register_reset_controller(pdev,
|
|
|
|
wdt_data->toprgu_sw_rst_num);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
}
|
2015-01-13 20:28:55 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-07-24 15:28:45 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int mtk_wdt_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (watchdog_active(&mtk_wdt->wdt_dev))
|
|
|
|
mtk_wdt_stop(&mtk_wdt->wdt_dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mtk_wdt_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
if (watchdog_active(&mtk_wdt->wdt_dev)) {
|
|
|
|
mtk_wdt_start(&mtk_wdt->wdt_dev);
|
|
|
|
mtk_wdt_ping(&mtk_wdt->wdt_dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-01-13 20:28:55 +08:00
|
|
|
static const struct of_device_id mtk_wdt_dt_ids[] = {
|
2020-01-15 16:58:28 +08:00
|
|
|
{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
|
2015-01-13 20:28:55 +08:00
|
|
|
{ .compatible = "mediatek,mt6589-wdt" },
|
2020-01-15 16:58:27 +08:00
|
|
|
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
|
2020-10-14 21:19:36 +08:00
|
|
|
{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
|
2021-08-06 10:36:06 +08:00
|
|
|
{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
|
2015-01-13 20:28:55 +08:00
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
|
|
|
|
|
2015-07-24 15:28:45 +08:00
|
|
|
static const struct dev_pm_ops mtk_wdt_pm_ops = {
|
|
|
|
SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
|
|
|
|
mtk_wdt_resume)
|
|
|
|
};
|
|
|
|
|
2015-01-13 20:28:55 +08:00
|
|
|
static struct platform_driver mtk_wdt_driver = {
|
|
|
|
.probe = mtk_wdt_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = DRV_NAME,
|
2015-07-24 15:28:45 +08:00
|
|
|
.pm = &mtk_wdt_pm_ops,
|
2015-01-13 20:28:55 +08:00
|
|
|
.of_match_table = mtk_wdt_dt_ids,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(mtk_wdt_driver);
|
|
|
|
|
|
|
|
module_param(timeout, uint, 0);
|
|
|
|
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
|
|
|
|
|
|
|
|
module_param(nowayout, bool, 0);
|
|
|
|
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
|
|
|
|
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
|
|
|
|
MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|