2019-04-05 17:49:53 +08:00
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Freescale DPAA2 Platforms Console Driver
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*
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* Copyright 2015-2016 Freescale Semiconductor Inc.
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* Copyright 2018 NXP
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*/
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#define pr_fmt(fmt) "dpaa2-console: " fmt
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/miscdevice.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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/* MC firmware base low/high registers indexes */
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#define MCFBALR_OFFSET 0
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#define MCFBAHR_OFFSET 1
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/* Bit masks used to get the most/least significant part of the MC base addr */
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#define MC_FW_ADDR_MASK_HIGH 0x1FFFF
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#define MC_FW_ADDR_MASK_LOW 0xE0000000
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#define MC_BUFFER_OFFSET 0x01000000
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#define MC_BUFFER_SIZE (1024 * 1024 * 16)
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#define MC_OFFSET_DELTA MC_BUFFER_OFFSET
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#define AIOP_BUFFER_OFFSET 0x06000000
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#define AIOP_BUFFER_SIZE (1024 * 1024 * 16)
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#define AIOP_OFFSET_DELTA 0
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#define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
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#define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
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/* MC and AIOP Magic words */
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#define MAGIC_MC 0x4d430100
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#define MAGIC_AIOP 0x41494F50
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struct log_header {
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__le32 magic_word;
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char reserved[4];
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__le32 buf_start;
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__le32 buf_length;
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__le32 last_byte;
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};
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struct console_data {
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void __iomem *map_addr;
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struct log_header __iomem *hdr;
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void __iomem *start_addr;
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void __iomem *end_addr;
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void __iomem *end_of_data;
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void __iomem *cur_ptr;
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};
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static struct resource mc_base_addr;
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static inline void adjust_end(struct console_data *cd)
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{
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u32 last_byte = readl(&cd->hdr->last_byte);
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cd->end_of_data = cd->start_addr + LAST_BYTE(last_byte);
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}
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static u64 get_mc_fw_base_address(void)
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{
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u64 mcfwbase = 0ULL;
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u32 __iomem *mcfbaregs;
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mcfbaregs = ioremap(mc_base_addr.start, resource_size(&mc_base_addr));
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if (!mcfbaregs) {
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2019-05-21 16:56:24 +08:00
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pr_err("could not map MC Firmware Base registers\n");
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2019-04-05 17:49:53 +08:00
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return 0;
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}
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mcfwbase = readl(mcfbaregs + MCFBAHR_OFFSET) &
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MC_FW_ADDR_MASK_HIGH;
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mcfwbase <<= 32;
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mcfwbase |= readl(mcfbaregs + MCFBALR_OFFSET) & MC_FW_ADDR_MASK_LOW;
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iounmap(mcfbaregs);
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pr_debug("MC base address at 0x%016llx\n", mcfwbase);
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return mcfwbase;
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}
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static ssize_t dpaa2_console_size(struct console_data *cd)
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{
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ssize_t size;
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if (cd->cur_ptr <= cd->end_of_data)
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size = cd->end_of_data - cd->cur_ptr;
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else
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size = (cd->end_addr - cd->cur_ptr) +
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(cd->end_of_data - cd->start_addr);
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return size;
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}
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static int dpaa2_generic_console_open(struct inode *node, struct file *fp,
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u64 offset, u64 size,
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u32 expected_magic,
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u32 offset_delta)
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{
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u32 read_magic, wrapped, last_byte, buf_start, buf_length;
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struct console_data *cd;
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u64 base_addr;
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int err;
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cd = kmalloc(sizeof(*cd), GFP_KERNEL);
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if (!cd)
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return -ENOMEM;
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base_addr = get_mc_fw_base_address();
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if (!base_addr) {
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err = -EIO;
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goto err_fwba;
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}
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cd->map_addr = ioremap(base_addr + offset, size);
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if (!cd->map_addr) {
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pr_err("cannot map console log memory\n");
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err = -EIO;
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goto err_ioremap;
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}
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cd->hdr = (struct log_header __iomem *)cd->map_addr;
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read_magic = readl(&cd->hdr->magic_word);
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last_byte = readl(&cd->hdr->last_byte);
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buf_start = readl(&cd->hdr->buf_start);
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buf_length = readl(&cd->hdr->buf_length);
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if (read_magic != expected_magic) {
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pr_warn("expected = %08x, read = %08x\n",
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expected_magic, read_magic);
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err = -EIO;
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goto err_magic;
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}
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cd->start_addr = cd->map_addr + buf_start - offset_delta;
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cd->end_addr = cd->start_addr + buf_length;
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wrapped = last_byte & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
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adjust_end(cd);
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if (wrapped && cd->end_of_data != cd->end_addr)
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cd->cur_ptr = cd->end_of_data + 1;
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else
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cd->cur_ptr = cd->start_addr;
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fp->private_data = cd;
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return 0;
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err_magic:
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iounmap(cd->map_addr);
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err_ioremap:
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err_fwba:
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kfree(cd);
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return err;
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}
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static int dpaa2_mc_console_open(struct inode *node, struct file *fp)
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{
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return dpaa2_generic_console_open(node, fp,
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MC_BUFFER_OFFSET, MC_BUFFER_SIZE,
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MAGIC_MC, MC_OFFSET_DELTA);
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}
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static int dpaa2_aiop_console_open(struct inode *node, struct file *fp)
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{
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return dpaa2_generic_console_open(node, fp,
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AIOP_BUFFER_OFFSET, AIOP_BUFFER_SIZE,
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MAGIC_AIOP, AIOP_OFFSET_DELTA);
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}
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static int dpaa2_console_close(struct inode *node, struct file *fp)
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{
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struct console_data *cd = fp->private_data;
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iounmap(cd->map_addr);
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kfree(cd);
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return 0;
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}
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static ssize_t dpaa2_console_read(struct file *fp, char __user *buf,
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size_t count, loff_t *f_pos)
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{
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struct console_data *cd = fp->private_data;
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size_t bytes = dpaa2_console_size(cd);
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size_t bytes_end = cd->end_addr - cd->cur_ptr;
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size_t written = 0;
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void *kbuf;
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int err;
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/* Check if we need to adjust the end of data addr */
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adjust_end(cd);
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if (cd->end_of_data == cd->cur_ptr)
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return 0;
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if (count < bytes)
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bytes = count;
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kbuf = kmalloc(bytes, GFP_KERNEL);
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if (!kbuf)
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return -ENOMEM;
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if (bytes > bytes_end) {
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memcpy_fromio(kbuf, cd->cur_ptr, bytes_end);
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if (copy_to_user(buf, kbuf, bytes_end)) {
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err = -EFAULT;
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goto err_free_buf;
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}
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buf += bytes_end;
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cd->cur_ptr = cd->start_addr;
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bytes -= bytes_end;
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written += bytes_end;
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}
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memcpy_fromio(kbuf, cd->cur_ptr, bytes);
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if (copy_to_user(buf, kbuf, bytes)) {
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err = -EFAULT;
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goto err_free_buf;
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}
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cd->cur_ptr += bytes;
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written += bytes;
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return written;
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err_free_buf:
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kfree(kbuf);
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return err;
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}
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static const struct file_operations dpaa2_mc_console_fops = {
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.owner = THIS_MODULE,
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.open = dpaa2_mc_console_open,
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.release = dpaa2_console_close,
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.read = dpaa2_console_read,
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};
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static struct miscdevice dpaa2_mc_console_dev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "dpaa2_mc_console",
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.fops = &dpaa2_mc_console_fops
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};
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static const struct file_operations dpaa2_aiop_console_fops = {
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.owner = THIS_MODULE,
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.open = dpaa2_aiop_console_open,
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.release = dpaa2_console_close,
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.read = dpaa2_console_read,
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};
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static struct miscdevice dpaa2_aiop_console_dev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "dpaa2_aiop_console",
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.fops = &dpaa2_aiop_console_fops
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};
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static int dpaa2_console_probe(struct platform_device *pdev)
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{
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int error;
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error = of_address_to_resource(pdev->dev.of_node, 0, &mc_base_addr);
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if (error < 0) {
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pr_err("of_address_to_resource() failed for %pOF with %d\n",
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pdev->dev.of_node, error);
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return error;
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}
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error = misc_register(&dpaa2_mc_console_dev);
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if (error) {
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pr_err("cannot register device %s\n",
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dpaa2_mc_console_dev.name);
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goto err_register_mc;
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}
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error = misc_register(&dpaa2_aiop_console_dev);
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if (error) {
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pr_err("cannot register device %s\n",
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dpaa2_aiop_console_dev.name);
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goto err_register_aiop;
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}
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return 0;
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err_register_aiop:
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misc_deregister(&dpaa2_mc_console_dev);
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err_register_mc:
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return error;
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}
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static int dpaa2_console_remove(struct platform_device *pdev)
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{
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misc_deregister(&dpaa2_mc_console_dev);
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misc_deregister(&dpaa2_aiop_console_dev);
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return 0;
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}
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static const struct of_device_id dpaa2_console_match_table[] = {
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{ .compatible = "fsl,dpaa2-console",},
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{},
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};
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MODULE_DEVICE_TABLE(of, dpaa2_console_match_table);
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static struct platform_driver dpaa2_console_driver = {
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.driver = {
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.name = "dpaa2-console",
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.pm = NULL,
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.of_match_table = dpaa2_console_match_table,
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},
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.probe = dpaa2_console_probe,
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.remove = dpaa2_console_remove,
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};
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module_platform_driver(dpaa2_console_driver);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Roy Pledge <roy.pledge@nxp.com>");
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MODULE_DESCRIPTION("DPAA2 console driver");
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