OpenCloudOS-Kernel/arch/arm/mach-sunxi/Kconfig

config ARCH_SUNXI
	bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
	select CLKSRC_MMIO
	select CLKSRC_OF
	select COMMON_CLK
	select GENERIC_CLOCKEVENTS
	select GENERIC_IRQ_CHIP
	select PINCTRL
	select SPARSE_IRQ
	select SUNXI_TIMER
	select PINCTRL_SUNXI
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de> 2012-11-08 19:40:16 +08:00			`config ARCH_SUNXI`
			`bool "Allwinner A1X SOCs" if ARCH_MULTI_V7`
			`select CLKSRC_MMIO`
clocksource: sunxi: make use of CLKSRC_OF Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header, and instead of using a custom init function in the machine definition use the standard clocksource_of_init function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> 2013-03-24 07:01:48 +08:00			`select CLKSRC_OF`
ARM: sunxi: Add basic support for Allwinner A1x SoCs Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de> 2012-11-08 19:40:16 +08:00			`select COMMON_CLK`
			`select GENERIC_CLOCKEVENTS`
			`select GENERIC_IRQ_CHIP`
			`select PINCTRL`
			`select SPARSE_IRQ`
			`select SUNXI_TIMER`
ARM: sunxi: Add pinctrl driver for Allwinner SoCs The Allwinner SoCs have an IP module that handle both the muxing and the GPIOs. This IP has 8 banks of 32 bits, with a number of pins actually useful for each of these banks varying from one to another, and depending on the SoC used on the board. This driver only implements the pinctrl part, the gpio part will come eventually. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 2013-01-19 05:30:34 +08:00			`select PINCTRL_SUNXI`