License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2010-12-17 05:39:18 +08:00
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM xen
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#if !defined(_TRACE_XEN_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_XEN_H
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#include <linux/tracepoint.h>
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#include <asm/paravirt_types.h>
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2010-12-17 06:33:27 +08:00
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#include <asm/xen/trace_types.h>
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2010-12-17 05:39:18 +08:00
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2011-07-26 06:51:02 +08:00
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struct multicall_entry;
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2010-12-17 06:33:27 +08:00
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/* Multicalls */
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2011-06-21 08:52:13 +08:00
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DECLARE_EVENT_CLASS(xen_mc__batch,
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2010-12-17 06:33:27 +08:00
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TP_PROTO(enum paravirt_lazy_mode mode),
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TP_ARGS(mode),
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TP_STRUCT__entry(
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__field(enum paravirt_lazy_mode, mode)
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),
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TP_fast_assign(__entry->mode = mode),
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TP_printk("start batch LAZY_%s",
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(__entry->mode == PARAVIRT_LAZY_MMU) ? "MMU" :
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(__entry->mode == PARAVIRT_LAZY_CPU) ? "CPU" : "NONE")
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);
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2011-06-21 08:52:13 +08:00
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#define DEFINE_XEN_MC_BATCH(name) \
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DEFINE_EVENT(xen_mc__batch, name, \
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TP_PROTO(enum paravirt_lazy_mode mode), \
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TP_ARGS(mode))
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2010-12-17 06:33:27 +08:00
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2011-06-21 08:52:13 +08:00
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DEFINE_XEN_MC_BATCH(xen_mc_batch);
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DEFINE_XEN_MC_BATCH(xen_mc_issue);
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2010-12-17 06:33:27 +08:00
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2017-06-01 05:56:52 +08:00
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TRACE_DEFINE_SIZEOF(ulong);
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2010-12-17 06:33:27 +08:00
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TRACE_EVENT(xen_mc_entry,
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TP_PROTO(struct multicall_entry *mc, unsigned nargs),
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TP_ARGS(mc, nargs),
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TP_STRUCT__entry(
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__field(unsigned int, op)
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__field(unsigned int, nargs)
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__array(unsigned long, args, 6)
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),
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TP_fast_assign(__entry->op = mc->op;
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__entry->nargs = nargs;
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2017-06-01 05:56:52 +08:00
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memcpy(__entry->args, mc->args, sizeof(ulong) * nargs);
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memset(__entry->args + nargs, 0, sizeof(ulong) * (6 - nargs));
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2010-12-17 06:33:27 +08:00
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),
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TP_printk("op %u%s args [%lx, %lx, %lx, %lx, %lx, %lx]",
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__entry->op, xen_hypercall_name(__entry->op),
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__entry->args[0], __entry->args[1], __entry->args[2],
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__entry->args[3], __entry->args[4], __entry->args[5])
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);
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TRACE_EVENT(xen_mc_entry_alloc,
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TP_PROTO(size_t args),
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TP_ARGS(args),
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TP_STRUCT__entry(
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__field(size_t, args)
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),
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TP_fast_assign(__entry->args = args),
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TP_printk("alloc entry %zu arg bytes", __entry->args)
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);
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TRACE_EVENT(xen_mc_callback,
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TP_PROTO(xen_mc_callback_fn_t fn, void *data),
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TP_ARGS(fn, data),
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TP_STRUCT__entry(
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__field(xen_mc_callback_fn_t, fn)
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__field(void *, data)
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),
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TP_fast_assign(
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__entry->fn = fn;
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__entry->data = data;
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),
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TP_printk("callback %pf, data %p",
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__entry->fn, __entry->data)
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);
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TRACE_EVENT(xen_mc_flush_reason,
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TP_PROTO(enum xen_mc_flush_reason reason),
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TP_ARGS(reason),
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TP_STRUCT__entry(
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__field(enum xen_mc_flush_reason, reason)
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),
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TP_fast_assign(__entry->reason = reason),
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TP_printk("flush reason %s",
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(__entry->reason == XEN_MC_FL_NONE) ? "NONE" :
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(__entry->reason == XEN_MC_FL_BATCH) ? "BATCH" :
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(__entry->reason == XEN_MC_FL_ARGS) ? "ARGS" :
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(__entry->reason == XEN_MC_FL_CALLBACK) ? "CALLBACK" : "??")
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);
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TRACE_EVENT(xen_mc_flush,
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TP_PROTO(unsigned mcidx, unsigned argidx, unsigned cbidx),
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TP_ARGS(mcidx, argidx, cbidx),
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TP_STRUCT__entry(
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__field(unsigned, mcidx)
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__field(unsigned, argidx)
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__field(unsigned, cbidx)
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),
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TP_fast_assign(__entry->mcidx = mcidx;
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__entry->argidx = argidx;
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__entry->cbidx = cbidx),
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TP_printk("flushing %u hypercalls, %u arg bytes, %u callbacks",
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__entry->mcidx, __entry->argidx, __entry->cbidx)
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);
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TRACE_EVENT(xen_mc_extend_args,
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TP_PROTO(unsigned long op, size_t args, enum xen_mc_extend_args res),
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TP_ARGS(op, args, res),
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TP_STRUCT__entry(
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__field(unsigned int, op)
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__field(size_t, args)
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__field(enum xen_mc_extend_args, res)
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),
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TP_fast_assign(__entry->op = op;
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__entry->args = args;
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__entry->res = res),
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TP_printk("extending op %u%s by %zu bytes res %s",
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__entry->op, xen_hypercall_name(__entry->op),
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__entry->args,
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__entry->res == XEN_MC_XE_OK ? "OK" :
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__entry->res == XEN_MC_XE_BAD_OP ? "BAD_OP" :
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__entry->res == XEN_MC_XE_NO_SPACE ? "NO_SPACE" : "???")
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);
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2010-12-17 09:02:35 +08:00
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2017-06-01 05:56:52 +08:00
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TRACE_DEFINE_SIZEOF(pteval_t);
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2010-12-17 09:02:35 +08:00
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/* mmu */
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2011-06-21 08:48:40 +08:00
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DECLARE_EVENT_CLASS(xen_mmu__set_pte,
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2010-12-17 09:02:35 +08:00
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TP_PROTO(pte_t *ptep, pte_t pteval),
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TP_ARGS(ptep, pteval),
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TP_STRUCT__entry(
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__field(pte_t *, ptep)
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__field(pteval_t, pteval)
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),
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TP_fast_assign(__entry->ptep = ptep;
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__entry->pteval = pteval.pte),
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TP_printk("ptep %p pteval %0*llx (raw %0*llx)",
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__entry->ptep,
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(int)sizeof(pteval_t) * 2, (unsigned long long)pte_val(native_make_pte(__entry->pteval)),
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(int)sizeof(pteval_t) * 2, (unsigned long long)__entry->pteval)
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);
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2011-06-21 08:48:40 +08:00
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#define DEFINE_XEN_MMU_SET_PTE(name) \
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DEFINE_EVENT(xen_mmu__set_pte, name, \
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TP_PROTO(pte_t *ptep, pte_t pteval), \
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TP_ARGS(ptep, pteval))
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DEFINE_XEN_MMU_SET_PTE(xen_mmu_set_pte);
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2010-12-17 09:02:35 +08:00
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TRACE_EVENT(xen_mmu_set_pte_at,
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TP_PROTO(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pteval),
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TP_ARGS(mm, addr, ptep, pteval),
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TP_STRUCT__entry(
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__field(struct mm_struct *, mm)
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__field(unsigned long, addr)
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__field(pte_t *, ptep)
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__field(pteval_t, pteval)
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),
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TP_fast_assign(__entry->mm = mm;
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__entry->addr = addr;
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__entry->ptep = ptep;
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__entry->pteval = pteval.pte),
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TP_printk("mm %p addr %lx ptep %p pteval %0*llx (raw %0*llx)",
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__entry->mm, __entry->addr, __entry->ptep,
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(int)sizeof(pteval_t) * 2, (unsigned long long)pte_val(native_make_pte(__entry->pteval)),
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(int)sizeof(pteval_t) * 2, (unsigned long long)__entry->pteval)
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);
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2017-06-01 05:56:52 +08:00
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TRACE_DEFINE_SIZEOF(pmdval_t);
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2010-12-17 09:02:35 +08:00
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TRACE_EVENT(xen_mmu_set_pmd,
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TP_PROTO(pmd_t *pmdp, pmd_t pmdval),
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TP_ARGS(pmdp, pmdval),
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TP_STRUCT__entry(
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__field(pmd_t *, pmdp)
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__field(pmdval_t, pmdval)
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),
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TP_fast_assign(__entry->pmdp = pmdp;
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__entry->pmdval = pmdval.pmd),
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TP_printk("pmdp %p pmdval %0*llx (raw %0*llx)",
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__entry->pmdp,
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(int)sizeof(pmdval_t) * 2, (unsigned long long)pmd_val(native_make_pmd(__entry->pmdval)),
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(int)sizeof(pmdval_t) * 2, (unsigned long long)__entry->pmdval)
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);
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2017-10-11 07:12:56 +08:00
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#ifdef CONFIG_X86_PAE
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DEFINE_XEN_MMU_SET_PTE(xen_mmu_set_pte_atomic);
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TRACE_EVENT(xen_mmu_pte_clear,
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TP_PROTO(struct mm_struct *mm, unsigned long addr, pte_t *ptep),
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TP_ARGS(mm, addr, ptep),
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TP_STRUCT__entry(
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__field(struct mm_struct *, mm)
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__field(unsigned long, addr)
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__field(pte_t *, ptep)
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),
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TP_fast_assign(__entry->mm = mm;
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__entry->addr = addr;
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__entry->ptep = ptep),
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TP_printk("mm %p addr %lx ptep %p",
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__entry->mm, __entry->addr, __entry->ptep)
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);
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2010-12-17 09:02:35 +08:00
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TRACE_EVENT(xen_mmu_pmd_clear,
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TP_PROTO(pmd_t *pmdp),
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TP_ARGS(pmdp),
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TP_STRUCT__entry(
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__field(pmd_t *, pmdp)
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),
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TP_fast_assign(__entry->pmdp = pmdp),
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TP_printk("pmdp %p", __entry->pmdp)
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);
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2017-10-11 07:12:56 +08:00
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#endif
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2010-12-17 09:02:35 +08:00
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2015-04-15 06:46:14 +08:00
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#if CONFIG_PGTABLE_LEVELS >= 4
|
2010-12-17 09:02:35 +08:00
|
|
|
|
2017-06-01 05:56:52 +08:00
|
|
|
TRACE_DEFINE_SIZEOF(pudval_t);
|
|
|
|
|
|
2010-12-17 09:02:35 +08:00
|
|
|
TRACE_EVENT(xen_mmu_set_pud,
|
|
|
|
|
TP_PROTO(pud_t *pudp, pud_t pudval),
|
|
|
|
|
TP_ARGS(pudp, pudval),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(pud_t *, pudp)
|
|
|
|
|
__field(pudval_t, pudval)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->pudp = pudp;
|
|
|
|
|
__entry->pudval = native_pud_val(pudval)),
|
|
|
|
|
TP_printk("pudp %p pudval %0*llx (raw %0*llx)",
|
|
|
|
|
__entry->pudp,
|
|
|
|
|
(int)sizeof(pudval_t) * 2, (unsigned long long)pud_val(native_make_pud(__entry->pudval)),
|
|
|
|
|
(int)sizeof(pudval_t) * 2, (unsigned long long)__entry->pudval)
|
|
|
|
|
);
|
|
|
|
|
|
2017-06-01 05:56:52 +08:00
|
|
|
TRACE_DEFINE_SIZEOF(p4dval_t);
|
|
|
|
|
|
2017-03-18 02:55:15 +08:00
|
|
|
TRACE_EVENT(xen_mmu_set_p4d,
|
|
|
|
|
TP_PROTO(p4d_t *p4dp, p4d_t *user_p4dp, p4d_t p4dval),
|
|
|
|
|
TP_ARGS(p4dp, user_p4dp, p4dval),
|
2010-12-17 09:02:35 +08:00
|
|
|
TP_STRUCT__entry(
|
2017-03-18 02:55:15 +08:00
|
|
|
__field(p4d_t *, p4dp)
|
|
|
|
|
__field(p4d_t *, user_p4dp)
|
|
|
|
|
__field(p4dval_t, p4dval)
|
2010-12-17 09:02:35 +08:00
|
|
|
),
|
2017-03-18 02:55:15 +08:00
|
|
|
TP_fast_assign(__entry->p4dp = p4dp;
|
|
|
|
|
__entry->user_p4dp = user_p4dp;
|
|
|
|
|
__entry->p4dval = p4d_val(p4dval)),
|
|
|
|
|
TP_printk("p4dp %p user_p4dp %p p4dval %0*llx (raw %0*llx)",
|
|
|
|
|
__entry->p4dp, __entry->user_p4dp,
|
|
|
|
|
(int)sizeof(p4dval_t) * 2, (unsigned long long)pgd_val(native_make_pgd(__entry->p4dval)),
|
|
|
|
|
(int)sizeof(p4dval_t) * 2, (unsigned long long)__entry->p4dval)
|
2010-12-17 09:02:35 +08:00
|
|
|
);
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
|
|
TRACE_EVENT(xen_mmu_set_pud,
|
|
|
|
|
TP_PROTO(pud_t *pudp, pud_t pudval),
|
|
|
|
|
TP_ARGS(pudp, pudval),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(pud_t *, pudp)
|
|
|
|
|
__field(pudval_t, pudval)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->pudp = pudp;
|
|
|
|
|
__entry->pudval = native_pud_val(pudval)),
|
|
|
|
|
TP_printk("pudp %p pudval %0*llx (raw %0*llx)",
|
|
|
|
|
__entry->pudp,
|
|
|
|
|
(int)sizeof(pudval_t) * 2, (unsigned long long)pgd_val(native_make_pgd(__entry->pudval)),
|
|
|
|
|
(int)sizeof(pudval_t) * 2, (unsigned long long)__entry->pudval)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
2011-06-21 08:48:40 +08:00
|
|
|
DECLARE_EVENT_CLASS(xen_mmu_ptep_modify_prot,
|
2010-12-17 09:02:35 +08:00
|
|
|
TP_PROTO(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t *ptep, pte_t pteval),
|
|
|
|
|
TP_ARGS(mm, addr, ptep, pteval),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(struct mm_struct *, mm)
|
|
|
|
|
__field(unsigned long, addr)
|
|
|
|
|
__field(pte_t *, ptep)
|
|
|
|
|
__field(pteval_t, pteval)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->mm = mm;
|
|
|
|
|
__entry->addr = addr;
|
|
|
|
|
__entry->ptep = ptep;
|
|
|
|
|
__entry->pteval = pteval.pte),
|
|
|
|
|
TP_printk("mm %p addr %lx ptep %p pteval %0*llx (raw %0*llx)",
|
|
|
|
|
__entry->mm, __entry->addr, __entry->ptep,
|
|
|
|
|
(int)sizeof(pteval_t) * 2, (unsigned long long)pte_val(native_make_pte(__entry->pteval)),
|
|
|
|
|
(int)sizeof(pteval_t) * 2, (unsigned long long)__entry->pteval)
|
|
|
|
|
);
|
2011-06-21 08:48:40 +08:00
|
|
|
#define DEFINE_XEN_MMU_PTEP_MODIFY_PROT(name) \
|
|
|
|
|
DEFINE_EVENT(xen_mmu_ptep_modify_prot, name, \
|
|
|
|
|
TP_PROTO(struct mm_struct *mm, unsigned long addr, \
|
|
|
|
|
pte_t *ptep, pte_t pteval), \
|
|
|
|
|
TP_ARGS(mm, addr, ptep, pteval))
|
2010-12-17 09:02:35 +08:00
|
|
|
|
2011-06-21 08:48:40 +08:00
|
|
|
DEFINE_XEN_MMU_PTEP_MODIFY_PROT(xen_mmu_ptep_modify_prot_start);
|
|
|
|
|
DEFINE_XEN_MMU_PTEP_MODIFY_PROT(xen_mmu_ptep_modify_prot_commit);
|
2010-12-17 09:02:35 +08:00
|
|
|
|
2010-12-18 06:21:17 +08:00
|
|
|
TRACE_EVENT(xen_mmu_alloc_ptpage,
|
|
|
|
|
TP_PROTO(struct mm_struct *mm, unsigned long pfn, unsigned level, bool pinned),
|
|
|
|
|
TP_ARGS(mm, pfn, level, pinned),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(struct mm_struct *, mm)
|
|
|
|
|
__field(unsigned long, pfn)
|
|
|
|
|
__field(unsigned, level)
|
|
|
|
|
__field(bool, pinned)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->mm = mm;
|
|
|
|
|
__entry->pfn = pfn;
|
|
|
|
|
__entry->level = level;
|
|
|
|
|
__entry->pinned = pinned),
|
|
|
|
|
TP_printk("mm %p pfn %lx level %d %spinned",
|
|
|
|
|
__entry->mm, __entry->pfn, __entry->level,
|
|
|
|
|
__entry->pinned ? "" : "un")
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
TRACE_EVENT(xen_mmu_release_ptpage,
|
|
|
|
|
TP_PROTO(unsigned long pfn, unsigned level, bool pinned),
|
|
|
|
|
TP_ARGS(pfn, level, pinned),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(unsigned long, pfn)
|
|
|
|
|
__field(unsigned, level)
|
|
|
|
|
__field(bool, pinned)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->pfn = pfn;
|
|
|
|
|
__entry->level = level;
|
|
|
|
|
__entry->pinned = pinned),
|
|
|
|
|
TP_printk("pfn %lx level %d %spinned",
|
|
|
|
|
__entry->pfn, __entry->level,
|
|
|
|
|
__entry->pinned ? "" : "un")
|
|
|
|
|
);
|
2010-12-17 09:02:35 +08:00
|
|
|
|
2011-06-21 08:48:40 +08:00
|
|
|
DECLARE_EVENT_CLASS(xen_mmu_pgd,
|
2010-12-18 07:31:23 +08:00
|
|
|
TP_PROTO(struct mm_struct *mm, pgd_t *pgd),
|
|
|
|
|
TP_ARGS(mm, pgd),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(struct mm_struct *, mm)
|
|
|
|
|
__field(pgd_t *, pgd)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->mm = mm;
|
|
|
|
|
__entry->pgd = pgd),
|
|
|
|
|
TP_printk("mm %p pgd %p", __entry->mm, __entry->pgd)
|
|
|
|
|
);
|
2011-06-21 08:48:40 +08:00
|
|
|
#define DEFINE_XEN_MMU_PGD_EVENT(name) \
|
|
|
|
|
DEFINE_EVENT(xen_mmu_pgd, name, \
|
|
|
|
|
TP_PROTO(struct mm_struct *mm, pgd_t *pgd), \
|
|
|
|
|
TP_ARGS(mm, pgd))
|
2010-12-18 07:31:23 +08:00
|
|
|
|
2011-06-21 08:48:40 +08:00
|
|
|
DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_pin);
|
|
|
|
|
DEFINE_XEN_MMU_PGD_EVENT(xen_mmu_pgd_unpin);
|
2010-12-18 07:31:23 +08:00
|
|
|
|
2012-11-01 00:38:31 +08:00
|
|
|
TRACE_EVENT(xen_mmu_flush_tlb_all,
|
|
|
|
|
TP_PROTO(int x),
|
|
|
|
|
TP_ARGS(x),
|
|
|
|
|
TP_STRUCT__entry(__array(char, x, 0)),
|
|
|
|
|
TP_fast_assign((void)x),
|
|
|
|
|
TP_printk("%s", "")
|
|
|
|
|
);
|
|
|
|
|
|
2010-12-21 05:15:04 +08:00
|
|
|
TRACE_EVENT(xen_mmu_flush_tlb,
|
|
|
|
|
TP_PROTO(int x),
|
|
|
|
|
TP_ARGS(x),
|
|
|
|
|
TP_STRUCT__entry(__array(char, x, 0)),
|
|
|
|
|
TP_fast_assign((void)x),
|
|
|
|
|
TP_printk("%s", "")
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
TRACE_EVENT(xen_mmu_flush_tlb_single,
|
|
|
|
|
TP_PROTO(unsigned long addr),
|
|
|
|
|
TP_ARGS(addr),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(unsigned long, addr)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->addr = addr),
|
|
|
|
|
TP_printk("addr %lx", __entry->addr)
|
|
|
|
|
);
|
|
|
|
|
|
|
|
|
|
TRACE_EVENT(xen_mmu_flush_tlb_others,
|
|
|
|
|
TP_PROTO(const struct cpumask *cpus, struct mm_struct *mm,
|
x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
x86 has no flush_tlb_range support in instruction level. Currently the
flush_tlb_range just implemented by flushing all page table. That is not
the best solution for all scenarios. In fact, if we just use 'invlpg' to
flush few lines from TLB, we can get the performance gain from later
remain TLB lines accessing.
But the 'invlpg' instruction costs much of time. Its execution time can
compete with cr3 rewriting, and even a bit more on SNB CPU.
So, on a 512 4KB TLB entries CPU, the balance points is at:
(512 - X) * 100ns(assumed TLB refill cost) =
X(TLB flush entries) * 100ns(assumed invlpg cost)
Here, X is 256, that is 1/2 of 512 entries.
But with the mysterious CPU pre-fetcher and page miss handler Unit, the
assumed TLB refill cost is far lower then 100ns in sequential access. And
2 HT siblings in one core makes the memory access more faster if they are
accessing the same memory. So, in the patch, I just do the change when
the target entries is less than 1/16 of whole active tlb entries.
Actually, I have no data support for the percentage '1/16', so any
suggestions are welcomed.
As to hugetlb, guess due to smaller page table, and smaller active TLB
entries, I didn't see benefit via my benchmark, so no optimizing now.
My micro benchmark show in ideal scenarios, the performance improves 70
percent in reading. And in worst scenario, the reading/writing
performance is similar with unpatched 3.4-rc4 kernel.
Here is the reading data on my 2P * 4cores *HT NHM EP machine, with THP
'always':
multi thread testing, '-t' paramter is thread number:
with patch unpatched 3.4-rc4
./mprotect -t 1 14ns 24ns
./mprotect -t 2 13ns 22ns
./mprotect -t 4 12ns 19ns
./mprotect -t 8 14ns 16ns
./mprotect -t 16 28ns 26ns
./mprotect -t 32 54ns 51ns
./mprotect -t 128 200ns 199ns
Single process with sequencial flushing and memory accessing:
with patch unpatched 3.4-rc4
./mprotect 7ns 11ns
./mprotect -p 4096 -l 8 -n 10240
21ns 21ns
[ hpa: http://lkml.kernel.org/r/1B4B44D9196EFF41AE41FDA404FC0A100BFF94@SHSMSX101.ccr.corp.intel.com
has additional performance numbers. ]
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-3-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:17 +08:00
|
|
|
unsigned long addr, unsigned long end),
|
|
|
|
|
TP_ARGS(cpus, mm, addr, end),
|
2010-12-21 05:15:04 +08:00
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(unsigned, ncpus)
|
|
|
|
|
__field(struct mm_struct *, mm)
|
|
|
|
|
__field(unsigned long, addr)
|
x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
x86 has no flush_tlb_range support in instruction level. Currently the
flush_tlb_range just implemented by flushing all page table. That is not
the best solution for all scenarios. In fact, if we just use 'invlpg' to
flush few lines from TLB, we can get the performance gain from later
remain TLB lines accessing.
But the 'invlpg' instruction costs much of time. Its execution time can
compete with cr3 rewriting, and even a bit more on SNB CPU.
So, on a 512 4KB TLB entries CPU, the balance points is at:
(512 - X) * 100ns(assumed TLB refill cost) =
X(TLB flush entries) * 100ns(assumed invlpg cost)
Here, X is 256, that is 1/2 of 512 entries.
But with the mysterious CPU pre-fetcher and page miss handler Unit, the
assumed TLB refill cost is far lower then 100ns in sequential access. And
2 HT siblings in one core makes the memory access more faster if they are
accessing the same memory. So, in the patch, I just do the change when
the target entries is less than 1/16 of whole active tlb entries.
Actually, I have no data support for the percentage '1/16', so any
suggestions are welcomed.
As to hugetlb, guess due to smaller page table, and smaller active TLB
entries, I didn't see benefit via my benchmark, so no optimizing now.
My micro benchmark show in ideal scenarios, the performance improves 70
percent in reading. And in worst scenario, the reading/writing
performance is similar with unpatched 3.4-rc4 kernel.
Here is the reading data on my 2P * 4cores *HT NHM EP machine, with THP
'always':
multi thread testing, '-t' paramter is thread number:
with patch unpatched 3.4-rc4
./mprotect -t 1 14ns 24ns
./mprotect -t 2 13ns 22ns
./mprotect -t 4 12ns 19ns
./mprotect -t 8 14ns 16ns
./mprotect -t 16 28ns 26ns
./mprotect -t 32 54ns 51ns
./mprotect -t 128 200ns 199ns
Single process with sequencial flushing and memory accessing:
with patch unpatched 3.4-rc4
./mprotect 7ns 11ns
./mprotect -p 4096 -l 8 -n 10240
21ns 21ns
[ hpa: http://lkml.kernel.org/r/1B4B44D9196EFF41AE41FDA404FC0A100BFF94@SHSMSX101.ccr.corp.intel.com
has additional performance numbers. ]
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-3-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:17 +08:00
|
|
|
__field(unsigned long, end)
|
2010-12-21 05:15:04 +08:00
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->ncpus = cpumask_weight(cpus);
|
|
|
|
|
__entry->mm = mm;
|
x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
x86 has no flush_tlb_range support in instruction level. Currently the
flush_tlb_range just implemented by flushing all page table. That is not
the best solution for all scenarios. In fact, if we just use 'invlpg' to
flush few lines from TLB, we can get the performance gain from later
remain TLB lines accessing.
But the 'invlpg' instruction costs much of time. Its execution time can
compete with cr3 rewriting, and even a bit more on SNB CPU.
So, on a 512 4KB TLB entries CPU, the balance points is at:
(512 - X) * 100ns(assumed TLB refill cost) =
X(TLB flush entries) * 100ns(assumed invlpg cost)
Here, X is 256, that is 1/2 of 512 entries.
But with the mysterious CPU pre-fetcher and page miss handler Unit, the
assumed TLB refill cost is far lower then 100ns in sequential access. And
2 HT siblings in one core makes the memory access more faster if they are
accessing the same memory. So, in the patch, I just do the change when
the target entries is less than 1/16 of whole active tlb entries.
Actually, I have no data support for the percentage '1/16', so any
suggestions are welcomed.
As to hugetlb, guess due to smaller page table, and smaller active TLB
entries, I didn't see benefit via my benchmark, so no optimizing now.
My micro benchmark show in ideal scenarios, the performance improves 70
percent in reading. And in worst scenario, the reading/writing
performance is similar with unpatched 3.4-rc4 kernel.
Here is the reading data on my 2P * 4cores *HT NHM EP machine, with THP
'always':
multi thread testing, '-t' paramter is thread number:
with patch unpatched 3.4-rc4
./mprotect -t 1 14ns 24ns
./mprotect -t 2 13ns 22ns
./mprotect -t 4 12ns 19ns
./mprotect -t 8 14ns 16ns
./mprotect -t 16 28ns 26ns
./mprotect -t 32 54ns 51ns
./mprotect -t 128 200ns 199ns
Single process with sequencial flushing and memory accessing:
with patch unpatched 3.4-rc4
./mprotect 7ns 11ns
./mprotect -p 4096 -l 8 -n 10240
21ns 21ns
[ hpa: http://lkml.kernel.org/r/1B4B44D9196EFF41AE41FDA404FC0A100BFF94@SHSMSX101.ccr.corp.intel.com
has additional performance numbers. ]
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-3-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:17 +08:00
|
|
|
__entry->addr = addr,
|
|
|
|
|
__entry->end = end),
|
|
|
|
|
TP_printk("ncpus %d mm %p addr %lx, end %lx",
|
|
|
|
|
__entry->ncpus, __entry->mm, __entry->addr, __entry->end)
|
2010-12-21 05:15:04 +08:00
|
|
|
);
|
|
|
|
|
|
|
|
|
|
TRACE_EVENT(xen_mmu_write_cr3,
|
|
|
|
|
TP_PROTO(bool kernel, unsigned long cr3),
|
|
|
|
|
TP_ARGS(kernel, cr3),
|
|
|
|
|
TP_STRUCT__entry(
|
|
|
|
|
__field(bool, kernel)
|
|
|
|
|
__field(unsigned long, cr3)
|
|
|
|
|
),
|
|
|
|
|
TP_fast_assign(__entry->kernel = kernel;
|
|
|
|
|
__entry->cr3 = cr3),
|
|
|
|
|
TP_printk("%s cr3 %lx",
|
|
|
|
|
__entry->kernel ? "kernel" : "user", __entry->cr3)
|
|
|
|
|
);
|
|
|
|
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2010-12-18 07:54:28 +08:00
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/* CPU */
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TRACE_EVENT(xen_cpu_write_ldt_entry,
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TP_PROTO(struct desc_struct *dt, int entrynum, u64 desc),
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TP_ARGS(dt, entrynum, desc),
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TP_STRUCT__entry(
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__field(struct desc_struct *, dt)
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__field(int, entrynum)
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__field(u64, desc)
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),
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TP_fast_assign(__entry->dt = dt;
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__entry->entrynum = entrynum;
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__entry->desc = desc;
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),
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TP_printk("dt %p entrynum %d entry %016llx",
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__entry->dt, __entry->entrynum,
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(unsigned long long)__entry->desc)
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);
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TRACE_EVENT(xen_cpu_write_idt_entry,
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TP_PROTO(gate_desc *dt, int entrynum, const gate_desc *ent),
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TP_ARGS(dt, entrynum, ent),
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TP_STRUCT__entry(
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__field(gate_desc *, dt)
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__field(int, entrynum)
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),
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TP_fast_assign(__entry->dt = dt;
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__entry->entrynum = entrynum;
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),
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TP_printk("dt %p entrynum %d",
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__entry->dt, __entry->entrynum)
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);
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TRACE_EVENT(xen_cpu_load_idt,
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TP_PROTO(const struct desc_ptr *desc),
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TP_ARGS(desc),
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TP_STRUCT__entry(
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__field(unsigned long, addr)
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),
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TP_fast_assign(__entry->addr = desc->address),
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TP_printk("addr %lx", __entry->addr)
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);
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TRACE_EVENT(xen_cpu_write_gdt_entry,
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TP_PROTO(struct desc_struct *dt, int entrynum, const void *desc, int type),
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TP_ARGS(dt, entrynum, desc, type),
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TP_STRUCT__entry(
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__field(u64, desc)
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__field(struct desc_struct *, dt)
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__field(int, entrynum)
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__field(int, type)
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),
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TP_fast_assign(__entry->dt = dt;
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__entry->entrynum = entrynum;
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__entry->desc = *(u64 *)desc;
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__entry->type = type;
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),
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TP_printk("dt %p entrynum %d type %d desc %016llx",
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__entry->dt, __entry->entrynum, __entry->type,
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(unsigned long long)__entry->desc)
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);
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TRACE_EVENT(xen_cpu_set_ldt,
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TP_PROTO(const void *addr, unsigned entries),
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TP_ARGS(addr, entries),
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TP_STRUCT__entry(
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__field(const void *, addr)
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__field(unsigned, entries)
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),
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TP_fast_assign(__entry->addr = addr;
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__entry->entries = entries),
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TP_printk("addr %p entries %u",
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__entry->addr, __entry->entries)
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);
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2010-12-17 05:39:18 +08:00
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#endif /* _TRACE_XEN_H */
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/* This part must be outside protection */
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#include <trace/define_trace.h>
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