2012-04-11 12:17:01 +08:00
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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*
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/stat.h>
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#include <linux/sysfs.h>
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2012-05-26 07:56:25 +08:00
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#include "intel_drv.h"
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2012-04-11 12:17:01 +08:00
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#include "i915_drv.h"
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2016-08-22 18:32:43 +08:00
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static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
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2016-08-22 18:32:42 +08:00
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{
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2016-08-22 18:32:43 +08:00
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struct drm_minor *minor = dev_get_drvdata(kdev);
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return to_i915(minor->dev);
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2016-08-22 18:32:42 +08:00
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}
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2013-10-11 12:45:30 +08:00
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2012-07-01 11:45:07 +08:00
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#ifdef CONFIG_PM
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2016-08-22 18:32:43 +08:00
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static u32 calc_residency(struct drm_i915_private *dev_priv,
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drm/i915: Type safe register read/write
Make I915_READ and I915_WRITE more type safe by wrapping the register
offset in a struct. This should eliminate most of the fumbles we've had
with misplaced parens.
This only takes care of normal mmio registers. We could extend the idea
to other register types and define each with its own struct. That way
you wouldn't be able to accidentally pass the wrong thing to a specific
register access function.
The gpio_reg setup is probably the ugliest thing left. But I figure I'd
just leave it for now, and wait for some divine inspiration to strike
before making it nice.
As for the generated code, it's actually a bit better sometimes. Eg.
looking at i915_irq_handler(), we can see the following change:
lea 0x70024(%rdx,%rax,1),%r9d
mov $0x1,%edx
- movslq %r9d,%r9
- mov %r9,%rsi
- mov %r9,-0x58(%rbp)
- callq *0xd8(%rbx)
+ mov %r9d,%esi
+ mov %r9d,-0x48(%rbp)
callq *0xd8(%rbx)
So previously gcc thought the register offset might be signed and
decided to sign extend it, just in case. The rest appears to be
mostly just minor shuffling of instructions.
v2: i915_mmio_reg_{offset,equal,valid}() helpers added
s/_REG/_MMIO/ in the register defines
mo more switch statements left to worry about
ring_emit stuff got sorted in a prep patch
cmd parser, lrc context and w/a batch buildup also in prep patch
vgpu stuff cleaned up and moved to a prep patch
all other unrelated changes split out
v3: Rebased due to BXT DSI/BLC, MOCS, etc.
v4: Rebased due to churn, s/i915_mmio_reg_t/i915_reg_t/
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1447853606-2751-1-git-send-email-ville.syrjala@linux.intel.com
2015-11-18 21:33:26 +08:00
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i915_reg_t reg)
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2012-04-11 12:17:01 +08:00
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{
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2017-11-22 02:18:51 +08:00
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u64 res;
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intel_runtime_pm_get(dev_priv);
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res = intel_rc6_residency_us(dev_priv, reg);
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intel_runtime_pm_put(dev_priv);
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return DIV_ROUND_CLOSEST_ULL(res, 1000);
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2012-04-11 12:17:01 +08:00
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}
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static ssize_t
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2012-09-08 10:43:38 +08:00
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show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
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2012-04-11 12:17:01 +08:00
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{
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2017-12-01 19:30:30 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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unsigned int mask;
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mask = 0;
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if (HAS_RC6(dev_priv))
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mask |= BIT(0);
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if (HAS_RC6p(dev_priv))
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mask |= BIT(1);
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if (HAS_RC6pp(dev_priv))
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mask |= BIT(2);
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return snprintf(buf, PAGE_SIZE, "%x\n", mask);
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2012-04-11 12:17:01 +08:00
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}
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static ssize_t
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2012-09-08 10:43:38 +08:00
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show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
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2012-04-11 12:17:01 +08:00
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{
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2016-08-22 18:32:43 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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u32 rc6_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6);
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2013-02-14 16:42:11 +08:00
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return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
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2012-04-11 12:17:01 +08:00
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}
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static ssize_t
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2012-09-08 10:43:38 +08:00
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show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
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2012-04-11 12:17:01 +08:00
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{
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2016-08-22 18:32:43 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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u32 rc6p_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6p);
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2013-02-14 16:42:11 +08:00
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return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
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2012-04-11 12:17:01 +08:00
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}
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static ssize_t
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2012-09-08 10:43:38 +08:00
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show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
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2012-04-11 12:17:01 +08:00
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{
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2016-08-22 18:32:43 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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u32 rc6pp_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6pp);
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2013-02-14 16:42:11 +08:00
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return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
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2012-04-11 12:17:01 +08:00
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}
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2015-02-26 23:40:27 +08:00
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static ssize_t
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show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
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{
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2016-08-22 18:32:43 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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u32 rc6_residency = calc_residency(dev_priv, VLV_GT_MEDIA_RC6);
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2015-02-26 23:40:27 +08:00
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return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
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}
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2012-04-11 12:17:01 +08:00
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static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
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static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
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static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
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static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
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2015-02-26 23:40:27 +08:00
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static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, show_media_rc6_ms, NULL);
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2012-04-11 12:17:01 +08:00
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static struct attribute *rc6_attrs[] = {
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&dev_attr_rc6_enable.attr,
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&dev_attr_rc6_residency_ms.attr,
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NULL
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};
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2017-07-03 19:08:25 +08:00
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static const struct attribute_group rc6_attr_group = {
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2012-04-11 12:17:01 +08:00
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.name = power_group_name,
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.attrs = rc6_attrs
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};
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2014-10-07 22:06:50 +08:00
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static struct attribute *rc6p_attrs[] = {
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&dev_attr_rc6p_residency_ms.attr,
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&dev_attr_rc6pp_residency_ms.attr,
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NULL
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};
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2017-07-03 19:08:25 +08:00
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static const struct attribute_group rc6p_attr_group = {
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2014-10-07 22:06:50 +08:00
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.name = power_group_name,
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.attrs = rc6p_attrs
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};
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2015-02-26 23:40:27 +08:00
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static struct attribute *media_rc6_attrs[] = {
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&dev_attr_media_rc6_residency_ms.attr,
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NULL
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};
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2017-07-03 19:08:25 +08:00
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static const struct attribute_group media_rc6_attr_group = {
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2015-02-26 23:40:27 +08:00
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.name = power_group_name,
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.attrs = media_rc6_attrs
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};
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2012-09-02 15:24:40 +08:00
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#endif
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2012-04-11 12:17:01 +08:00
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2016-08-22 18:32:43 +08:00
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static int l3_access_valid(struct drm_i915_private *dev_priv, loff_t offset)
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2012-05-26 07:56:25 +08:00
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{
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2016-08-22 18:32:43 +08:00
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if (!HAS_L3_DPF(dev_priv))
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2012-05-26 07:56:25 +08:00
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return -EPERM;
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if (offset % 4 != 0)
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return -EINVAL;
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if (offset >= GEN7_L3LOG_SIZE)
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return -ENXIO;
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return 0;
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}
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static ssize_t
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i915_l3_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf,
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loff_t offset, size_t count)
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{
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2016-08-22 18:32:42 +08:00
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struct device *kdev = kobj_to_dev(kobj);
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2016-08-22 18:32:43 +08:00
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struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
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struct drm_device *dev = &dev_priv->drm;
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2013-09-20 02:13:41 +08:00
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int slice = (int)(uintptr_t)attr->private;
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drm/i915: Do remaps for all contexts
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to run.
Not that due to the asynchronous nature of the sysfs entry, there is no
point modifying the registers for the existing context. Instead we set a
flag for all contexts to load the correct remapping information on the
next run. Interested clients can use debugfs to determine whether or not
the row has been remapped.
One could propose at this point that we just do the remapping in the
kernel. I guess since we have to maintain the sysfs interface anyway,
I'm not sure how useful it is, and I do like keeping the policy in
userspace; (it wasn't my original decision to make the
interface the way it is, so I'm not attached).
v2: Force a context switch when we have a remap on the next switch.
(Ville)
Don't let userspace use the interface with disabled contexts.
v3: Don't force a context switch, just let it nop
Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
rewrote it to avoid a second round of confusion.
Error print moved to error path (All Ville)
Added a comment on why the slice remap initialization happens.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-19 10:03:18 +08:00
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int ret;
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2012-05-26 07:56:25 +08:00
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2013-09-13 13:28:28 +08:00
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count = round_down(count, 4);
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2016-08-22 18:32:43 +08:00
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ret = l3_access_valid(dev_priv, offset);
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2012-05-26 07:56:25 +08:00
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if (ret)
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return ret;
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2013-09-20 19:20:18 +08:00
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count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
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2013-09-13 13:28:29 +08:00
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2016-08-22 18:32:42 +08:00
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ret = i915_mutex_lock_interruptible(dev);
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2012-05-26 07:56:25 +08:00
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if (ret)
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return ret;
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drm/i915: Do remaps for all contexts
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to run.
Not that due to the asynchronous nature of the sysfs entry, there is no
point modifying the registers for the existing context. Instead we set a
flag for all contexts to load the correct remapping information on the
next run. Interested clients can use debugfs to determine whether or not
the row has been remapped.
One could propose at this point that we just do the remapping in the
kernel. I guess since we have to maintain the sysfs interface anyway,
I'm not sure how useful it is, and I do like keeping the policy in
userspace; (it wasn't my original decision to make the
interface the way it is, so I'm not attached).
v2: Force a context switch when we have a remap on the next switch.
(Ville)
Don't let userspace use the interface with disabled contexts.
v3: Don't force a context switch, just let it nop
Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
rewrote it to avoid a second round of confusion.
Error print moved to error path (All Ville)
Added a comment on why the slice remap initialization happens.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-19 10:03:18 +08:00
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if (dev_priv->l3_parity.remap_info[slice])
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memcpy(buf,
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dev_priv->l3_parity.remap_info[slice] + (offset/4),
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count);
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else
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memset(buf, 0, count);
|
2012-05-26 07:56:25 +08:00
|
|
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|
2016-08-22 18:32:42 +08:00
|
|
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mutex_unlock(&dev->struct_mutex);
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2012-05-26 07:56:25 +08:00
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2013-09-18 12:12:42 +08:00
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return count;
|
2012-05-26 07:56:25 +08:00
|
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}
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|
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static ssize_t
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i915_l3_write(struct file *filp, struct kobject *kobj,
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|
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struct bin_attribute *attr, char *buf,
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loff_t offset, size_t count)
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|
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{
|
2016-08-22 18:32:42 +08:00
|
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struct device *kdev = kobj_to_dev(kobj);
|
2016-08-22 18:32:43 +08:00
|
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|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
|
|
|
struct drm_device *dev = &dev_priv->drm;
|
2016-05-24 21:53:34 +08:00
|
|
|
struct i915_gem_context *ctx;
|
2013-09-20 02:13:41 +08:00
|
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|
int slice = (int)(uintptr_t)attr->private;
|
2017-04-28 15:58:39 +08:00
|
|
|
u32 **remap_info;
|
2012-05-26 07:56:25 +08:00
|
|
|
int ret;
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|
|
|
|
2016-08-22 18:32:43 +08:00
|
|
|
ret = l3_access_valid(dev_priv, offset);
|
2012-05-26 07:56:25 +08:00
|
|
|
if (ret)
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|
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|
return ret;
|
|
|
|
|
2016-08-22 18:32:42 +08:00
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
2012-05-26 07:56:25 +08:00
|
|
|
if (ret)
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|
return ret;
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|
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|
2017-04-28 15:58:39 +08:00
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|
|
remap_info = &dev_priv->l3_parity.remap_info[slice];
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|
|
|
if (!*remap_info) {
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|
|
|
*remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
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|
|
|
if (!*remap_info) {
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ret = -ENOMEM;
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goto out;
|
2012-05-26 07:56:25 +08:00
|
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|
}
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|
|
|
}
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|
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/* TODO: Ideally we really want a GPU reset here to make sure errors
|
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* aren't propagated. Since I cannot find a stable way to reset the GPU
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* at this point it is left as a TODO.
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|
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|
*/
|
2017-04-28 15:58:39 +08:00
|
|
|
memcpy(*remap_info + (offset/4), buf, count);
|
2012-05-26 07:56:25 +08:00
|
|
|
|
drm/i915: Do remaps for all contexts
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to run.
Not that due to the asynchronous nature of the sysfs entry, there is no
point modifying the registers for the existing context. Instead we set a
flag for all contexts to load the correct remapping information on the
next run. Interested clients can use debugfs to determine whether or not
the row has been remapped.
One could propose at this point that we just do the remapping in the
kernel. I guess since we have to maintain the sysfs interface anyway,
I'm not sure how useful it is, and I do like keeping the policy in
userspace; (it wasn't my original decision to make the
interface the way it is, so I'm not attached).
v2: Force a context switch when we have a remap on the next switch.
(Ville)
Don't let userspace use the interface with disabled contexts.
v3: Don't force a context switch, just let it nop
Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
rewrote it to avoid a second round of confusion.
Error print moved to error path (All Ville)
Added a comment on why the slice remap initialization happens.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-19 10:03:18 +08:00
|
|
|
/* NB: We defer the remapping until we switch to the context */
|
2017-06-20 19:05:45 +08:00
|
|
|
list_for_each_entry(ctx, &dev_priv->contexts.list, link)
|
drm/i915: Do remaps for all contexts
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to run.
Not that due to the asynchronous nature of the sysfs entry, there is no
point modifying the registers for the existing context. Instead we set a
flag for all contexts to load the correct remapping information on the
next run. Interested clients can use debugfs to determine whether or not
the row has been remapped.
One could propose at this point that we just do the remapping in the
kernel. I guess since we have to maintain the sysfs interface anyway,
I'm not sure how useful it is, and I do like keeping the policy in
userspace; (it wasn't my original decision to make the
interface the way it is, so I'm not attached).
v2: Force a context switch when we have a remap on the next switch.
(Ville)
Don't let userspace use the interface with disabled contexts.
v3: Don't force a context switch, just let it nop
Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
rewrote it to avoid a second round of confusion.
Error print moved to error path (All Ville)
Added a comment on why the slice remap initialization happens.
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-19 10:03:18 +08:00
|
|
|
ctx->remap_slice |= (1<<slice);
|
2012-05-26 07:56:25 +08:00
|
|
|
|
2017-04-28 15:58:39 +08:00
|
|
|
ret = count;
|
|
|
|
|
|
|
|
out:
|
2016-08-22 18:32:42 +08:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2012-05-26 07:56:25 +08:00
|
|
|
|
2017-04-28 15:58:39 +08:00
|
|
|
return ret;
|
2012-05-26 07:56:25 +08:00
|
|
|
}
|
|
|
|
|
2017-08-03 01:20:47 +08:00
|
|
|
static const struct bin_attribute dpf_attrs = {
|
2012-05-26 07:56:25 +08:00
|
|
|
.attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
|
|
|
|
.size = GEN7_L3LOG_SIZE,
|
|
|
|
.read = i915_l3_read,
|
|
|
|
.write = i915_l3_write,
|
2013-09-20 02:13:41 +08:00
|
|
|
.mmap = NULL,
|
|
|
|
.private = (void *)0
|
|
|
|
};
|
|
|
|
|
2017-08-03 01:20:47 +08:00
|
|
|
static const struct bin_attribute dpf_attrs_1 = {
|
2013-09-20 02:13:41 +08:00
|
|
|
.attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
|
|
|
|
.size = GEN7_L3LOG_SIZE,
|
|
|
|
.read = i915_l3_read,
|
|
|
|
.write = i915_l3_write,
|
|
|
|
.mmap = NULL,
|
|
|
|
.private = (void *)1
|
2012-05-26 07:56:25 +08:00
|
|
|
};
|
|
|
|
|
2015-01-24 03:04:24 +08:00
|
|
|
static ssize_t gt_act_freq_mhz_show(struct device *kdev,
|
2012-09-08 10:43:40 +08:00
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2012-09-08 10:43:40 +08:00
|
|
|
int ret;
|
|
|
|
|
2014-04-15 01:24:27 +08:00
|
|
|
intel_runtime_pm_get(dev_priv);
|
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_lock(&dev_priv->pcu_lock);
|
2015-12-10 04:29:35 +08:00
|
|
|
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
|
2013-05-03 01:48:07 +08:00
|
|
|
u32 freq;
|
2013-05-22 20:36:20 +08:00
|
|
|
freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
|
drm/i915: Use intel_gpu_freq() and intel_freq_opcode()
Replace all the vlv_gpu_freq(), vlv_freq_opcode(),
*GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances
with intel_gpu_freq() and intel_freq_opcode() calls.
Most of the change was performed with the following semantic patch:
@@
expression E;
@@
(
- E * GT_FREQUENCY_MULTIPLIER
+ intel_gpu_freq(dev_priv, E)
|
- E *= GT_FREQUENCY_MULTIPLIER
+ E = intel_gpu_freq(dev_priv, E)
|
- E /= GT_FREQUENCY_MULTIPLIER
+ E = intel_freq_opcode(dev_priv, E)
|
- do_div(E, GT_FREQUENCY_MULTIPLIER)
+ E = intel_freq_opcode(dev_priv, E)
)
@@
expression E1, E2;
@@
(
- vlv_gpu_freq(E1, E2)
+ intel_gpu_freq(E1, E2)
|
- vlv_freq_opcode(E1, E2)
+ intel_freq_opcode(E1, E2)
)
@@
expression E1, E2, E3, E4;
@@
(
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_gpu_freq(E3, E4);
- } else {
- E2 = intel_gpu_freq(E3, E4);
- }
+ E2 = intel_gpu_freq(E3, E4);
|
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_freq_opcode(E3, E4);
- } else {
- E2 = intel_freq_opcode(E3, E4);
- }
+ E2 = intel_freq_opcode(E3, E4);
)
One hunk was manually undone as intel_gpu_freq() ended up
calling itself. Supposedly it would be possible to exclude
certain functions via !=~, but I couldn't get that to work.
Also the removal of vlv_gpu_freq() and vlv_opcode_freq() compat
wrappers was done manually.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-24 03:04:26 +08:00
|
|
|
ret = intel_gpu_freq(dev_priv, (freq >> 8) & 0xff);
|
2015-01-24 03:04:24 +08:00
|
|
|
} else {
|
2017-11-22 02:18:44 +08:00
|
|
|
ret = intel_gpu_freq(dev_priv,
|
|
|
|
intel_get_cagf(dev_priv,
|
|
|
|
I915_READ(GEN6_RPSTAT1)));
|
2015-01-24 03:04:24 +08:00
|
|
|
}
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2015-01-24 03:04:24 +08:00
|
|
|
|
|
|
|
intel_runtime_pm_put(dev_priv);
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2012-09-08 10:43:40 +08:00
|
|
|
|
2016-07-13 16:10:36 +08:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n",
|
|
|
|
intel_gpu_freq(dev_priv,
|
2017-10-11 05:30:06 +08:00
|
|
|
dev_priv->gt_pm.rps.cur_freq));
|
2012-09-08 10:43:40 +08:00
|
|
|
}
|
|
|
|
|
2016-07-13 16:10:35 +08:00
|
|
|
static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2016-07-13 16:10:35 +08:00
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n",
|
2016-07-13 16:10:36 +08:00
|
|
|
intel_gpu_freq(dev_priv,
|
2017-10-11 05:30:06 +08:00
|
|
|
dev_priv->gt_pm.rps.boost_freq));
|
2016-07-13 16:10:35 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2017-10-11 05:30:06 +08:00
|
|
|
struct intel_rps *rps = &dev_priv->gt_pm.rps;
|
2018-03-08 22:26:47 +08:00
|
|
|
bool boost = false;
|
2016-07-13 16:10:35 +08:00
|
|
|
ssize_t ret;
|
2018-03-08 22:26:47 +08:00
|
|
|
u32 val;
|
2016-07-13 16:10:35 +08:00
|
|
|
|
|
|
|
ret = kstrtou32(buf, 0, &val);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* Validate against (static) hardware limits */
|
|
|
|
val = intel_freq_opcode(dev_priv, val);
|
2017-10-11 05:30:06 +08:00
|
|
|
if (val < rps->min_freq || val > rps->max_freq)
|
2016-07-13 16:10:35 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_lock(&dev_priv->pcu_lock);
|
2018-03-08 22:26:47 +08:00
|
|
|
if (val != rps->boost_freq) {
|
|
|
|
rps->boost_freq = val;
|
|
|
|
boost = atomic_read(&rps->num_waiters);
|
|
|
|
}
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2018-03-08 22:26:47 +08:00
|
|
|
if (boost)
|
|
|
|
schedule_work(&rps->work);
|
2016-07-13 16:10:35 +08:00
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2013-08-26 23:18:54 +08:00
|
|
|
static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2013-08-26 23:18:54 +08:00
|
|
|
|
2016-07-13 16:10:36 +08:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n",
|
|
|
|
intel_gpu_freq(dev_priv,
|
2017-10-11 05:30:06 +08:00
|
|
|
dev_priv->gt_pm.rps.efficient_freq));
|
2013-08-26 23:18:54 +08:00
|
|
|
}
|
|
|
|
|
2012-09-08 10:43:40 +08:00
|
|
|
static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2013-09-17 05:56:43 +08:00
|
|
|
|
2016-07-13 16:10:36 +08:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n",
|
|
|
|
intel_gpu_freq(dev_priv,
|
2017-10-11 05:30:06 +08:00
|
|
|
dev_priv->gt_pm.rps.max_freq_softlimit));
|
2012-09-08 10:43:40 +08:00
|
|
|
}
|
|
|
|
|
2012-09-13 09:12:07 +08:00
|
|
|
static ssize_t gt_max_freq_mhz_store(struct device *kdev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2017-10-11 05:30:06 +08:00
|
|
|
struct intel_rps *rps = &dev_priv->gt_pm.rps;
|
2014-03-20 09:31:13 +08:00
|
|
|
u32 val;
|
2012-09-13 09:12:07 +08:00
|
|
|
ssize_t ret;
|
|
|
|
|
|
|
|
ret = kstrtou32(buf, 0, &val);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_get(dev_priv);
|
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_lock(&dev_priv->pcu_lock);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
drm/i915: Use intel_gpu_freq() and intel_freq_opcode()
Replace all the vlv_gpu_freq(), vlv_freq_opcode(),
*GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances
with intel_gpu_freq() and intel_freq_opcode() calls.
Most of the change was performed with the following semantic patch:
@@
expression E;
@@
(
- E * GT_FREQUENCY_MULTIPLIER
+ intel_gpu_freq(dev_priv, E)
|
- E *= GT_FREQUENCY_MULTIPLIER
+ E = intel_gpu_freq(dev_priv, E)
|
- E /= GT_FREQUENCY_MULTIPLIER
+ E = intel_freq_opcode(dev_priv, E)
|
- do_div(E, GT_FREQUENCY_MULTIPLIER)
+ E = intel_freq_opcode(dev_priv, E)
)
@@
expression E1, E2;
@@
(
- vlv_gpu_freq(E1, E2)
+ intel_gpu_freq(E1, E2)
|
- vlv_freq_opcode(E1, E2)
+ intel_freq_opcode(E1, E2)
)
@@
expression E1, E2, E3, E4;
@@
(
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_gpu_freq(E3, E4);
- } else {
- E2 = intel_gpu_freq(E3, E4);
- }
+ E2 = intel_gpu_freq(E3, E4);
|
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_freq_opcode(E3, E4);
- } else {
- E2 = intel_freq_opcode(E3, E4);
- }
+ E2 = intel_freq_opcode(E3, E4);
)
One hunk was manually undone as intel_gpu_freq() ended up
calling itself. Supposedly it would be possible to exclude
certain functions via !=~, but I couldn't get that to work.
Also the removal of vlv_gpu_freq() and vlv_opcode_freq() compat
wrappers was done manually.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-24 03:04:26 +08:00
|
|
|
val = intel_freq_opcode(dev_priv, val);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
if (val < rps->min_freq ||
|
|
|
|
val > rps->max_freq ||
|
|
|
|
val < rps->min_freq_softlimit) {
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_put(dev_priv);
|
2012-09-13 09:12:07 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
if (val > rps->rp0_freq)
|
2013-04-06 05:29:22 +08:00
|
|
|
DRM_DEBUG("User requested overclocking to %d\n",
|
drm/i915: Use intel_gpu_freq() and intel_freq_opcode()
Replace all the vlv_gpu_freq(), vlv_freq_opcode(),
*GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances
with intel_gpu_freq() and intel_freq_opcode() calls.
Most of the change was performed with the following semantic patch:
@@
expression E;
@@
(
- E * GT_FREQUENCY_MULTIPLIER
+ intel_gpu_freq(dev_priv, E)
|
- E *= GT_FREQUENCY_MULTIPLIER
+ E = intel_gpu_freq(dev_priv, E)
|
- E /= GT_FREQUENCY_MULTIPLIER
+ E = intel_freq_opcode(dev_priv, E)
|
- do_div(E, GT_FREQUENCY_MULTIPLIER)
+ E = intel_freq_opcode(dev_priv, E)
)
@@
expression E1, E2;
@@
(
- vlv_gpu_freq(E1, E2)
+ intel_gpu_freq(E1, E2)
|
- vlv_freq_opcode(E1, E2)
+ intel_freq_opcode(E1, E2)
)
@@
expression E1, E2, E3, E4;
@@
(
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_gpu_freq(E3, E4);
- } else {
- E2 = intel_gpu_freq(E3, E4);
- }
+ E2 = intel_gpu_freq(E3, E4);
|
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_freq_opcode(E3, E4);
- } else {
- E2 = intel_freq_opcode(E3, E4);
- }
+ E2 = intel_freq_opcode(E3, E4);
)
One hunk was manually undone as intel_gpu_freq() ended up
calling itself. Supposedly it would be possible to exclude
certain functions via !=~, but I couldn't get that to work.
Also the removal of vlv_gpu_freq() and vlv_opcode_freq() compat
wrappers was done manually.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-24 03:04:26 +08:00
|
|
|
intel_gpu_freq(dev_priv, val));
|
2013-04-06 05:29:22 +08:00
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
rps->max_freq_softlimit = val;
|
2013-11-06 23:56:26 +08:00
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
val = clamp_t(int, rps->cur_freq,
|
|
|
|
rps->min_freq_softlimit,
|
|
|
|
rps->max_freq_softlimit);
|
2015-01-24 03:04:23 +08:00
|
|
|
|
|
|
|
/* We still need *_set_rps to process the new max_delay and
|
|
|
|
* update the interrupt limits and PMINTRMSK even though
|
|
|
|
* frequency request may be unchanged. */
|
2017-01-26 18:19:19 +08:00
|
|
|
ret = intel_set_rps(dev_priv, val);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_put(dev_priv);
|
|
|
|
|
2017-01-26 18:19:19 +08:00
|
|
|
return ret ?: count;
|
2012-09-13 09:12:07 +08:00
|
|
|
}
|
|
|
|
|
2012-09-08 10:43:40 +08:00
|
|
|
static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2012-09-08 10:43:40 +08:00
|
|
|
|
2016-07-13 16:10:36 +08:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n",
|
|
|
|
intel_gpu_freq(dev_priv,
|
2017-10-11 05:30:06 +08:00
|
|
|
dev_priv->gt_pm.rps.min_freq_softlimit));
|
2012-09-08 10:43:40 +08:00
|
|
|
}
|
|
|
|
|
2012-09-13 09:12:07 +08:00
|
|
|
static ssize_t gt_min_freq_mhz_store(struct device *kdev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2017-10-11 05:30:06 +08:00
|
|
|
struct intel_rps *rps = &dev_priv->gt_pm.rps;
|
2014-03-20 09:31:13 +08:00
|
|
|
u32 val;
|
2012-09-13 09:12:07 +08:00
|
|
|
ssize_t ret;
|
|
|
|
|
|
|
|
ret = kstrtou32(buf, 0, &val);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_get(dev_priv);
|
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_lock(&dev_priv->pcu_lock);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
drm/i915: Use intel_gpu_freq() and intel_freq_opcode()
Replace all the vlv_gpu_freq(), vlv_freq_opcode(),
*GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances
with intel_gpu_freq() and intel_freq_opcode() calls.
Most of the change was performed with the following semantic patch:
@@
expression E;
@@
(
- E * GT_FREQUENCY_MULTIPLIER
+ intel_gpu_freq(dev_priv, E)
|
- E *= GT_FREQUENCY_MULTIPLIER
+ E = intel_gpu_freq(dev_priv, E)
|
- E /= GT_FREQUENCY_MULTIPLIER
+ E = intel_freq_opcode(dev_priv, E)
|
- do_div(E, GT_FREQUENCY_MULTIPLIER)
+ E = intel_freq_opcode(dev_priv, E)
)
@@
expression E1, E2;
@@
(
- vlv_gpu_freq(E1, E2)
+ intel_gpu_freq(E1, E2)
|
- vlv_freq_opcode(E1, E2)
+ intel_freq_opcode(E1, E2)
)
@@
expression E1, E2, E3, E4;
@@
(
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_gpu_freq(E3, E4);
- } else {
- E2 = intel_gpu_freq(E3, E4);
- }
+ E2 = intel_gpu_freq(E3, E4);
|
- if (IS_VALLEYVIEW(E1)) {
- E2 = intel_freq_opcode(E3, E4);
- } else {
- E2 = intel_freq_opcode(E3, E4);
- }
+ E2 = intel_freq_opcode(E3, E4);
)
One hunk was manually undone as intel_gpu_freq() ended up
calling itself. Supposedly it would be possible to exclude
certain functions via !=~, but I couldn't get that to work.
Also the removal of vlv_gpu_freq() and vlv_opcode_freq() compat
wrappers was done manually.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-01-24 03:04:26 +08:00
|
|
|
val = intel_freq_opcode(dev_priv, val);
|
2013-04-18 06:54:58 +08:00
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
if (val < rps->min_freq ||
|
|
|
|
val > rps->max_freq ||
|
|
|
|
val > rps->max_freq_softlimit) {
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_put(dev_priv);
|
2012-09-13 09:12:07 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
rps->min_freq_softlimit = val;
|
2013-11-06 23:56:26 +08:00
|
|
|
|
2017-10-11 05:30:06 +08:00
|
|
|
val = clamp_t(int, rps->cur_freq,
|
|
|
|
rps->min_freq_softlimit,
|
|
|
|
rps->max_freq_softlimit);
|
2015-01-24 03:04:23 +08:00
|
|
|
|
|
|
|
/* We still need *_set_rps to process the new min_delay and
|
|
|
|
* update the interrupt limits and PMINTRMSK even though
|
|
|
|
* frequency request may be unchanged. */
|
2017-01-26 18:19:19 +08:00
|
|
|
ret = intel_set_rps(dev_priv, val);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
2017-10-11 05:30:05 +08:00
|
|
|
mutex_unlock(&dev_priv->pcu_lock);
|
2012-09-13 09:12:07 +08:00
|
|
|
|
2016-02-09 01:17:11 +08:00
|
|
|
intel_runtime_pm_put(dev_priv);
|
|
|
|
|
2017-01-26 18:19:19 +08:00
|
|
|
return ret ?: count;
|
2012-09-13 09:12:07 +08:00
|
|
|
}
|
|
|
|
|
2017-12-20 02:15:08 +08:00
|
|
|
static DEVICE_ATTR_RO(gt_act_freq_mhz);
|
|
|
|
static DEVICE_ATTR_RO(gt_cur_freq_mhz);
|
2017-12-20 02:15:07 +08:00
|
|
|
static DEVICE_ATTR_RW(gt_boost_freq_mhz);
|
|
|
|
static DEVICE_ATTR_RW(gt_max_freq_mhz);
|
|
|
|
static DEVICE_ATTR_RW(gt_min_freq_mhz);
|
2012-09-08 10:43:40 +08:00
|
|
|
|
2017-12-20 02:15:08 +08:00
|
|
|
static DEVICE_ATTR_RO(vlv_rpe_freq_mhz);
|
2012-09-08 10:43:44 +08:00
|
|
|
|
|
|
|
static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
|
|
|
|
static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
|
|
|
|
static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
|
|
|
|
static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
|
|
|
|
|
|
|
|
/* For now we have a static number of RP states */
|
|
|
|
static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
|
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2017-10-11 05:30:06 +08:00
|
|
|
struct intel_rps *rps = &dev_priv->gt_pm.rps;
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
u32 val;
|
2012-09-08 10:43:44 +08:00
|
|
|
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
if (attr == &dev_attr_gt_RP0_freq_mhz)
|
2017-10-11 05:30:06 +08:00
|
|
|
val = intel_gpu_freq(dev_priv, rps->rp0_freq);
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
else if (attr == &dev_attr_gt_RP1_freq_mhz)
|
2017-10-11 05:30:06 +08:00
|
|
|
val = intel_gpu_freq(dev_priv, rps->rp1_freq);
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
else if (attr == &dev_attr_gt_RPn_freq_mhz)
|
2017-10-11 05:30:06 +08:00
|
|
|
val = intel_gpu_freq(dev_priv, rps->min_freq);
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
else
|
2012-09-08 10:43:44 +08:00
|
|
|
BUG();
|
drm/i915: Removed the read of RP_STATE_CAP from sysfs/debugfs functions
The frequency values(Rp0, Rp1, Rpn) reported by RP_STATE_CAP register
are stored, initially by the Driver, inside the dev_priv->rps structure.
Since these values are expected to remain same throughout, there is no real
need to read this register, on dynamic basis, from certain debugfs/sysfs
functions and the values can be instead retrieved from the dev_priv->rps
structure when needed.
For the i915_frequency_info debugfs interface, the frequency values from the
RP_STATE_CAP register only should be used, to indicate the actual Hw state,
since it is principally used for the debugging purpose.
v2: Reverted the changes in i915_frequency_info function, to continue report
back the frequency values, as per the actual Hw state (Chris)
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-02-26 18:39:47 +08:00
|
|
|
|
2013-02-14 16:42:11 +08:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", val);
|
2012-09-08 10:43:44 +08:00
|
|
|
}
|
|
|
|
|
2018-10-04 22:37:50 +08:00
|
|
|
static const struct attribute * const gen6_attrs[] = {
|
2015-01-24 03:04:24 +08:00
|
|
|
&dev_attr_gt_act_freq_mhz.attr,
|
2012-09-08 10:43:40 +08:00
|
|
|
&dev_attr_gt_cur_freq_mhz.attr,
|
2016-07-13 16:10:35 +08:00
|
|
|
&dev_attr_gt_boost_freq_mhz.attr,
|
2012-09-08 10:43:40 +08:00
|
|
|
&dev_attr_gt_max_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_min_freq_mhz.attr,
|
2012-09-08 10:43:44 +08:00
|
|
|
&dev_attr_gt_RP0_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_RP1_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_RPn_freq_mhz.attr,
|
2012-09-08 10:43:40 +08:00
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2018-10-04 22:37:50 +08:00
|
|
|
static const struct attribute * const vlv_attrs[] = {
|
2015-01-24 03:04:24 +08:00
|
|
|
&dev_attr_gt_act_freq_mhz.attr,
|
2013-08-26 23:18:54 +08:00
|
|
|
&dev_attr_gt_cur_freq_mhz.attr,
|
2016-07-13 16:10:35 +08:00
|
|
|
&dev_attr_gt_boost_freq_mhz.attr,
|
2013-08-26 23:18:54 +08:00
|
|
|
&dev_attr_gt_max_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_min_freq_mhz.attr,
|
2014-07-10 15:46:22 +08:00
|
|
|
&dev_attr_gt_RP0_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_RP1_freq_mhz.attr,
|
|
|
|
&dev_attr_gt_RPn_freq_mhz.attr,
|
2013-08-26 23:18:54 +08:00
|
|
|
&dev_attr_vlv_rpe_freq_mhz.attr,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
2016-10-12 17:05:18 +08:00
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
|
|
|
|
|
2013-06-06 22:38:54 +08:00
|
|
|
static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr, char *buf,
|
|
|
|
loff_t off, size_t count)
|
|
|
|
{
|
|
|
|
|
2016-01-13 22:48:40 +08:00
|
|
|
struct device *kdev = kobj_to_dev(kobj);
|
2018-11-23 21:23:25 +08:00
|
|
|
struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
|
2017-02-15 00:46:11 +08:00
|
|
|
struct i915_gpu_state *gpu;
|
|
|
|
ssize_t ret;
|
2013-06-06 22:38:54 +08:00
|
|
|
|
2018-11-23 21:23:25 +08:00
|
|
|
gpu = i915_first_error_state(i915);
|
|
|
|
if (gpu) {
|
|
|
|
ret = i915_gpu_state_copy_to_buffer(gpu, buf, off, count);
|
|
|
|
i915_gpu_state_put(gpu);
|
|
|
|
} else {
|
|
|
|
const char *str = "No error state collected\n";
|
|
|
|
size_t len = strlen(str);
|
2013-06-06 22:38:54 +08:00
|
|
|
|
2018-11-23 21:23:25 +08:00
|
|
|
ret = min_t(size_t, count, len - off);
|
|
|
|
memcpy(buf, str + off, ret);
|
|
|
|
}
|
2013-06-06 22:38:54 +08:00
|
|
|
|
2017-02-15 00:46:11 +08:00
|
|
|
return ret;
|
2013-06-06 22:38:54 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t error_state_write(struct file *file, struct kobject *kobj,
|
|
|
|
struct bin_attribute *attr, char *buf,
|
|
|
|
loff_t off, size_t count)
|
|
|
|
{
|
2016-01-13 22:48:40 +08:00
|
|
|
struct device *kdev = kobj_to_dev(kobj);
|
2016-08-22 18:32:43 +08:00
|
|
|
struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
|
2013-06-06 22:38:54 +08:00
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("Resetting error state\n");
|
2017-02-15 00:46:11 +08:00
|
|
|
i915_reset_error_state(dev_priv);
|
2013-06-06 22:38:54 +08:00
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2017-08-03 01:20:47 +08:00
|
|
|
static const struct bin_attribute error_state_attr = {
|
2013-06-06 22:38:54 +08:00
|
|
|
.attr.name = "error",
|
|
|
|
.attr.mode = S_IRUSR | S_IWUSR,
|
|
|
|
.size = 0,
|
|
|
|
.read = error_state_read,
|
|
|
|
.write = error_state_write,
|
|
|
|
};
|
|
|
|
|
2016-10-12 17:05:18 +08:00
|
|
|
static void i915_setup_error_capture(struct device *kdev)
|
|
|
|
{
|
|
|
|
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
|
|
|
|
DRM_ERROR("error_state sysfs setup failed\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void i915_teardown_error_capture(struct device *kdev)
|
|
|
|
{
|
|
|
|
sysfs_remove_bin_file(&kdev->kobj, &error_state_attr);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static void i915_setup_error_capture(struct device *kdev) {}
|
|
|
|
static void i915_teardown_error_capture(struct device *kdev) {}
|
|
|
|
#endif
|
|
|
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2016-08-22 18:32:43 +08:00
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void i915_setup_sysfs(struct drm_i915_private *dev_priv)
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2012-04-11 12:17:01 +08:00
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{
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2016-08-22 18:32:43 +08:00
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struct device *kdev = dev_priv->drm.primary->kdev;
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2012-04-11 12:17:01 +08:00
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int ret;
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2012-09-02 15:24:40 +08:00
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#ifdef CONFIG_PM
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2016-08-22 18:32:43 +08:00
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if (HAS_RC6(dev_priv)) {
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ret = sysfs_merge_group(&kdev->kobj,
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2012-05-31 20:57:43 +08:00
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&rc6_attr_group);
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if (ret)
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DRM_ERROR("RC6 residency sysfs setup failed\n");
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}
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2016-08-22 18:32:43 +08:00
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if (HAS_RC6p(dev_priv)) {
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ret = sysfs_merge_group(&kdev->kobj,
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2014-10-07 22:06:50 +08:00
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&rc6p_attr_group);
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|
|
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if (ret)
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|
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DRM_ERROR("RC6p residency sysfs setup failed\n");
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}
|
2016-08-22 18:32:43 +08:00
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
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ret = sysfs_merge_group(&kdev->kobj,
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2015-02-26 23:40:27 +08:00
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&media_rc6_attr_group);
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if (ret)
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DRM_ERROR("Media RC6 residency sysfs setup failed\n");
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}
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2012-09-02 15:24:40 +08:00
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#endif
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2016-08-22 18:32:43 +08:00
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if (HAS_L3_DPF(dev_priv)) {
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ret = device_create_bin_file(kdev, &dpf_attrs);
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2012-05-31 20:57:43 +08:00
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if (ret)
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DRM_ERROR("l3 parity sysfs setup failed\n");
|
2013-09-20 02:13:41 +08:00
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|
2016-08-22 18:32:43 +08:00
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if (NUM_L3_SLICES(dev_priv) > 1) {
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ret = device_create_bin_file(kdev,
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2013-09-20 02:13:41 +08:00
|
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&dpf_attrs_1);
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|
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if (ret)
|
|
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DRM_ERROR("l3 parity slice 1 setup failed\n");
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|
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}
|
2012-05-31 20:57:43 +08:00
|
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}
|
2012-09-08 10:43:40 +08:00
|
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|
2013-08-26 23:18:54 +08:00
|
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ret = 0;
|
2016-08-22 18:32:43 +08:00
|
|
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
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|
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ret = sysfs_create_files(&kdev->kobj, vlv_attrs);
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|
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else if (INTEL_GEN(dev_priv) >= 6)
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|
|
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ret = sysfs_create_files(&kdev->kobj, gen6_attrs);
|
2013-08-26 23:18:54 +08:00
|
|
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if (ret)
|
|
|
|
DRM_ERROR("RPS sysfs setup failed\n");
|
2013-06-06 22:38:54 +08:00
|
|
|
|
2016-10-12 17:05:18 +08:00
|
|
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i915_setup_error_capture(kdev);
|
2012-04-11 12:17:01 +08:00
|
|
|
}
|
|
|
|
|
2016-08-22 18:32:43 +08:00
|
|
|
void i915_teardown_sysfs(struct drm_i915_private *dev_priv)
|
2012-04-11 12:17:01 +08:00
|
|
|
{
|
2016-08-22 18:32:43 +08:00
|
|
|
struct device *kdev = dev_priv->drm.primary->kdev;
|
|
|
|
|
2016-10-12 17:05:18 +08:00
|
|
|
i915_teardown_error_capture(kdev);
|
|
|
|
|
2016-08-22 18:32:43 +08:00
|
|
|
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
|
|
|
|
sysfs_remove_files(&kdev->kobj, vlv_attrs);
|
2013-08-26 23:18:54 +08:00
|
|
|
else
|
2016-08-22 18:32:43 +08:00
|
|
|
sysfs_remove_files(&kdev->kobj, gen6_attrs);
|
|
|
|
device_remove_bin_file(kdev, &dpf_attrs_1);
|
|
|
|
device_remove_bin_file(kdev, &dpf_attrs);
|
2012-09-20 01:50:19 +08:00
|
|
|
#ifdef CONFIG_PM
|
2016-08-22 18:32:43 +08:00
|
|
|
sysfs_unmerge_group(&kdev->kobj, &rc6_attr_group);
|
|
|
|
sysfs_unmerge_group(&kdev->kobj, &rc6p_attr_group);
|
2012-09-20 01:50:19 +08:00
|
|
|
#endif
|
2012-04-11 12:17:01 +08:00
|
|
|
}
|