2016-11-26 01:59:35 +08:00
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/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "intel_uc.h"
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2017-11-16 21:32:41 +08:00
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#include "intel_guc_submission.h"
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2017-12-14 06:13:46 +08:00
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#include "intel_guc.h"
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2017-10-05 02:13:42 +08:00
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#include "i915_drv.h"
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2016-11-26 01:59:35 +08:00
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2018-02-01 01:32:37 +08:00
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static void guc_free_load_err_log(struct intel_guc *guc);
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2017-03-14 22:28:11 +08:00
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/* Reset GuC providing us with fresh state for both GuC and HuC.
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*/
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static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
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{
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int ret;
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u32 guc_status;
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2017-10-31 02:56:14 +08:00
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ret = intel_reset_guc(dev_priv);
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2017-03-14 22:28:11 +08:00
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if (ret) {
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2017-10-31 02:56:14 +08:00
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DRM_ERROR("Failed to reset GuC, ret = %d\n", ret);
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2017-03-14 22:28:11 +08:00
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return ret;
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}
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guc_status = I915_READ(GUC_STATUS);
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WARN(!(guc_status & GS_MIA_IN_RESET),
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"GuC status: 0x%x, MIA core expected to be in reset\n",
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guc_status);
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return ret;
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}
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2018-05-25 20:18:58 +08:00
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static int __get_platform_enable_guc(struct drm_i915_private *i915)
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2017-03-14 22:28:10 +08:00
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{
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2018-05-25 20:18:58 +08:00
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struct intel_uc_fw *guc_fw = &i915->guc.fw;
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struct intel_uc_fw *huc_fw = &i915->huc.fw;
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2017-12-06 21:53:15 +08:00
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int enable_guc = 0;
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2017-03-14 22:28:10 +08:00
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2017-12-06 21:53:15 +08:00
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/* Default is to enable GuC/HuC if we know their firmwares */
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if (intel_uc_fw_is_selected(guc_fw))
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enable_guc |= ENABLE_GUC_SUBMISSION;
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if (intel_uc_fw_is_selected(huc_fw))
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enable_guc |= ENABLE_GUC_LOAD_HUC;
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2017-03-14 22:28:13 +08:00
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2017-12-06 21:53:15 +08:00
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/* Any platform specific fine-tuning can be done here */
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2017-03-15 21:37:41 +08:00
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2017-12-06 21:53:15 +08:00
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return enable_guc;
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}
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2017-03-15 21:37:41 +08:00
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2018-05-25 20:18:58 +08:00
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static int __get_default_guc_log_level(struct drm_i915_private *i915)
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2018-01-11 23:24:40 +08:00
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{
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2018-03-20 19:55:17 +08:00
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int guc_log_level;
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2018-01-11 23:24:40 +08:00
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2018-05-25 20:18:58 +08:00
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if (!HAS_GUC(i915) || !intel_uc_is_using_guc())
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2018-03-20 19:55:17 +08:00
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guc_log_level = GUC_LOG_LEVEL_DISABLED;
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else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
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IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
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guc_log_level = GUC_LOG_LEVEL_MAX;
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else
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guc_log_level = GUC_LOG_LEVEL_NON_VERBOSE;
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2018-01-11 23:24:40 +08:00
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/* Any platform specific fine-tuning can be done here */
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return guc_log_level;
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}
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2017-12-06 21:53:15 +08:00
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/**
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2018-03-12 21:03:06 +08:00
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* sanitize_options_early - sanitize uC related modparam options
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2018-05-25 20:18:58 +08:00
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* @i915: device private
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2017-12-06 21:53:15 +08:00
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*
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* In case of "enable_guc" option this function will attempt to modify
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* it only if it was initially set to "auto(-1)". Default value for this
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* modparam varies between platforms and it is hardcoded in driver code.
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* Any other modparam value is only monitored against availability of the
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* related hardware or firmware definitions.
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2018-01-11 23:24:40 +08:00
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*
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* In case of "guc_log_level" option this function will attempt to modify
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* it only if it was initially set to "auto(-1)" or if initial value was
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* "enable(1..4)" on platforms without the GuC. Default value for this
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* modparam varies between platforms and is usually set to "disable(0)"
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* unless GuC is enabled on given platform and the driver is compiled with
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* debug config when this modparam will default to "enable(1..4)".
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2017-12-06 21:53:15 +08:00
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*/
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2018-05-25 20:18:58 +08:00
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static void sanitize_options_early(struct drm_i915_private *i915)
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2017-12-06 21:53:15 +08:00
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{
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2018-05-25 20:18:58 +08:00
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struct intel_uc_fw *guc_fw = &i915->guc.fw;
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struct intel_uc_fw *huc_fw = &i915->huc.fw;
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2017-03-15 21:37:41 +08:00
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/* A negative value means "use platform default" */
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2017-12-06 21:53:15 +08:00
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if (i915_modparams.enable_guc < 0)
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2018-05-25 20:18:58 +08:00
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i915_modparams.enable_guc = __get_platform_enable_guc(i915);
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2017-12-06 21:53:15 +08:00
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DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",
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i915_modparams.enable_guc,
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yesno(intel_uc_is_using_guc_submission()),
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yesno(intel_uc_is_using_huc()));
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/* Verify GuC firmware availability */
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if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
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2018-01-11 23:24:40 +08:00
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DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
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"enable_guc", i915_modparams.enable_guc,
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2018-05-25 20:18:58 +08:00
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!HAS_GUC(i915) ? "no GuC hardware" :
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"no GuC firmware");
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2017-12-06 21:53:15 +08:00
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}
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/* Verify HuC firmware availability */
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if (intel_uc_is_using_huc() && !intel_uc_fw_is_selected(huc_fw)) {
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2018-01-11 23:24:40 +08:00
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DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
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"enable_guc", i915_modparams.enable_guc,
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2018-05-25 20:18:58 +08:00
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!HAS_HUC(i915) ? "no HuC hardware" :
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"no HuC firmware");
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2017-12-06 21:53:15 +08:00
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}
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2018-01-11 23:24:40 +08:00
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/* A negative value means "use platform/config default" */
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if (i915_modparams.guc_log_level < 0)
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i915_modparams.guc_log_level =
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2018-05-25 20:18:58 +08:00
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__get_default_guc_log_level(i915);
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2018-01-11 23:24:40 +08:00
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if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc()) {
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DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
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"guc_log_level", i915_modparams.guc_log_level,
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2018-05-25 20:18:58 +08:00
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!HAS_GUC(i915) ? "no GuC hardware" :
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"GuC not enabled");
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2018-01-11 23:24:40 +08:00
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i915_modparams.guc_log_level = 0;
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}
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2018-03-20 19:55:17 +08:00
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if (i915_modparams.guc_log_level > GUC_LOG_LEVEL_MAX) {
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2018-01-11 23:24:40 +08:00
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DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
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"guc_log_level", i915_modparams.guc_log_level,
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"verbosity too high");
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2018-03-20 19:55:17 +08:00
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i915_modparams.guc_log_level = GUC_LOG_LEVEL_MAX;
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2018-01-11 23:24:40 +08:00
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}
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2018-03-19 17:53:45 +08:00
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DRM_DEBUG_DRIVER("guc_log_level=%d (enabled:%s, verbose:%s, verbosity:%d)\n",
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2018-01-11 23:24:40 +08:00
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i915_modparams.guc_log_level,
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yesno(i915_modparams.guc_log_level),
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2018-03-20 19:55:17 +08:00
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yesno(GUC_LOG_LEVEL_IS_VERBOSE(i915_modparams.guc_log_level)),
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2018-03-19 17:53:45 +08:00
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GUC_LOG_LEVEL_TO_VERBOSITY(i915_modparams.guc_log_level));
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2018-01-11 23:24:40 +08:00
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2017-12-06 21:53:15 +08:00
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/* Make sure that sanitization was done */
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GEM_BUG_ON(i915_modparams.enable_guc < 0);
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2018-01-11 23:24:40 +08:00
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GEM_BUG_ON(i915_modparams.guc_log_level < 0);
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2017-03-14 22:28:10 +08:00
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}
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2018-03-23 20:34:50 +08:00
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void intel_uc_init_early(struct drm_i915_private *i915)
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2017-10-04 23:33:27 +08:00
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{
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2018-03-23 20:34:50 +08:00
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struct intel_guc *guc = &i915->guc;
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struct intel_huc *huc = &i915->huc;
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2018-03-12 21:03:06 +08:00
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2018-03-23 20:34:50 +08:00
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intel_guc_init_early(guc);
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intel_huc_init_early(huc);
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2017-10-04 23:33:27 +08:00
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2018-03-23 20:34:50 +08:00
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sanitize_options_early(i915);
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2017-12-06 21:53:13 +08:00
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2018-03-23 20:34:50 +08:00
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if (USES_GUC(i915))
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intel_uc_fw_fetch(i915, &guc->fw);
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2017-12-06 21:53:16 +08:00
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2018-03-23 20:34:50 +08:00
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if (USES_HUC(i915))
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intel_uc_fw_fetch(i915, &huc->fw);
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2017-03-14 22:28:09 +08:00
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}
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2018-03-23 20:34:50 +08:00
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void intel_uc_cleanup_early(struct drm_i915_private *i915)
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2017-03-23 01:39:46 +08:00
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{
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2018-03-23 20:34:50 +08:00
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struct intel_guc *guc = &i915->guc;
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struct intel_huc *huc = &i915->huc;
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2017-12-06 21:53:13 +08:00
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2018-03-23 20:34:50 +08:00
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if (USES_HUC(i915))
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intel_uc_fw_fini(&huc->fw);
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2017-12-06 21:53:16 +08:00
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2018-03-23 20:34:50 +08:00
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if (USES_GUC(i915))
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intel_uc_fw_fini(&guc->fw);
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2018-02-01 01:32:37 +08:00
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2018-03-23 20:34:50 +08:00
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guc_free_load_err_log(guc);
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2017-03-23 01:39:46 +08:00
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}
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2017-10-04 23:33:24 +08:00
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/**
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* intel_uc_init_mmio - setup uC MMIO access
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2018-05-25 20:18:58 +08:00
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* @i915: device private
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2017-10-04 23:33:24 +08:00
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*
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* Setup minimal state necessary for MMIO accesses later in the
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* initialization sequence.
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*/
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2018-05-25 20:18:58 +08:00
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void intel_uc_init_mmio(struct drm_i915_private *i915)
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2017-10-04 23:33:24 +08:00
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{
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2018-05-25 20:18:58 +08:00
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intel_guc_init_send_regs(&i915->guc);
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2017-10-04 23:33:24 +08:00
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}
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2017-05-23 01:50:28 +08:00
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static void guc_capture_load_err_log(struct intel_guc *guc)
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{
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2018-06-04 22:19:41 +08:00
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if (!guc->log.vma || !intel_guc_log_get_level(&guc->log))
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2017-05-23 01:50:28 +08:00
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return;
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if (!guc->load_err_log)
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guc->load_err_log = i915_gem_object_get(guc->log.vma->obj);
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return;
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}
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static void guc_free_load_err_log(struct intel_guc *guc)
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{
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if (guc->load_err_log)
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i915_gem_object_put(guc->load_err_log);
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}
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2017-05-02 18:32:42 +08:00
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static int guc_enable_communication(struct intel_guc *guc)
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{
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2018-05-25 20:18:58 +08:00
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struct drm_i915_private *i915 = guc_to_i915(guc);
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2017-05-26 19:13:25 +08:00
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2018-05-25 20:18:58 +08:00
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gen9_enable_guc_interrupts(i915);
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2018-03-19 17:53:36 +08:00
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2018-05-25 20:18:58 +08:00
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if (HAS_GUC_CT(i915))
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2018-03-21 00:20:20 +08:00
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return intel_guc_ct_enable(&guc->ct);
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2017-05-26 19:13:25 +08:00
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2017-05-02 18:32:42 +08:00
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guc->send = intel_guc_send_mmio;
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2018-03-27 03:48:22 +08:00
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guc->handler = intel_guc_to_host_event_handler_mmio;
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2017-05-02 18:32:42 +08:00
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return 0;
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}
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static void guc_disable_communication(struct intel_guc *guc)
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{
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2018-05-25 20:18:58 +08:00
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struct drm_i915_private *i915 = guc_to_i915(guc);
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2017-05-26 19:13:25 +08:00
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2018-05-25 20:18:58 +08:00
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if (HAS_GUC_CT(i915))
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2018-03-21 00:20:20 +08:00
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intel_guc_ct_disable(&guc->ct);
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2017-05-26 19:13:25 +08:00
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2018-05-25 20:18:58 +08:00
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gen9_disable_guc_interrupts(i915);
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2018-03-19 17:53:36 +08:00
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2017-05-02 18:32:42 +08:00
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guc->send = intel_guc_send_nop;
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2018-03-27 03:48:22 +08:00
|
|
|
guc->handler = intel_guc_to_host_event_handler_nop;
|
2017-05-02 18:32:42 +08:00
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
int intel_uc_init_misc(struct drm_i915_private *i915)
|
2017-12-14 06:13:47 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
2017-12-14 06:13:47 +08:00
|
|
|
int ret;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-12-14 06:13:47 +08:00
|
|
|
return 0;
|
|
|
|
|
|
2018-03-14 08:32:50 +08:00
|
|
|
intel_guc_init_ggtt_pin_bias(guc);
|
|
|
|
|
|
drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutex
This patch fixes lockdep issue due to circular locking dependency of
struct_mutex, i_mutex_key, mmap_sem, relay_channels_mutex.
For GuC log relay channel we create debugfs file that requires i_mutex_key
lock and we are doing that under struct_mutex. So we introduced newer
dependency as:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
However, there is dependency from mmap_sem to struct_mutex. Hence we
separate the relay create/destroy operation from under struct_mutex.
Also added runtime check of relay buffer status.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
======================================================
WARNING: possible circular locking dependency detected
4.15.0-rc6-CI-Patchwork_7614+ #1 Not tainted
------------------------------------------------------
debugfs_test/1388 is trying to acquire lock:
(&dev->struct_mutex){+.+.}, at: [<00000000d5e1d915>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
but task is already holding lock:
(&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #3 (&mm->mmap_sem){++++}:
_copy_to_user+0x1e/0x70
filldir+0x8c/0xf0
dcache_readdir+0xeb/0x160
iterate_dir+0xdc/0x140
SyS_getdents+0xa0/0x130
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #2 (&sb->s_type->i_mutex_key#3){++++}:
start_creating+0x59/0x110
__debugfs_create_file+0x2e/0xe0
relay_create_buf_file+0x62/0x80
relay_late_setup_files+0x84/0x250
guc_log_late_setup+0x4f/0x110 [i915]
i915_guc_log_register+0x32/0x40 [i915]
i915_driver_load+0x7b6/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #1 (relay_channels_mutex){+.+.}:
relay_open+0x12c/0x2b0
intel_guc_log_runtime_create+0xab/0x230 [i915]
intel_guc_init+0x81/0x120 [i915]
intel_uc_init+0x29/0xa0 [i915]
i915_gem_init+0x182/0x530 [i915]
i915_driver_load+0xaa9/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #0 (&dev->struct_mutex){+.+.}:
__mutex_lock+0x81/0x9b0
i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
page_fault+0x4c/0x60
other info that might help us debug this:
Chain exists of:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
Possible unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&mm->mmap_sem);
lock(&sb->s_type->i_mutex_key#3);
lock(&mm->mmap_sem);
lock(&dev->struct_mutex);
*** DEADLOCK ***
1 lock held by debugfs_test/1388:
#0: (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
stack backtrace:
CPU: 2 PID: 1388 Comm: debugfs_test Not tainted 4.15.0-rc6-CI-Patchwork_7614+ #1
Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./J4205-ITX, BIOS P1.10 09/29/2016
Call Trace:
dump_stack+0x5f/0x86
print_circular_bug.isra.18+0x1d0/0x2c0
__lock_acquire+0x14ae/0x1b60
? lock_acquire+0xaf/0x200
lock_acquire+0xaf/0x200
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
__mutex_lock+0x81/0x9b0
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_mutex_lock_interruptible+0x47/0x130 [i915]
? __pm_runtime_resume+0x4f/0x80
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
? _raw_spin_unlock+0x29/0x40
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
? page_fault+0x36/0x60
page_fault+0x4c/0x60
v2: Added lock protection to guc->log.runtime.relay_chan (Chris)
Fixed locking inside guc_flush_logs uncovered by new lockdep.
v3: Locking guc_read_update_log_buffer entirely with relay_lock. (Chris)
Prepared intel_guc_init_early. Moved relay_lock inside relay_create
relay_destroy, relay_file_create, guc_read_update_log_buffer. (Michal)
Removed struct_mutex lock around guc_log_flush and removed usage
of guc_log_has_relay() from runtime_create path as it needs
struct_mutex lock.
v4: Handle NULL relay sub buffer pointer earlier in read_update_log_buffer
(Chris). Fixed comment suffix **/. (Michal)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693
Testcase: igt/debugfs_test/read_all_entries # with enable_guc=1 and guc_log_level=1
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Marta Lofstedt <marta.lofstedt@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1516808821-3638-3-git-send-email-sagar.a.kamble@intel.com
2018-01-24 23:46:58 +08:00
|
|
|
ret = intel_guc_init_wq(guc);
|
2018-03-08 23:46:54 +08:00
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
2017-12-14 06:13:47 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
void intel_uc_fini_misc(struct drm_i915_private *i915)
|
2017-12-14 06:13:47 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutex
This patch fixes lockdep issue due to circular locking dependency of
struct_mutex, i_mutex_key, mmap_sem, relay_channels_mutex.
For GuC log relay channel we create debugfs file that requires i_mutex_key
lock and we are doing that under struct_mutex. So we introduced newer
dependency as:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
However, there is dependency from mmap_sem to struct_mutex. Hence we
separate the relay create/destroy operation from under struct_mutex.
Also added runtime check of relay buffer status.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
======================================================
WARNING: possible circular locking dependency detected
4.15.0-rc6-CI-Patchwork_7614+ #1 Not tainted
------------------------------------------------------
debugfs_test/1388 is trying to acquire lock:
(&dev->struct_mutex){+.+.}, at: [<00000000d5e1d915>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
but task is already holding lock:
(&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #3 (&mm->mmap_sem){++++}:
_copy_to_user+0x1e/0x70
filldir+0x8c/0xf0
dcache_readdir+0xeb/0x160
iterate_dir+0xdc/0x140
SyS_getdents+0xa0/0x130
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #2 (&sb->s_type->i_mutex_key#3){++++}:
start_creating+0x59/0x110
__debugfs_create_file+0x2e/0xe0
relay_create_buf_file+0x62/0x80
relay_late_setup_files+0x84/0x250
guc_log_late_setup+0x4f/0x110 [i915]
i915_guc_log_register+0x32/0x40 [i915]
i915_driver_load+0x7b6/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #1 (relay_channels_mutex){+.+.}:
relay_open+0x12c/0x2b0
intel_guc_log_runtime_create+0xab/0x230 [i915]
intel_guc_init+0x81/0x120 [i915]
intel_uc_init+0x29/0xa0 [i915]
i915_gem_init+0x182/0x530 [i915]
i915_driver_load+0xaa9/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #0 (&dev->struct_mutex){+.+.}:
__mutex_lock+0x81/0x9b0
i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
page_fault+0x4c/0x60
other info that might help us debug this:
Chain exists of:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
Possible unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&mm->mmap_sem);
lock(&sb->s_type->i_mutex_key#3);
lock(&mm->mmap_sem);
lock(&dev->struct_mutex);
*** DEADLOCK ***
1 lock held by debugfs_test/1388:
#0: (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
stack backtrace:
CPU: 2 PID: 1388 Comm: debugfs_test Not tainted 4.15.0-rc6-CI-Patchwork_7614+ #1
Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./J4205-ITX, BIOS P1.10 09/29/2016
Call Trace:
dump_stack+0x5f/0x86
print_circular_bug.isra.18+0x1d0/0x2c0
__lock_acquire+0x14ae/0x1b60
? lock_acquire+0xaf/0x200
lock_acquire+0xaf/0x200
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
__mutex_lock+0x81/0x9b0
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_mutex_lock_interruptible+0x47/0x130 [i915]
? __pm_runtime_resume+0x4f/0x80
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
? _raw_spin_unlock+0x29/0x40
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
? page_fault+0x36/0x60
page_fault+0x4c/0x60
v2: Added lock protection to guc->log.runtime.relay_chan (Chris)
Fixed locking inside guc_flush_logs uncovered by new lockdep.
v3: Locking guc_read_update_log_buffer entirely with relay_lock. (Chris)
Prepared intel_guc_init_early. Moved relay_lock inside relay_create
relay_destroy, relay_file_create, guc_read_update_log_buffer. (Michal)
Removed struct_mutex lock around guc_log_flush and removed usage
of guc_log_has_relay() from runtime_create path as it needs
struct_mutex lock.
v4: Handle NULL relay sub buffer pointer earlier in read_update_log_buffer
(Chris). Fixed comment suffix **/. (Michal)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693
Testcase: igt/debugfs_test/read_all_entries # with enable_guc=1 and guc_log_level=1
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Marta Lofstedt <marta.lofstedt@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1516808821-3638-3-git-send-email-sagar.a.kamble@intel.com
2018-01-24 23:46:58 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-12-14 06:13:47 +08:00
|
|
|
return;
|
|
|
|
|
|
drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutex
This patch fixes lockdep issue due to circular locking dependency of
struct_mutex, i_mutex_key, mmap_sem, relay_channels_mutex.
For GuC log relay channel we create debugfs file that requires i_mutex_key
lock and we are doing that under struct_mutex. So we introduced newer
dependency as:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
However, there is dependency from mmap_sem to struct_mutex. Hence we
separate the relay create/destroy operation from under struct_mutex.
Also added runtime check of relay buffer status.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
======================================================
WARNING: possible circular locking dependency detected
4.15.0-rc6-CI-Patchwork_7614+ #1 Not tainted
------------------------------------------------------
debugfs_test/1388 is trying to acquire lock:
(&dev->struct_mutex){+.+.}, at: [<00000000d5e1d915>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
but task is already holding lock:
(&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #3 (&mm->mmap_sem){++++}:
_copy_to_user+0x1e/0x70
filldir+0x8c/0xf0
dcache_readdir+0xeb/0x160
iterate_dir+0xdc/0x140
SyS_getdents+0xa0/0x130
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #2 (&sb->s_type->i_mutex_key#3){++++}:
start_creating+0x59/0x110
__debugfs_create_file+0x2e/0xe0
relay_create_buf_file+0x62/0x80
relay_late_setup_files+0x84/0x250
guc_log_late_setup+0x4f/0x110 [i915]
i915_guc_log_register+0x32/0x40 [i915]
i915_driver_load+0x7b6/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #1 (relay_channels_mutex){+.+.}:
relay_open+0x12c/0x2b0
intel_guc_log_runtime_create+0xab/0x230 [i915]
intel_guc_init+0x81/0x120 [i915]
intel_uc_init+0x29/0xa0 [i915]
i915_gem_init+0x182/0x530 [i915]
i915_driver_load+0xaa9/0x1720 [i915]
i915_pci_probe+0x2e/0x90 [i915]
pci_device_probe+0x9c/0x120
driver_probe_device+0x2a3/0x480
__driver_attach+0xd9/0xe0
bus_for_each_dev+0x57/0x90
bus_add_driver+0x168/0x260
driver_register+0x52/0xc0
do_one_initcall+0x39/0x150
do_init_module+0x56/0x1ef
load_module+0x231c/0x2d70
SyS_finit_module+0xa5/0xe0
entry_SYSCALL_64_fastpath+0x1c/0x89
-> #0 (&dev->struct_mutex){+.+.}:
__mutex_lock+0x81/0x9b0
i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
page_fault+0x4c/0x60
other info that might help us debug this:
Chain exists of:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem
Possible unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&mm->mmap_sem);
lock(&sb->s_type->i_mutex_key#3);
lock(&mm->mmap_sem);
lock(&dev->struct_mutex);
*** DEADLOCK ***
1 lock held by debugfs_test/1388:
#0: (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560
stack backtrace:
CPU: 2 PID: 1388 Comm: debugfs_test Not tainted 4.15.0-rc6-CI-Patchwork_7614+ #1
Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./J4205-ITX, BIOS P1.10 09/29/2016
Call Trace:
dump_stack+0x5f/0x86
print_circular_bug.isra.18+0x1d0/0x2c0
__lock_acquire+0x14ae/0x1b60
? lock_acquire+0xaf/0x200
lock_acquire+0xaf/0x200
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
__mutex_lock+0x81/0x9b0
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
? i915_mutex_lock_interruptible+0x47/0x130 [i915]
i915_mutex_lock_interruptible+0x47/0x130 [i915]
? __pm_runtime_resume+0x4f/0x80
i915_gem_fault+0x201/0x790 [i915]
__do_fault+0x15/0x70
? _raw_spin_unlock+0x29/0x40
__handle_mm_fault+0x677/0xdc0
handle_mm_fault+0x14f/0x2f0
__do_page_fault+0x2d1/0x560
? page_fault+0x36/0x60
page_fault+0x4c/0x60
v2: Added lock protection to guc->log.runtime.relay_chan (Chris)
Fixed locking inside guc_flush_logs uncovered by new lockdep.
v3: Locking guc_read_update_log_buffer entirely with relay_lock. (Chris)
Prepared intel_guc_init_early. Moved relay_lock inside relay_create
relay_destroy, relay_file_create, guc_read_update_log_buffer. (Michal)
Removed struct_mutex lock around guc_log_flush and removed usage
of guc_log_has_relay() from runtime_create path as it needs
struct_mutex lock.
v4: Handle NULL relay sub buffer pointer earlier in read_update_log_buffer
(Chris). Fixed comment suffix **/. (Michal)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693
Testcase: igt/debugfs_test/read_all_entries # with enable_guc=1 and guc_log_level=1
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Marta Lofstedt <marta.lofstedt@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1516808821-3638-3-git-send-email-sagar.a.kamble@intel.com
2018-01-24 23:46:58 +08:00
|
|
|
intel_guc_fini_wq(guc);
|
2017-12-14 06:13:47 +08:00
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
int intel_uc_init(struct drm_i915_private *i915)
|
2017-03-14 22:28:11 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
2017-12-14 06:13:48 +08:00
|
|
|
int ret;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-03-29 00:53:47 +08:00
|
|
|
return 0;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!HAS_GUC(i915))
|
2017-12-14 06:13:48 +08:00
|
|
|
return -ENODEV;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2017-12-14 06:13:46 +08:00
|
|
|
ret = intel_guc_init(guc);
|
|
|
|
|
if (ret)
|
2017-12-14 06:13:48 +08:00
|
|
|
return ret;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_GUC_SUBMISSION(i915)) {
|
2017-03-23 01:39:52 +08:00
|
|
|
/*
|
|
|
|
|
* This is stuff we need to have available at fw load time
|
|
|
|
|
* if we are planning to enable submission later
|
|
|
|
|
*/
|
2017-11-16 21:32:39 +08:00
|
|
|
ret = intel_guc_submission_init(guc);
|
2017-12-14 06:13:48 +08:00
|
|
|
if (ret) {
|
|
|
|
|
intel_guc_fini(guc);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
2017-03-23 01:39:52 +08:00
|
|
|
}
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2017-12-14 06:13:48 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
void intel_uc_fini(struct drm_i915_private *i915)
|
2017-12-14 06:13:48 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
2017-12-14 06:13:48 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-12-14 06:13:48 +08:00
|
|
|
return;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
GEM_BUG_ON(!HAS_GUC(i915));
|
2017-12-14 06:13:48 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_GUC_SUBMISSION(i915))
|
2017-12-14 06:13:48 +08:00
|
|
|
intel_guc_submission_fini(guc);
|
|
|
|
|
|
|
|
|
|
intel_guc_fini(guc);
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-12 21:03:07 +08:00
|
|
|
void intel_uc_sanitize(struct drm_i915_private *i915)
|
|
|
|
|
{
|
|
|
|
|
struct intel_guc *guc = &i915->guc;
|
|
|
|
|
struct intel_huc *huc = &i915->huc;
|
|
|
|
|
|
|
|
|
|
if (!USES_GUC(i915))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
GEM_BUG_ON(!HAS_GUC(i915));
|
|
|
|
|
|
|
|
|
|
guc_disable_communication(guc);
|
|
|
|
|
|
|
|
|
|
intel_huc_sanitize(huc);
|
|
|
|
|
intel_guc_sanitize(guc);
|
|
|
|
|
|
|
|
|
|
__intel_uc_reset_hw(i915);
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
int intel_uc_init_hw(struct drm_i915_private *i915)
|
2017-12-14 06:13:48 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
|
|
|
|
struct intel_huc *huc = &i915->huc;
|
2017-12-14 06:13:48 +08:00
|
|
|
int ret, attempts;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-12-14 06:13:48 +08:00
|
|
|
return 0;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
GEM_BUG_ON(!HAS_GUC(i915));
|
2017-12-14 06:13:48 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
gen9_reset_guc_interrupts(i915);
|
2017-12-14 06:13:48 +08:00
|
|
|
|
2017-03-14 22:28:11 +08:00
|
|
|
/* WaEnableuKernelHeaderValidFix:skl */
|
|
|
|
|
/* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */
|
2018-05-25 20:18:58 +08:00
|
|
|
if (IS_GEN9(i915))
|
2017-03-14 22:28:11 +08:00
|
|
|
attempts = 3;
|
|
|
|
|
else
|
|
|
|
|
attempts = 1;
|
|
|
|
|
|
|
|
|
|
while (attempts--) {
|
|
|
|
|
/*
|
|
|
|
|
* Always reset the GuC just before (re)loading, so
|
|
|
|
|
* that the state and timing are fairly predictable
|
|
|
|
|
*/
|
2018-05-25 20:18:58 +08:00
|
|
|
ret = __intel_uc_reset_hw(i915);
|
2017-03-14 22:28:11 +08:00
|
|
|
if (ret)
|
2017-12-14 06:13:48 +08:00
|
|
|
goto err_out;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_HUC(i915)) {
|
2018-03-02 00:45:45 +08:00
|
|
|
ret = intel_huc_fw_upload(huc);
|
2017-12-06 21:53:16 +08:00
|
|
|
if (ret)
|
2017-12-14 06:13:48 +08:00
|
|
|
goto err_out;
|
2017-12-06 21:53:16 +08:00
|
|
|
}
|
|
|
|
|
|
2017-10-16 22:47:11 +08:00
|
|
|
intel_guc_init_params(guc);
|
2017-10-16 22:47:14 +08:00
|
|
|
ret = intel_guc_fw_upload(guc);
|
2017-03-14 22:28:11 +08:00
|
|
|
if (ret == 0 || ret != -EAGAIN)
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("GuC fw load failed: %d; will reset and "
|
|
|
|
|
"retry %d more time(s)\n", ret, attempts);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Did we succeded or run out of retries? */
|
|
|
|
|
if (ret)
|
2017-05-23 01:50:28 +08:00
|
|
|
goto err_log_capture;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2017-05-02 18:32:42 +08:00
|
|
|
ret = guc_enable_communication(guc);
|
|
|
|
|
if (ret)
|
2017-05-23 01:50:28 +08:00
|
|
|
goto err_log_capture;
|
2017-05-02 18:32:42 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_HUC(i915)) {
|
2017-12-06 21:53:16 +08:00
|
|
|
ret = intel_huc_auth(huc);
|
|
|
|
|
if (ret)
|
|
|
|
|
goto err_communication;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_GUC_SUBMISSION(i915)) {
|
2017-11-16 21:32:39 +08:00
|
|
|
ret = intel_guc_submission_enable(guc);
|
2017-03-14 22:28:11 +08:00
|
|
|
if (ret)
|
2018-03-19 17:53:36 +08:00
|
|
|
goto err_communication;
|
2017-03-14 22:28:11 +08:00
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
dev_info(i915->drm.dev, "GuC firmware version %u.%u\n",
|
2017-10-16 22:47:17 +08:00
|
|
|
guc->fw.major_ver_found, guc->fw.minor_ver_found);
|
2018-05-25 20:18:58 +08:00
|
|
|
dev_info(i915->drm.dev, "GuC submission %s\n",
|
|
|
|
|
enableddisabled(USES_GUC_SUBMISSION(i915)));
|
|
|
|
|
dev_info(i915->drm.dev, "HuC %s\n",
|
|
|
|
|
enableddisabled(USES_HUC(i915)));
|
2017-10-16 22:47:17 +08:00
|
|
|
|
2017-03-14 22:28:11 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We've failed to load the firmware :(
|
|
|
|
|
*/
|
2017-12-06 21:53:16 +08:00
|
|
|
err_communication:
|
|
|
|
|
guc_disable_communication(guc);
|
2017-05-23 01:50:28 +08:00
|
|
|
err_log_capture:
|
|
|
|
|
guc_capture_load_err_log(guc);
|
2017-12-06 21:53:15 +08:00
|
|
|
err_out:
|
|
|
|
|
/*
|
|
|
|
|
* Note that there is no fallback as either user explicitly asked for
|
|
|
|
|
* the GuC or driver default option was to run with the GuC enabled.
|
|
|
|
|
*/
|
|
|
|
|
if (GEM_WARN_ON(ret == -EIO))
|
|
|
|
|
ret = -EINVAL;
|
2017-03-14 22:28:11 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
dev_err(i915->drm.dev, "GuC initialization failed %d\n", ret);
|
2017-03-14 22:28:11 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
void intel_uc_fini_hw(struct drm_i915_private *i915)
|
2017-03-23 01:39:46 +08:00
|
|
|
{
|
2018-05-25 20:18:58 +08:00
|
|
|
struct intel_guc *guc = &i915->guc;
|
2017-11-16 21:32:39 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (!USES_GUC(i915))
|
2017-03-29 00:53:47 +08:00
|
|
|
return;
|
|
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
GEM_BUG_ON(!HAS_GUC(i915));
|
2017-12-14 06:13:48 +08:00
|
|
|
|
2018-05-25 20:18:58 +08:00
|
|
|
if (USES_GUC_SUBMISSION(i915))
|
2017-11-16 21:32:39 +08:00
|
|
|
intel_guc_submission_disable(guc);
|
2017-05-26 19:13:24 +08:00
|
|
|
|
2017-11-16 21:32:39 +08:00
|
|
|
guc_disable_communication(guc);
|
2017-03-23 01:39:46 +08:00
|
|
|
}
|
2018-03-02 19:15:49 +08:00
|
|
|
|
|
|
|
|
int intel_uc_suspend(struct drm_i915_private *i915)
|
|
|
|
|
{
|
|
|
|
|
struct intel_guc *guc = &i915->guc;
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
if (!USES_GUC(i915))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
err = intel_guc_suspend(guc);
|
|
|
|
|
if (err) {
|
|
|
|
|
DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gen9_disable_guc_interrupts(i915);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int intel_uc_resume(struct drm_i915_private *i915)
|
|
|
|
|
{
|
|
|
|
|
struct intel_guc *guc = &i915->guc;
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
if (!USES_GUC(i915))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2018-03-29 04:58:50 +08:00
|
|
|
gen9_enable_guc_interrupts(i915);
|
2018-03-02 19:15:49 +08:00
|
|
|
|
|
|
|
|
err = intel_guc_resume(guc);
|
|
|
|
|
if (err) {
|
|
|
|
|
DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|