2014-05-01 20:29:27 +08:00
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/*
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* Functions and registers to access AXP20X power management chip.
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*
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* Copyright (C) 2013, Carlo Caione <carlo@caione.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_MFD_AXP20X_H
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#define __LINUX_MFD_AXP20X_H
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2015-08-01 16:39:38 +08:00
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#include <linux/regmap.h>
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2014-05-01 20:29:27 +08:00
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enum {
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2015-07-11 20:59:56 +08:00
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AXP152_ID = 0,
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AXP202_ID,
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2014-05-01 20:29:27 +08:00
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AXP209_ID,
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2015-04-10 12:09:01 +08:00
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AXP221_ID,
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2016-02-12 10:02:44 +08:00
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AXP223_ID,
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2014-10-07 12:17:14 +08:00
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AXP288_ID,
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2016-03-29 17:22:26 +08:00
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AXP809_ID,
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2014-10-07 12:17:14 +08:00
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NR_AXP20X_VARIANTS,
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2014-05-01 20:29:27 +08:00
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};
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#define AXP20X_DATACACHE(m) (0x04 + (m))
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/* Power supply */
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2015-07-11 20:59:56 +08:00
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#define AXP152_PWR_OP_MODE 0x01
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#define AXP152_LDO3456_DC1234_CTRL 0x12
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#define AXP152_ALDO_OP_MODE 0x13
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#define AXP152_LDO0_CTRL 0x15
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#define AXP152_DCDC2_V_OUT 0x23
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#define AXP152_DCDC2_V_SCAL 0x25
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#define AXP152_DCDC1_V_OUT 0x26
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#define AXP152_DCDC3_V_OUT 0x27
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#define AXP152_ALDO12_V_OUT 0x28
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#define AXP152_DLDO1_V_OUT 0x29
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#define AXP152_DLDO2_V_OUT 0x2a
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#define AXP152_DCDC4_V_OUT 0x2b
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#define AXP152_V_OFF 0x31
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#define AXP152_OFF_CTRL 0x32
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#define AXP152_PEK_KEY 0x36
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#define AXP152_DCDC_FREQ 0x37
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#define AXP152_DCDC_MODE 0x80
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2014-05-01 20:29:27 +08:00
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#define AXP20X_PWR_INPUT_STATUS 0x00
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#define AXP20X_PWR_OP_MODE 0x01
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#define AXP20X_USB_OTG_STATUS 0x02
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#define AXP20X_PWR_OUT_CTRL 0x12
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#define AXP20X_DCDC2_V_OUT 0x23
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#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
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#define AXP20X_DCDC3_V_OUT 0x27
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#define AXP20X_LDO24_V_OUT 0x28
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#define AXP20X_LDO3_V_OUT 0x29
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#define AXP20X_VBUS_IPSOUT_MGMT 0x30
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#define AXP20X_V_OFF 0x31
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#define AXP20X_OFF_CTRL 0x32
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#define AXP20X_CHRG_CTRL1 0x33
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#define AXP20X_CHRG_CTRL2 0x34
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#define AXP20X_CHRG_BAK_CTRL 0x35
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#define AXP20X_PEK_KEY 0x36
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#define AXP20X_DCDC_FREQ 0x37
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#define AXP20X_V_LTF_CHRG 0x38
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#define AXP20X_V_HTF_CHRG 0x39
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#define AXP20X_APS_WARN_L1 0x3a
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#define AXP20X_APS_WARN_L2 0x3b
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#define AXP20X_V_LTF_DISCHRG 0x3c
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#define AXP20X_V_HTF_DISCHRG 0x3d
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2015-04-10 12:09:01 +08:00
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#define AXP22X_PWR_OUT_CTRL1 0x10
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#define AXP22X_PWR_OUT_CTRL2 0x12
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#define AXP22X_PWR_OUT_CTRL3 0x13
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#define AXP22X_DLDO1_V_OUT 0x15
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#define AXP22X_DLDO2_V_OUT 0x16
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#define AXP22X_DLDO3_V_OUT 0x17
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#define AXP22X_DLDO4_V_OUT 0x18
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#define AXP22X_ELDO1_V_OUT 0x19
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#define AXP22X_ELDO2_V_OUT 0x1a
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#define AXP22X_ELDO3_V_OUT 0x1b
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#define AXP22X_DC5LDO_V_OUT 0x1c
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#define AXP22X_DCDC1_V_OUT 0x21
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#define AXP22X_DCDC2_V_OUT 0x22
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#define AXP22X_DCDC3_V_OUT 0x23
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#define AXP22X_DCDC4_V_OUT 0x24
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#define AXP22X_DCDC5_V_OUT 0x25
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#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
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#define AXP22X_ALDO1_V_OUT 0x28
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#define AXP22X_ALDO2_V_OUT 0x29
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#define AXP22X_ALDO3_V_OUT 0x2a
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#define AXP22X_CHRG_CTRL3 0x35
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2014-05-01 20:29:27 +08:00
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/* Interrupt */
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2015-07-11 20:59:56 +08:00
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#define AXP152_IRQ1_EN 0x40
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#define AXP152_IRQ2_EN 0x41
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#define AXP152_IRQ3_EN 0x42
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#define AXP152_IRQ1_STATE 0x48
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#define AXP152_IRQ2_STATE 0x49
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#define AXP152_IRQ3_STATE 0x4a
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2014-05-01 20:29:27 +08:00
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#define AXP20X_IRQ1_EN 0x40
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#define AXP20X_IRQ2_EN 0x41
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#define AXP20X_IRQ3_EN 0x42
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#define AXP20X_IRQ4_EN 0x43
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#define AXP20X_IRQ5_EN 0x44
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2014-10-07 12:17:14 +08:00
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#define AXP20X_IRQ6_EN 0x45
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2014-05-01 20:29:27 +08:00
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#define AXP20X_IRQ1_STATE 0x48
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#define AXP20X_IRQ2_STATE 0x49
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#define AXP20X_IRQ3_STATE 0x4a
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#define AXP20X_IRQ4_STATE 0x4b
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#define AXP20X_IRQ5_STATE 0x4c
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2014-10-07 12:17:14 +08:00
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#define AXP20X_IRQ6_STATE 0x4d
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2014-05-01 20:29:27 +08:00
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/* ADC */
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#define AXP20X_ACIN_V_ADC_H 0x56
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#define AXP20X_ACIN_V_ADC_L 0x57
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#define AXP20X_ACIN_I_ADC_H 0x58
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#define AXP20X_ACIN_I_ADC_L 0x59
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#define AXP20X_VBUS_V_ADC_H 0x5a
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#define AXP20X_VBUS_V_ADC_L 0x5b
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#define AXP20X_VBUS_I_ADC_H 0x5c
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#define AXP20X_VBUS_I_ADC_L 0x5d
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#define AXP20X_TEMP_ADC_H 0x5e
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#define AXP20X_TEMP_ADC_L 0x5f
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#define AXP20X_TS_IN_H 0x62
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#define AXP20X_TS_IN_L 0x63
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#define AXP20X_GPIO0_V_ADC_H 0x64
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#define AXP20X_GPIO0_V_ADC_L 0x65
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#define AXP20X_GPIO1_V_ADC_H 0x66
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#define AXP20X_GPIO1_V_ADC_L 0x67
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#define AXP20X_PWR_BATT_H 0x70
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#define AXP20X_PWR_BATT_M 0x71
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#define AXP20X_PWR_BATT_L 0x72
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#define AXP20X_BATT_V_H 0x78
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#define AXP20X_BATT_V_L 0x79
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#define AXP20X_BATT_CHRG_I_H 0x7a
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#define AXP20X_BATT_CHRG_I_L 0x7b
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#define AXP20X_BATT_DISCHRG_I_H 0x7c
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#define AXP20X_BATT_DISCHRG_I_L 0x7d
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#define AXP20X_IPSOUT_V_HIGH_H 0x7e
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#define AXP20X_IPSOUT_V_HIGH_L 0x7f
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/* Power supply */
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#define AXP20X_DCDC_MODE 0x80
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#define AXP20X_ADC_EN1 0x82
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#define AXP20X_ADC_EN2 0x83
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#define AXP20X_ADC_RATE 0x84
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#define AXP20X_GPIO10_IN_RANGE 0x85
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#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
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#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
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#define AXP20X_TIMER_CTRL 0x8a
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#define AXP20X_VBUS_MON 0x8b
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#define AXP20X_OVER_TMP 0x8f
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2015-04-10 12:09:01 +08:00
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#define AXP22X_PWREN_CTRL1 0x8c
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#define AXP22X_PWREN_CTRL2 0x8d
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2014-05-01 20:29:27 +08:00
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/* GPIO */
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2015-07-11 20:59:56 +08:00
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#define AXP152_GPIO0_CTRL 0x90
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#define AXP152_GPIO1_CTRL 0x91
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#define AXP152_GPIO2_CTRL 0x92
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#define AXP152_GPIO3_CTRL 0x93
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#define AXP152_LDOGPIO2_V_OUT 0x96
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#define AXP152_GPIO_INPUT 0x97
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#define AXP152_PWM0_FREQ_X 0x98
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#define AXP152_PWM0_FREQ_Y 0x99
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#define AXP152_PWM0_DUTY_CYCLE 0x9a
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#define AXP152_PWM1_FREQ_X 0x9b
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#define AXP152_PWM1_FREQ_Y 0x9c
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#define AXP152_PWM1_DUTY_CYCLE 0x9d
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2014-05-01 20:29:27 +08:00
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#define AXP20X_GPIO0_CTRL 0x90
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#define AXP20X_LDO5_V_OUT 0x91
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#define AXP20X_GPIO1_CTRL 0x92
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#define AXP20X_GPIO2_CTRL 0x93
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#define AXP20X_GPIO20_SS 0x94
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#define AXP20X_GPIO3_CTRL 0x95
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2015-04-10 12:09:01 +08:00
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#define AXP22X_LDO_IO0_V_OUT 0x91
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#define AXP22X_LDO_IO1_V_OUT 0x93
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#define AXP22X_GPIO_STATE 0x94
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#define AXP22X_GPIO_PULL_DOWN 0x95
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2014-05-01 20:29:27 +08:00
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/* Battery */
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#define AXP20X_CHRG_CC_31_24 0xb0
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#define AXP20X_CHRG_CC_23_16 0xb1
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#define AXP20X_CHRG_CC_15_8 0xb2
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#define AXP20X_CHRG_CC_7_0 0xb3
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#define AXP20X_DISCHRG_CC_31_24 0xb4
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#define AXP20X_DISCHRG_CC_23_16 0xb5
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#define AXP20X_DISCHRG_CC_15_8 0xb6
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#define AXP20X_DISCHRG_CC_7_0 0xb7
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#define AXP20X_CC_CTRL 0xb8
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#define AXP20X_FG_RES 0xb9
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2015-08-08 23:58:40 +08:00
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/* OCV */
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#define AXP20X_RDC_H 0xba
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#define AXP20X_RDC_L 0xbb
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#define AXP20X_OCV(m) (0xc0 + (m))
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#define AXP20X_OCV_MAX 0xf
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2015-04-10 12:09:01 +08:00
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/* AXP22X specific registers */
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#define AXP22X_BATLOW_THRES1 0xe6
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2014-10-07 12:17:14 +08:00
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/* AXP288 specific registers */
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#define AXP288_PMIC_ADC_H 0x56
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#define AXP288_PMIC_ADC_L 0x57
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#define AXP288_ADC_TS_PIN_CTRL 0x84
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#define AXP288_PMIC_ADC_EN 0x84
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2015-01-08 05:25:52 +08:00
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/* Fuel Gauge */
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#define AXP288_FG_RDC1_REG 0xba
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#define AXP288_FG_RDC0_REG 0xbb
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#define AXP288_FG_OCVH_REG 0xbc
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#define AXP288_FG_OCVL_REG 0xbd
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#define AXP288_FG_OCV_CURVE_REG 0xc0
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#define AXP288_FG_DES_CAP1_REG 0xe0
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#define AXP288_FG_DES_CAP0_REG 0xe1
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#define AXP288_FG_CC_MTR1_REG 0xe2
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#define AXP288_FG_CC_MTR0_REG 0xe3
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#define AXP288_FG_OCV_CAP_REG 0xe4
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#define AXP288_FG_CC_CAP_REG 0xe5
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#define AXP288_FG_LOW_CAP_REG 0xe6
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#define AXP288_FG_TUNE0 0xe8
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#define AXP288_FG_TUNE1 0xe9
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#define AXP288_FG_TUNE2 0xea
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#define AXP288_FG_TUNE3 0xeb
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#define AXP288_FG_TUNE4 0xec
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#define AXP288_FG_TUNE5 0xed
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2014-10-07 12:17:14 +08:00
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2014-05-01 20:29:27 +08:00
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/* Regulators IDs */
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enum {
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AXP20X_LDO1 = 0,
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AXP20X_LDO2,
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AXP20X_LDO3,
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AXP20X_LDO4,
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AXP20X_LDO5,
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AXP20X_DCDC2,
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AXP20X_DCDC3,
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AXP20X_REG_ID_MAX,
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};
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2015-04-10 12:09:01 +08:00
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enum {
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AXP22X_DCDC1 = 0,
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AXP22X_DCDC2,
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AXP22X_DCDC3,
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AXP22X_DCDC4,
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AXP22X_DCDC5,
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AXP22X_DC1SW,
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AXP22X_DC5LDO,
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AXP22X_ALDO1,
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AXP22X_ALDO2,
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AXP22X_ALDO3,
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AXP22X_ELDO1,
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AXP22X_ELDO2,
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AXP22X_ELDO3,
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AXP22X_DLDO1,
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AXP22X_DLDO2,
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AXP22X_DLDO3,
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AXP22X_DLDO4,
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AXP22X_RTC_LDO,
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AXP22X_LDO_IO0,
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AXP22X_LDO_IO1,
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AXP22X_REG_ID_MAX,
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};
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2016-03-29 17:22:26 +08:00
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enum {
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AXP809_DCDC1 = 0,
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AXP809_DCDC2,
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AXP809_DCDC3,
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AXP809_DCDC4,
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AXP809_DCDC5,
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AXP809_DC1SW,
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AXP809_DC5LDO,
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AXP809_ALDO1,
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AXP809_ALDO2,
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AXP809_ALDO3,
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AXP809_ELDO1,
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AXP809_ELDO2,
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AXP809_ELDO3,
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AXP809_DLDO1,
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AXP809_DLDO2,
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AXP809_RTC_LDO,
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AXP809_LDO_IO0,
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AXP809_LDO_IO1,
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AXP809_SW,
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AXP809_REG_ID_MAX,
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};
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2014-05-01 20:29:27 +08:00
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/* IRQs */
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2015-07-11 20:59:56 +08:00
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enum {
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AXP152_IRQ_LDO0IN_CONNECT = 1,
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AXP152_IRQ_LDO0IN_REMOVAL,
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AXP152_IRQ_ALDO0IN_CONNECT,
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AXP152_IRQ_ALDO0IN_REMOVAL,
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AXP152_IRQ_DCDC1_V_LOW,
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AXP152_IRQ_DCDC2_V_LOW,
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AXP152_IRQ_DCDC3_V_LOW,
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AXP152_IRQ_DCDC4_V_LOW,
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AXP152_IRQ_PEK_SHORT,
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AXP152_IRQ_PEK_LONG,
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AXP152_IRQ_TIMER,
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AXP152_IRQ_PEK_RIS_EDGE,
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AXP152_IRQ_PEK_FAL_EDGE,
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AXP152_IRQ_GPIO3_INPUT,
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AXP152_IRQ_GPIO2_INPUT,
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AXP152_IRQ_GPIO1_INPUT,
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AXP152_IRQ_GPIO0_INPUT,
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};
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2014-05-01 20:29:27 +08:00
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enum {
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AXP20X_IRQ_ACIN_OVER_V = 1,
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AXP20X_IRQ_ACIN_PLUGIN,
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AXP20X_IRQ_ACIN_REMOVAL,
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AXP20X_IRQ_VBUS_OVER_V,
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AXP20X_IRQ_VBUS_PLUGIN,
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AXP20X_IRQ_VBUS_REMOVAL,
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AXP20X_IRQ_VBUS_V_LOW,
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AXP20X_IRQ_BATT_PLUGIN,
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AXP20X_IRQ_BATT_REMOVAL,
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AXP20X_IRQ_BATT_ENT_ACT_MODE,
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AXP20X_IRQ_BATT_EXIT_ACT_MODE,
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AXP20X_IRQ_CHARG,
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AXP20X_IRQ_CHARG_DONE,
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AXP20X_IRQ_BATT_TEMP_HIGH,
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AXP20X_IRQ_BATT_TEMP_LOW,
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AXP20X_IRQ_DIE_TEMP_HIGH,
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AXP20X_IRQ_CHARG_I_LOW,
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AXP20X_IRQ_DCDC1_V_LONG,
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AXP20X_IRQ_DCDC2_V_LONG,
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AXP20X_IRQ_DCDC3_V_LONG,
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AXP20X_IRQ_PEK_SHORT = 22,
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AXP20X_IRQ_PEK_LONG,
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AXP20X_IRQ_N_OE_PWR_ON,
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AXP20X_IRQ_N_OE_PWR_OFF,
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AXP20X_IRQ_VBUS_VALID,
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AXP20X_IRQ_VBUS_NOT_VALID,
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AXP20X_IRQ_VBUS_SESS_VALID,
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AXP20X_IRQ_VBUS_SESS_END,
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AXP20X_IRQ_LOW_PWR_LVL1,
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AXP20X_IRQ_LOW_PWR_LVL2,
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AXP20X_IRQ_TIMER,
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AXP20X_IRQ_PEK_RIS_EDGE,
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AXP20X_IRQ_PEK_FAL_EDGE,
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AXP20X_IRQ_GPIO3_INPUT,
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AXP20X_IRQ_GPIO2_INPUT,
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AXP20X_IRQ_GPIO1_INPUT,
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AXP20X_IRQ_GPIO0_INPUT,
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};
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2015-04-10 12:09:01 +08:00
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enum axp22x_irqs {
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AXP22X_IRQ_ACIN_OVER_V = 1,
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AXP22X_IRQ_ACIN_PLUGIN,
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AXP22X_IRQ_ACIN_REMOVAL,
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AXP22X_IRQ_VBUS_OVER_V,
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AXP22X_IRQ_VBUS_PLUGIN,
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AXP22X_IRQ_VBUS_REMOVAL,
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AXP22X_IRQ_VBUS_V_LOW,
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AXP22X_IRQ_BATT_PLUGIN,
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AXP22X_IRQ_BATT_REMOVAL,
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AXP22X_IRQ_BATT_ENT_ACT_MODE,
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AXP22X_IRQ_BATT_EXIT_ACT_MODE,
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AXP22X_IRQ_CHARG,
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AXP22X_IRQ_CHARG_DONE,
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AXP22X_IRQ_BATT_TEMP_HIGH,
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AXP22X_IRQ_BATT_TEMP_LOW,
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AXP22X_IRQ_DIE_TEMP_HIGH,
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AXP22X_IRQ_PEK_SHORT,
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AXP22X_IRQ_PEK_LONG,
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AXP22X_IRQ_LOW_PWR_LVL1,
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AXP22X_IRQ_LOW_PWR_LVL2,
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AXP22X_IRQ_TIMER,
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AXP22X_IRQ_PEK_RIS_EDGE,
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AXP22X_IRQ_PEK_FAL_EDGE,
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AXP22X_IRQ_GPIO1_INPUT,
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AXP22X_IRQ_GPIO0_INPUT,
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};
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2014-10-07 12:17:14 +08:00
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enum axp288_irqs {
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AXP288_IRQ_VBUS_FALL = 2,
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AXP288_IRQ_VBUS_RISE,
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AXP288_IRQ_OV,
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AXP288_IRQ_FALLING_ALT,
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AXP288_IRQ_RISING_ALT,
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AXP288_IRQ_OV_ALT,
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AXP288_IRQ_DONE = 10,
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AXP288_IRQ_CHARGING,
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AXP288_IRQ_SAFE_QUIT,
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AXP288_IRQ_SAFE_ENTER,
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AXP288_IRQ_ABSENT,
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AXP288_IRQ_APPEND,
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AXP288_IRQ_QWBTU,
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AXP288_IRQ_WBTU,
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AXP288_IRQ_QWBTO,
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AXP288_IRQ_WBTO,
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AXP288_IRQ_QCBTU,
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AXP288_IRQ_CBTU,
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AXP288_IRQ_QCBTO,
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AXP288_IRQ_CBTO,
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AXP288_IRQ_WL2,
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AXP288_IRQ_WL1,
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AXP288_IRQ_GPADC,
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AXP288_IRQ_OT = 31,
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AXP288_IRQ_GPIO0,
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AXP288_IRQ_GPIO1,
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AXP288_IRQ_POKO,
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AXP288_IRQ_POKL,
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AXP288_IRQ_POKS,
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AXP288_IRQ_POKN,
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AXP288_IRQ_POKP,
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AXP288_IRQ_TIMER,
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AXP288_IRQ_MV_CHNG,
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AXP288_IRQ_BC_USB_CHNG,
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};
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2016-03-29 17:22:26 +08:00
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enum axp809_irqs {
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AXP809_IRQ_ACIN_OVER_V = 1,
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AXP809_IRQ_ACIN_PLUGIN,
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AXP809_IRQ_ACIN_REMOVAL,
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AXP809_IRQ_VBUS_OVER_V,
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AXP809_IRQ_VBUS_PLUGIN,
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AXP809_IRQ_VBUS_REMOVAL,
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AXP809_IRQ_VBUS_V_LOW,
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AXP809_IRQ_BATT_PLUGIN,
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AXP809_IRQ_BATT_REMOVAL,
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AXP809_IRQ_BATT_ENT_ACT_MODE,
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AXP809_IRQ_BATT_EXIT_ACT_MODE,
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AXP809_IRQ_CHARG,
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AXP809_IRQ_CHARG_DONE,
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AXP809_IRQ_BATT_CHG_TEMP_HIGH,
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AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
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AXP809_IRQ_BATT_CHG_TEMP_LOW,
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AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
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AXP809_IRQ_BATT_ACT_TEMP_HIGH,
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AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
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AXP809_IRQ_BATT_ACT_TEMP_LOW,
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AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
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AXP809_IRQ_DIE_TEMP_HIGH,
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AXP809_IRQ_LOW_PWR_LVL1,
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AXP809_IRQ_LOW_PWR_LVL2,
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AXP809_IRQ_TIMER,
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AXP809_IRQ_PEK_RIS_EDGE,
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AXP809_IRQ_PEK_FAL_EDGE,
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AXP809_IRQ_PEK_SHORT,
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AXP809_IRQ_PEK_LONG,
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AXP809_IRQ_PEK_OVER_OFF,
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AXP809_IRQ_GPIO1_INPUT,
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AXP809_IRQ_GPIO0_INPUT,
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};
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2014-10-07 12:17:14 +08:00
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#define AXP288_TS_ADC_H 0x58
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#define AXP288_TS_ADC_L 0x59
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#define AXP288_GP_ADC_H 0x5a
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#define AXP288_GP_ADC_L 0x5b
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2014-05-01 20:29:27 +08:00
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struct axp20x_dev {
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struct device *dev;
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2016-02-12 10:02:42 +08:00
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int irq;
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2014-05-01 20:29:27 +08:00
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struct regmap *regmap;
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struct regmap_irq_chip_data *regmap_irqc;
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long variant;
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2014-10-07 12:17:14 +08:00
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int nr_cells;
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struct mfd_cell *cells;
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const struct regmap_config *regmap_cfg;
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const struct regmap_irq_chip *regmap_irq_chip;
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2014-05-01 20:29:27 +08:00
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};
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2015-01-08 05:25:52 +08:00
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#define BATTID_LEN 64
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#define OCV_CURVE_SIZE 32
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#define MAX_THERM_CURVE_SIZE 25
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#define PD_DEF_MIN_TEMP 0
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#define PD_DEF_MAX_TEMP 55
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struct axp20x_fg_pdata {
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char battid[BATTID_LEN + 1];
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int design_cap;
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int min_volt;
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int max_volt;
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int max_temp;
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int min_temp;
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int cap1;
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int cap0;
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int rdc1;
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int rdc0;
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int ocv_curve[OCV_CURVE_SIZE];
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int tcsz;
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int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
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};
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2015-05-05 00:46:07 +08:00
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struct axp20x_chrg_pdata {
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int max_cc;
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int max_cv;
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int def_cc;
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int def_cv;
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};
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2015-04-30 23:14:45 +08:00
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struct axp288_extcon_pdata {
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/* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
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struct gpio_desc *gpio_mux_cntl;
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};
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2015-08-01 16:39:38 +08:00
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/* generic helper function for reading 9-16 bit wide regs */
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static inline int axp20x_read_variable_width(struct regmap *regmap,
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unsigned int reg, unsigned int width)
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{
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unsigned int reg_val, result;
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int err;
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err = regmap_read(regmap, reg, ®_val);
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if (err)
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return err;
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result = reg_val << (width - 8);
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err = regmap_read(regmap, reg + 1, ®_val);
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if (err)
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return err;
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result |= reg_val;
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return result;
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}
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2016-02-12 10:02:42 +08:00
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/**
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* axp20x_match_device(): Setup axp20x variant related fields
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*
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* @axp20x: axp20x device to setup (.dev field must be set)
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* @dev: device associated with this axp20x device
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*
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* This lets the axp20x core configure the mfd cells and register maps
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* for later use.
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*/
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int axp20x_match_device(struct axp20x_dev *axp20x);
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/**
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* axp20x_device_probe(): Probe a configured axp20x device
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*
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* @axp20x: axp20x device to probe (must be configured)
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*
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* This function lets the axp20x core register the axp20x mfd devices
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* and irqchip. The axp20x device passed in must be fully configured
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* with axp20x_match_device, its irq set, and regmap created.
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*/
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int axp20x_device_probe(struct axp20x_dev *axp20x);
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/**
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* axp20x_device_probe(): Remove a axp20x device
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*
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* @axp20x: axp20x device to remove
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*
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* This tells the axp20x core to remove the associated mfd devices
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*/
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int axp20x_device_remove(struct axp20x_dev *axp20x);
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2014-05-01 20:29:27 +08:00
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#endif /* __LINUX_MFD_AXP20X_H */
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