2009-06-05 20:42:42 +08:00
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/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include <linux/seq_file.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-06-05 20:42:42 +08:00
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#include "drmP.h"
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#include "radeon_drm.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "atom.h"
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int radeon_debugfs_ib_init(struct radeon_device *rdev);
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2011-10-24 23:08:44 +08:00
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int radeon_debugfs_ring_init(struct radeon_device *rdev);
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2009-06-05 20:42:42 +08:00
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2011-10-14 07:08:47 +08:00
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u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
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{
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struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
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u32 pg_idx, pg_offset;
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u32 idx_value = 0;
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int new_page;
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pg_idx = (idx * 4) / PAGE_SIZE;
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pg_offset = (idx * 4) % PAGE_SIZE;
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if (ibc->kpage_idx[0] == pg_idx)
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return ibc->kpage[0][pg_offset/4];
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if (ibc->kpage_idx[1] == pg_idx)
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return ibc->kpage[1][pg_offset/4];
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new_page = radeon_cs_update_pages(p, pg_idx);
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if (new_page < 0) {
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p->parser_error = new_page;
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return 0;
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}
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idx_value = ibc->kpage[new_page][pg_offset/4];
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return idx_value;
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}
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2011-10-23 18:56:27 +08:00
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void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
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2011-10-14 07:08:47 +08:00
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{
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#if DRM_DEBUG_CODE
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2011-10-23 18:56:27 +08:00
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if (ring->count_dw <= 0) {
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2011-10-14 07:08:47 +08:00
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DRM_ERROR("radeon: writting more dword to ring than expected !\n");
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}
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#endif
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2011-10-23 18:56:27 +08:00
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ring->ring[ring->wptr++] = v;
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ring->wptr &= ring->ptr_mask;
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ring->count_dw--;
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ring->ring_free_dw--;
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2011-10-14 07:08:47 +08:00
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}
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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/*
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* IB.
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*/
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2011-12-22 01:13:47 +08:00
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bool radeon_ib_try_free(struct radeon_device *rdev, struct radeon_ib *ib)
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2010-01-29 01:22:31 +08:00
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{
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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bool done = false;
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/* only free ib which have been emited */
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if (ib->fence && ib->fence->emitted) {
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if (radeon_fence_signaled(ib->fence)) {
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radeon_fence_unref(&ib->fence);
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radeon_sa_bo_free(rdev, &ib->sa_bo);
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done = true;
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}
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2010-01-29 01:22:31 +08:00
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}
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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return done;
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2010-01-29 01:22:31 +08:00
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}
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2011-12-22 01:13:46 +08:00
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int radeon_ib_get(struct radeon_device *rdev, int ring,
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struct radeon_ib **ib, unsigned size)
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2009-06-05 20:42:42 +08:00
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{
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struct radeon_fence *fence;
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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unsigned cretry = 0;
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int r = 0, i, idx;
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2009-06-05 20:42:42 +08:00
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*ib = NULL;
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2011-12-22 01:13:46 +08:00
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/* align size on 256 bytes */
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size = ALIGN(size, 256);
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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2011-09-23 21:11:23 +08:00
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r = radeon_fence_create(rdev, &fence, ring);
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2009-06-05 20:42:42 +08:00
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if (r) {
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2010-02-16 04:36:13 +08:00
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dev_err(rdev->dev, "failed to create fence for new IB\n");
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2009-06-05 20:42:42 +08:00
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return r;
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}
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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2012-01-24 00:52:15 +08:00
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radeon_mutex_lock(&rdev->ib_pool.mutex);
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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idx = rdev->ib_pool.head_id;
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retry:
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if (cretry > 5) {
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dev_err(rdev->dev, "failed to get an ib after 5 retry\n");
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2012-01-24 00:52:15 +08:00
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radeon_mutex_unlock(&rdev->ib_pool.mutex);
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2010-02-16 04:36:13 +08:00
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radeon_fence_unref(&fence);
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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return -ENOMEM;
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2009-06-05 20:42:42 +08:00
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}
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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cretry++;
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for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
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radeon_ib_try_free(rdev, &rdev->ib_pool.ibs[idx]);
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if (rdev->ib_pool.ibs[idx].fence == NULL) {
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r = radeon_sa_bo_new(rdev, &rdev->ib_pool.sa_manager,
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&rdev->ib_pool.ibs[idx].sa_bo,
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2011-12-22 01:13:46 +08:00
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size, 256);
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drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
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if (!r) {
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*ib = &rdev->ib_pool.ibs[idx];
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(*ib)->ptr = rdev->ib_pool.sa_manager.cpu_ptr;
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(*ib)->ptr += ((*ib)->sa_bo.offset >> 2);
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(*ib)->gpu_addr = rdev->ib_pool.sa_manager.gpu_addr;
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(*ib)->gpu_addr += (*ib)->sa_bo.offset;
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(*ib)->fence = fence;
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drm/radeon: GPU virtual memory support v22
Virtual address space are per drm client (opener of /dev/drm).
Client are in charge of virtual address space, they need to
map bo into it by calling DRM_RADEON_GEM_VA ioctl.
First 16M of virtual address space is reserved by the kernel.
Once using 2 level page table we should be able to have a small
vram memory footprint for each pt (there would be one pt for all
gart, one for all vram and then one first level for each virtual
address space).
Plan include using the sub allocator for a common vm page table
area and using memcpy to copy vm page table in & out. Or use
a gart object and copy things in & out using dma.
v2: agd5f fixes:
- Add vram base offset for vram pages. The GPU physical address of a
vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
cards and the physical bus address of the stolen memory on
integrated chips.
- VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
v3: agd5f:
- integrate with the semaphore/multi-ring stuff
v4:
- rebase on top ttm dma & multi-ring stuff
- userspace is now in charge of the address space
- no more specific cs vm ioctl, instead cs ioctl has a new
chunk
v5:
- properly handle mem == NULL case from move_notify callback
- fix the vm cleanup path
v6:
- fix update of page table to only happen on valid mem placement
v7:
- add tlb flush for each vm context
- add flags to define mapping property (readable, writeable, snooped)
- make ring id implicit from ib->fence->ring, up to each asic callback
to then do ring specific scheduling if vm ib scheduling function
v8:
- add query for ib limit and kernel reserved virtual space
- rename vm->size to max_pfn (maximum number of page)
- update gem_va ioctl to also allow unmap operation
- bump kernel version to allow userspace to query for vm support
v9:
- rebuild page table only when bind and incrementaly depending
on bo referenced by cs and that have been moved
- allow virtual address space to grow
- use sa allocator for vram page table
- return invalid when querying vm limit on non cayman GPU
- dump vm fault register on lockup
v10: agd5f:
- Move the vm schedule_ib callback to a standalone function, remove
the callback and use the existing ib_execute callback for VM IBs.
v11:
- rebase on top of lastest Linus
v12: agd5f:
- remove spurious backslash
- set IB vm_id to 0 in radeon_ib_get()
v13: agd5f:
- fix handling of RADEON_CHUNK_ID_FLAGS
v14:
- fix va destruction
- fix suspend resume
- forbid bo to have several different va in same vm
v15:
- rebase
v16:
- cleanup left over of vm init/fini
v17: agd5f:
- cs checker
v18: agd5f:
- reworks the CS ioctl to better support multiple rings and
VM. Rather than adding a new chunk id for VM, just re-use the
IB chunk id and add a new flags for VM mode. Also define additional
dwords for the flags chunk id to define the what ring we want to use
(gfx, compute, uvd, etc.) and the priority.
v19:
- fix cs fini in weird case of no ib
- semi working flush fix for ni
- rebase on top of sa allocator changes
v20: agd5f:
- further CS ioctl cleanups from Christian's comments
v21: agd5f:
- integrate CS checker improvements
v22: agd5f:
- final cleanups for release, only allow VM CS on cayman
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-06 11:11:05 +08:00
|
|
|
(*ib)->vm_id = 0;
|
2012-03-21 05:18:14 +08:00
|
|
|
(*ib)->is_const_ib = false;
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
/* ib are most likely to be allocated in a ring fashion
|
|
|
|
* thus rdev->ib_pool.head_id should be the id of the
|
|
|
|
* oldest ib
|
|
|
|
*/
|
|
|
|
rdev->ib_pool.head_id = (1 + idx);
|
|
|
|
rdev->ib_pool.head_id &= (RADEON_IB_POOL_SIZE - 1);
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2010-02-16 04:36:13 +08:00
|
|
|
}
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
idx = (idx + 1) & (RADEON_IB_POOL_SIZE - 1);
|
|
|
|
}
|
|
|
|
/* this should be rare event, ie all ib scheduled none signaled yet.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
|
2011-12-22 01:13:47 +08:00
|
|
|
if (rdev->ib_pool.ibs[idx].fence && rdev->ib_pool.ibs[idx].fence->emitted) {
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
r = radeon_fence_wait(rdev->ib_pool.ibs[idx].fence, false);
|
|
|
|
if (!r) {
|
|
|
|
goto retry;
|
|
|
|
}
|
|
|
|
/* an error happened */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
idx = (idx + 1) & (RADEON_IB_POOL_SIZE - 1);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
radeon_fence_unref(&fence);
|
|
|
|
return r;
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
|
|
|
|
{
|
|
|
|
struct radeon_ib *tmp = *ib;
|
|
|
|
|
|
|
|
*ib = NULL;
|
|
|
|
if (tmp == NULL) {
|
|
|
|
return;
|
|
|
|
}
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_lock(&rdev->ib_pool.mutex);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
if (tmp->fence && !tmp->fence->emitted) {
|
|
|
|
radeon_sa_bo_free(rdev, &tmp->sa_bo);
|
|
|
|
radeon_fence_unref(&tmp->fence);
|
|
|
|
}
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
|
|
|
|
{
|
2011-10-23 18:56:27 +08:00
|
|
|
struct radeon_ring *ring = &rdev->ring[ib->fence->ring];
|
2009-06-05 20:42:42 +08:00
|
|
|
int r = 0;
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
if (!ib->length_dw || !ring->ready) {
|
2009-06-05 20:42:42 +08:00
|
|
|
/* TODO: Nothings in the ib we should report. */
|
2010-02-16 04:36:13 +08:00
|
|
|
DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
|
2009-06-05 20:42:42 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2009-09-15 09:12:56 +08:00
|
|
|
|
2009-06-29 16:29:13 +08:00
|
|
|
/* 64 dwords should be enough for fence too */
|
2011-10-23 18:56:27 +08:00
|
|
|
r = radeon_ring_lock(rdev, ring, 64);
|
2009-06-05 20:42:42 +08:00
|
|
|
if (r) {
|
2011-01-29 06:32:04 +08:00
|
|
|
DRM_ERROR("radeon: scheduling IB failed (%d).\n", r);
|
2009-06-05 20:42:42 +08:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-20 01:02:21 +08:00
|
|
|
radeon_ring_ib_execute(rdev, ib->fence->ring, ib);
|
2009-06-05 20:42:42 +08:00
|
|
|
radeon_fence_emit(rdev, ib->fence);
|
2011-10-23 18:56:27 +08:00
|
|
|
radeon_ring_unlock_commit(rdev, ring);
|
2009-06-05 20:42:42 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int radeon_ib_pool_init(struct radeon_device *rdev)
|
|
|
|
{
|
2012-01-25 01:08:52 +08:00
|
|
|
struct radeon_sa_manager tmp;
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
int i, r;
|
2009-06-05 20:42:42 +08:00
|
|
|
|
2012-01-25 01:08:52 +08:00
|
|
|
r = radeon_sa_bo_manager_init(rdev, &tmp,
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
RADEON_IB_POOL_SIZE*64*1024,
|
|
|
|
RADEON_GEM_DOMAIN_GTT);
|
2009-06-05 20:42:42 +08:00
|
|
|
if (r) {
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_lock(&rdev->ib_pool.mutex);
|
2012-01-25 01:08:52 +08:00
|
|
|
if (rdev->ib_pool.ready) {
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
2012-01-25 01:08:52 +08:00
|
|
|
radeon_sa_bo_manager_fini(rdev, &tmp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
rdev->ib_pool.sa_manager = tmp;
|
|
|
|
INIT_LIST_HEAD(&rdev->ib_pool.sa_manager.sa_bo);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
|
|
|
|
rdev->ib_pool.ibs[i].fence = NULL;
|
2009-06-05 20:42:42 +08:00
|
|
|
rdev->ib_pool.ibs[i].idx = i;
|
|
|
|
rdev->ib_pool.ibs[i].length_dw = 0;
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].sa_bo.list);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
2010-02-16 04:36:13 +08:00
|
|
|
rdev->ib_pool.head_id = 0;
|
2009-06-05 20:42:42 +08:00
|
|
|
rdev->ib_pool.ready = true;
|
|
|
|
DRM_INFO("radeon: ib pool ready.\n");
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
|
2009-06-05 20:42:42 +08:00
|
|
|
if (radeon_debugfs_ib_init(rdev)) {
|
|
|
|
DRM_ERROR("Failed to register debugfs file for IB !\n");
|
|
|
|
}
|
2011-10-24 23:08:44 +08:00
|
|
|
if (radeon_debugfs_ring_init(rdev)) {
|
|
|
|
DRM_ERROR("Failed to register debugfs file for rings !\n");
|
|
|
|
}
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
return 0;
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_ib_pool_fini(struct radeon_device *rdev)
|
|
|
|
{
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
unsigned i;
|
2009-11-20 21:29:23 +08:00
|
|
|
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_lock(&rdev->ib_pool.mutex);
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
if (rdev->ib_pool.ready) {
|
|
|
|
for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
|
|
|
|
radeon_sa_bo_free(rdev, &rdev->ib_pool.ibs[i].sa_bo);
|
|
|
|
radeon_fence_unref(&rdev->ib_pool.ibs[i].fence);
|
2009-11-20 21:29:23 +08:00
|
|
|
}
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
radeon_sa_bo_manager_fini(rdev, &rdev->ib_pool.sa_manager);
|
|
|
|
rdev->ib_pool.ready = false;
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
2012-01-24 00:52:15 +08:00
|
|
|
radeon_mutex_unlock(&rdev->ib_pool.mutex);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-16 00:48:34 +08:00
|
|
|
int radeon_ib_pool_start(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
return radeon_sa_bo_manager_start(rdev, &rdev->ib_pool.sa_manager);
|
|
|
|
}
|
|
|
|
|
|
|
|
int radeon_ib_pool_suspend(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
return radeon_sa_bo_manager_suspend(rdev, &rdev->ib_pool.sa_manager);
|
|
|
|
}
|
2009-06-05 20:42:42 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ring.
|
|
|
|
*/
|
2011-10-23 18:56:27 +08:00
|
|
|
int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)
|
2011-10-13 19:19:22 +08:00
|
|
|
{
|
|
|
|
/* r1xx-r5xx only has CP ring */
|
|
|
|
if (rdev->family < CHIP_R600)
|
|
|
|
return RADEON_RING_TYPE_GFX_INDEX;
|
|
|
|
|
|
|
|
if (rdev->family >= CHIP_CAYMAN) {
|
2011-10-23 18:56:27 +08:00
|
|
|
if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX])
|
2011-10-13 19:19:22 +08:00
|
|
|
return CAYMAN_RING_TYPE_CP1_INDEX;
|
2011-10-23 18:56:27 +08:00
|
|
|
else if (ring == &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX])
|
2011-10-13 19:19:22 +08:00
|
|
|
return CAYMAN_RING_TYPE_CP2_INDEX;
|
|
|
|
}
|
|
|
|
return RADEON_RING_TYPE_GFX_INDEX;
|
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
2011-11-18 03:25:56 +08:00
|
|
|
u32 rptr;
|
|
|
|
|
2010-08-28 06:25:25 +08:00
|
|
|
if (rdev->wb.enabled)
|
2011-11-18 03:25:56 +08:00
|
|
|
rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
|
2011-10-13 18:48:45 +08:00
|
|
|
else
|
2011-11-18 03:25:56 +08:00
|
|
|
rptr = RREG32(ring->rptr_reg);
|
|
|
|
ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
|
2009-06-05 20:42:42 +08:00
|
|
|
/* This works because ring_size is a power of 2 */
|
2011-10-23 18:56:27 +08:00
|
|
|
ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
|
|
|
|
ring->ring_free_dw -= ring->wptr;
|
|
|
|
ring->ring_free_dw &= ring->ptr_mask;
|
|
|
|
if (!ring->ring_free_dw) {
|
|
|
|
ring->ring_free_dw = ring->ring_size / 4;
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-09-23 21:11:23 +08:00
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
|
|
|
/* Align requested size with padding so unlock_commit can
|
|
|
|
* pad safely */
|
2011-10-23 18:56:27 +08:00
|
|
|
ndw = (ndw + ring->align_mask) & ~ring->align_mask;
|
|
|
|
while (ndw > (ring->ring_free_dw - 1)) {
|
|
|
|
radeon_ring_free_size(rdev, ring);
|
|
|
|
if (ndw < ring->ring_free_dw) {
|
2009-06-05 20:42:42 +08:00
|
|
|
break;
|
|
|
|
}
|
2011-10-23 18:56:27 +08:00
|
|
|
r = radeon_fence_wait_next(rdev, radeon_ring_index(rdev, ring));
|
2010-05-01 03:24:17 +08:00
|
|
|
if (r)
|
2009-06-05 20:42:42 +08:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-23 18:56:27 +08:00
|
|
|
ring->count_dw = ndw;
|
|
|
|
ring->wptr_old = ring->wptr;
|
2009-06-05 20:42:42 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
|
2010-05-01 03:24:17 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
mutex_lock(&ring->mutex);
|
|
|
|
r = radeon_ring_alloc(rdev, ring, ndw);
|
2010-05-01 03:24:17 +08:00
|
|
|
if (r) {
|
2011-10-23 18:56:27 +08:00
|
|
|
mutex_unlock(&ring->mutex);
|
2010-05-01 03:24:17 +08:00
|
|
|
return r;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
|
|
|
unsigned count_dw_pad;
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* We pad to match fetch size */
|
2011-10-23 18:56:27 +08:00
|
|
|
count_dw_pad = (ring->align_mask + 1) -
|
|
|
|
(ring->wptr & ring->align_mask);
|
2009-06-05 20:42:42 +08:00
|
|
|
for (i = 0; i < count_dw_pad; i++) {
|
2011-11-18 03:25:56 +08:00
|
|
|
radeon_ring_write(ring, ring->nop);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
DRM_MEMORYBARRIER();
|
2011-11-18 03:25:56 +08:00
|
|
|
WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
|
2011-10-23 18:56:27 +08:00
|
|
|
(void)RREG32(ring->wptr_reg);
|
2010-05-01 03:24:17 +08:00
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)
|
2010-05-01 03:24:17 +08:00
|
|
|
{
|
2011-10-23 18:56:27 +08:00
|
|
|
radeon_ring_commit(rdev, ring);
|
|
|
|
mutex_unlock(&ring->mutex);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
2011-10-23 18:56:27 +08:00
|
|
|
ring->wptr = ring->wptr_old;
|
|
|
|
mutex_unlock(&ring->mutex);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
|
2011-11-18 03:25:56 +08:00
|
|
|
unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
|
|
|
|
u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
ring->ring_size = ring_size;
|
|
|
|
ring->rptr_offs = rptr_offs;
|
|
|
|
ring->rptr_reg = rptr_reg;
|
|
|
|
ring->wptr_reg = wptr_reg;
|
2011-11-18 03:25:56 +08:00
|
|
|
ring->ptr_reg_shift = ptr_reg_shift;
|
|
|
|
ring->ptr_reg_mask = ptr_reg_mask;
|
|
|
|
ring->nop = nop;
|
2009-06-05 20:42:42 +08:00
|
|
|
/* Allocate ring buffer */
|
2011-10-23 18:56:27 +08:00
|
|
|
if (ring->ring_obj == NULL) {
|
|
|
|
r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
|
2009-11-20 21:29:23 +08:00
|
|
|
RADEON_GEM_DOMAIN_GTT,
|
2011-10-23 18:56:27 +08:00
|
|
|
&ring->ring_obj);
|
2009-06-05 20:42:42 +08:00
|
|
|
if (r) {
|
2009-11-20 21:29:23 +08:00
|
|
|
dev_err(rdev->dev, "(%d) ring create failed\n", r);
|
2009-06-05 20:42:42 +08:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-23 18:56:27 +08:00
|
|
|
r = radeon_bo_reserve(ring->ring_obj, false);
|
2009-11-20 21:29:23 +08:00
|
|
|
if (unlikely(r != 0))
|
|
|
|
return r;
|
2011-10-23 18:56:27 +08:00
|
|
|
r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
|
|
|
|
&ring->gpu_addr);
|
2009-06-05 20:42:42 +08:00
|
|
|
if (r) {
|
2011-10-23 18:56:27 +08:00
|
|
|
radeon_bo_unreserve(ring->ring_obj);
|
2009-11-20 21:29:23 +08:00
|
|
|
dev_err(rdev->dev, "(%d) ring pin failed\n", r);
|
2009-06-05 20:42:42 +08:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-23 18:56:27 +08:00
|
|
|
r = radeon_bo_kmap(ring->ring_obj,
|
|
|
|
(void **)&ring->ring);
|
|
|
|
radeon_bo_unreserve(ring->ring_obj);
|
2009-06-05 20:42:42 +08:00
|
|
|
if (r) {
|
2009-11-20 21:29:23 +08:00
|
|
|
dev_err(rdev->dev, "(%d) ring map failed\n", r);
|
2009-06-05 20:42:42 +08:00
|
|
|
return r;
|
|
|
|
}
|
|
|
|
}
|
2011-10-23 18:56:27 +08:00
|
|
|
ring->ptr_mask = (ring->ring_size / 4) - 1;
|
|
|
|
ring->ring_free_dw = ring->ring_size / 4;
|
2009-06-05 20:42:42 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
|
2009-06-05 20:42:42 +08:00
|
|
|
{
|
2009-11-20 21:29:23 +08:00
|
|
|
int r;
|
2010-05-06 23:02:24 +08:00
|
|
|
struct radeon_bo *ring_obj;
|
2009-11-20 21:29:23 +08:00
|
|
|
|
2011-10-23 18:56:27 +08:00
|
|
|
mutex_lock(&ring->mutex);
|
|
|
|
ring_obj = ring->ring_obj;
|
|
|
|
ring->ring = NULL;
|
|
|
|
ring->ring_obj = NULL;
|
|
|
|
mutex_unlock(&ring->mutex);
|
2010-05-06 23:02:24 +08:00
|
|
|
|
|
|
|
if (ring_obj) {
|
|
|
|
r = radeon_bo_reserve(ring_obj, false);
|
2009-11-20 21:29:23 +08:00
|
|
|
if (likely(r == 0)) {
|
2010-05-06 23:02:24 +08:00
|
|
|
radeon_bo_kunmap(ring_obj);
|
|
|
|
radeon_bo_unpin(ring_obj);
|
|
|
|
radeon_bo_unreserve(ring_obj);
|
2009-11-20 21:29:23 +08:00
|
|
|
}
|
2010-05-06 23:02:24 +08:00
|
|
|
radeon_bo_unref(&ring_obj);
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Debugfs info
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
2011-10-24 23:08:44 +08:00
|
|
|
|
|
|
|
static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
|
|
struct drm_device *dev = node->minor->dev;
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
|
|
int ridx = *(int*)node->info_ent->data;
|
|
|
|
struct radeon_ring *ring = &rdev->ring[ridx];
|
|
|
|
unsigned count, i, j;
|
|
|
|
|
|
|
|
radeon_ring_free_size(rdev, ring);
|
|
|
|
count = (ring->ring_size / 4) - ring->ring_free_dw;
|
|
|
|
seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg));
|
|
|
|
seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg));
|
|
|
|
seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr);
|
|
|
|
seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr);
|
|
|
|
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
|
|
|
|
seq_printf(m, "%u dwords in ring\n", count);
|
|
|
|
i = ring->rptr;
|
|
|
|
for (j = 0; j <= count; j++) {
|
|
|
|
seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]);
|
|
|
|
i = (i + 1) & ring->ptr_mask;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
|
|
|
|
static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
|
|
|
|
static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
|
|
|
|
|
|
|
|
static struct drm_info_list radeon_debugfs_ring_info_list[] = {
|
|
|
|
{"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index},
|
|
|
|
{"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index},
|
|
|
|
{"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index},
|
|
|
|
};
|
|
|
|
|
2009-06-05 20:42:42 +08:00
|
|
|
static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
2012-02-23 22:18:45 +08:00
|
|
|
struct drm_device *dev = node->minor->dev;
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
|
|
struct radeon_ib *ib = &rdev->ib_pool.ibs[*((unsigned*)node->info_ent->data)];
|
2009-06-05 20:42:42 +08:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
if (ib == NULL) {
|
|
|
|
return 0;
|
|
|
|
}
|
2010-02-16 04:36:13 +08:00
|
|
|
seq_printf(m, "IB %04u\n", ib->idx);
|
2009-06-05 20:42:42 +08:00
|
|
|
seq_printf(m, "IB fence %p\n", ib->fence);
|
|
|
|
seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
|
|
|
|
for (i = 0; i < ib->length_dw; i++) {
|
|
|
|
seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];
|
|
|
|
static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
|
2012-02-23 22:18:45 +08:00
|
|
|
static unsigned radeon_debugfs_ib_idx[RADEON_IB_POOL_SIZE];
|
2009-06-05 20:42:42 +08:00
|
|
|
#endif
|
|
|
|
|
2011-10-24 23:08:44 +08:00
|
|
|
int radeon_debugfs_ring_init(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
2012-02-22 00:39:15 +08:00
|
|
|
if (rdev->family >= CHIP_CAYMAN)
|
|
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list,
|
|
|
|
ARRAY_SIZE(radeon_debugfs_ring_info_list));
|
|
|
|
else
|
|
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list, 1);
|
2011-10-24 23:08:44 +08:00
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2009-06-05 20:42:42 +08:00
|
|
|
int radeon_debugfs_ib_init(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
|
|
|
|
sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);
|
2012-02-23 22:18:45 +08:00
|
|
|
radeon_debugfs_ib_idx[i] = i;
|
2009-06-05 20:42:42 +08:00
|
|
|
radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];
|
|
|
|
radeon_debugfs_ib_list[i].show = &radeon_debugfs_ib_info;
|
|
|
|
radeon_debugfs_ib_list[i].driver_features = 0;
|
2012-02-23 22:18:45 +08:00
|
|
|
radeon_debugfs_ib_list[i].data = &radeon_debugfs_ib_idx[i];
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,
|
|
|
|
RADEON_IB_POOL_SIZE);
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|