2005-07-31 07:31:23 +08:00
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PHY Abstraction Layer
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2006-12-02 02:01:06 +08:00
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(Updated 2006-11-30)
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2005-07-31 07:31:23 +08:00
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Purpose
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Most network devices consist of set of registers which provide an interface
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to a MAC layer, which communicates with the physical connection through a
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PHY. The PHY concerns itself with negotiating link parameters with the link
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partner on the other side of the network connection (typically, an ethernet
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cable), and provides a register interface to allow drivers to determine what
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settings were chosen, and to configure what settings are allowed.
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While these devices are distinct from the network devices, and conform to a
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standard layout for the registers, it has been common practice to integrate
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the PHY management code with the network driver. This has resulted in large
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amounts of redundant code. Also, on embedded systems with multiple (and
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sometimes quite different) ethernet controllers connected to the same
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management bus, it is difficult to ensure safe use of the bus.
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Since the PHYs are devices, and the management busses through which they are
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accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
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In doing so, it has these goals:
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1) Increase code-reuse
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2) Increase overall code-maintainability
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3) Speed development time for new network drivers, and for new systems
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Basically, this layer is meant to provide an interface to PHY devices which
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allows network driver writers to write as little code as possible, while
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still providing a full feature set.
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The MDIO bus
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Most network devices are connected to a PHY by means of a management bus.
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Different devices use different busses (though some share common interfaces).
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In order to take advantage of the PAL, each bus interface needs to be
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registered as a distinct device.
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1) read and write functions must be implemented. Their prototypes are:
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int write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
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int read(struct mii_bus *bus, int mii_id, int regnum);
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mii_id is the address on the bus for the PHY, and regnum is the register
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number. These functions are guaranteed not to be called from interrupt
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time, so it is safe for them to block, waiting for an interrupt to signal
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the operation is complete
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2) A reset function is necessary. This is used to return the bus to an
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initialized state.
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3) A probe function is needed. This function should set up anything the bus
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driver needs, setup the mii_bus structure, and register with the PAL using
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mdiobus_register. Similarly, there's a remove function to undo all of
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that (use mdiobus_unregister).
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4) Like any driver, the device_driver structure must be configured, and init
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exit functions are used to register the driver.
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5) The bus must also be declared somewhere as a device, and registered.
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As an example for how one driver implemented an mdio bus driver, see
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drivers/net/gianfar_mii.c and arch/ppc/syslib/mpc85xx_devices.c
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Connecting to a PHY
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Sometime during startup, the network driver needs to establish a connection
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between the PHY device, and the network device. At this time, the PHY's bus
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and drivers need to all have been loaded, so it is ready for the connection.
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At this point, there are several ways to connect to the PHY:
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1) The PAL handles everything, and only calls the network driver when
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the link state changes, so it can react.
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2) The PAL handles everything except interrupts (usually because the
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controller has the interrupt registers).
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3) The PAL handles everything, but checks in with the driver every second,
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allowing the network driver to react first to any changes before the PAL
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does.
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4) The PAL serves only as a library of functions, with the network device
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manually calling functions to update status, and configure the PHY
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Letting the PHY Abstraction Layer do Everything
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If you choose option 1 (The hope is that every driver can, but to still be
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useful to drivers that can't), connecting to the PHY is simple:
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First, you need a function to react to changes in the link state. This
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function follows this protocol:
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static void adjust_link(struct net_device *dev);
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Next, you need to know the device name of the PHY connected to this device.
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The name will look something like, "phy0:0", where the first number is the
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2006-12-02 02:01:06 +08:00
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bus id, and the second is the PHY's address on that bus. Typically,
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the bus is responsible for making its ID unique.
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2005-07-31 07:31:23 +08:00
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Now, to connect, just call this function:
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2006-12-02 02:01:06 +08:00
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phydev = phy_connect(dev, phy_name, &adjust_link, flags, interface);
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2005-07-31 07:31:23 +08:00
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phydev is a pointer to the phy_device structure which represents the PHY. If
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phy_connect is successful, it will return the pointer. dev, here, is the
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pointer to your net_device. Once done, this function will have started the
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PHY's software state machine, and registered for the PHY's interrupt, if it
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has one. The phydev structure will be populated with information about the
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current state, though the PHY will not yet be truly operational at this
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point.
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flags is a u32 which can optionally contain phy-specific flags.
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This is useful if the system has put hardware restrictions on
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the PHY/controller, of which the PHY needs to be aware.
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2006-12-02 02:01:06 +08:00
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interface is a u32 which specifies the connection type used
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between the controller and the PHY. Examples are GMII, MII,
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RGMII, and SGMII. For a full list, see include/linux/phy.h
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2005-07-31 07:31:23 +08:00
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Now just make sure that phydev->supported and phydev->advertising have any
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values pruned from them which don't make sense for your controller (a 10/100
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controller may be connected to a gigabit capable PHY, so you would need to
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mask off SUPPORTED_1000baseT*). See include/linux/ethtool.h for definitions
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for these bitfields. Note that you should not SET any bits, or the PHY may
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get put into an unsupported state.
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Lastly, once the controller is ready to handle network traffic, you call
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phy_start(phydev). This tells the PAL that you are ready, and configures the
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PHY to connect to the network. If you want to handle your own interrupts,
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just set phydev->irq to PHY_IGNORE_INTERRUPT before you call phy_start.
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Similarly, if you don't want to use interrupts, set phydev->irq to PHY_POLL.
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When you want to disconnect from the network (even if just briefly), you call
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phy_stop(phydev).
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Keeping Close Tabs on the PAL
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It is possible that the PAL's built-in state machine needs a little help to
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keep your network device and the PHY properly in sync. If so, you can
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register a helper function when connecting to the PHY, which will be called
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every second before the state machine reacts to any changes. To do this, you
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need to manually call phy_attach() and phy_prepare_link(), and then call
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phy_start_machine() with the second argument set to point to your special
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handler.
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Currently there are no examples of how to use this functionality, and testing
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on it has been limited because the author does not have any drivers which use
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it (they all use option 1). So Caveat Emptor.
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Doing it all yourself
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There's a remote chance that the PAL's built-in state machine cannot track
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the complex interactions between the PHY and your network device. If this is
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so, you can simply call phy_attach(), and not call phy_start_machine or
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phy_prepare_link(). This will mean that phydev->state is entirely yours to
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handle (phy_start and phy_stop toggle between some of the states, so you
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might need to avoid them).
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An effort has been made to make sure that useful functionality can be
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accessed without the state-machine running, and most of these functions are
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descended from functions which did not interact with a complex state-machine.
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However, again, no effort has been made so far to test running without the
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state machine, so tryer beware.
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Here is a brief rundown of the functions:
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int phy_read(struct phy_device *phydev, u16 regnum);
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int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
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Simple read/write primitives. They invoke the bus's read/write function
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pointers.
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void phy_print_status(struct phy_device *phydev);
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A convenience function to print out the PHY status neatly.
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int phy_clear_interrupt(struct phy_device *phydev);
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int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
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Clear the PHY's interrupt, and configure which ones are allowed,
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respectively. Currently only supports all on, or all off.
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int phy_enable_interrupts(struct phy_device *phydev);
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int phy_disable_interrupts(struct phy_device *phydev);
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Functions which enable/disable PHY interrupts, clearing them
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before and after, respectively.
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int phy_start_interrupts(struct phy_device *phydev);
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int phy_stop_interrupts(struct phy_device *phydev);
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Requests the IRQ for the PHY interrupts, then enables them for
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start, or disables then frees them for stop.
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struct phy_device * phy_attach(struct net_device *dev, const char *phy_id,
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u32 flags, phy_interface_t interface);
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Attaches a network device to a particular PHY, binding the PHY to a generic
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driver if none was found during bus initialization. Passes in
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any phy-specific flags as needed.
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int phy_start_aneg(struct phy_device *phydev);
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Using variables inside the phydev structure, either configures advertising
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and resets autonegotiation, or disables autonegotiation, and configures
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forced settings.
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static inline int phy_read_status(struct phy_device *phydev);
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Fills the phydev structure with up-to-date information about the current
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settings in the PHY.
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void phy_sanitize_settings(struct phy_device *phydev)
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Resolves differences between currently desired settings, and
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supported settings for the given PHY device. Does not make
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the changes in the hardware, though.
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int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
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int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
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Ethtool convenience functions.
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int phy_mii_ioctl(struct phy_device *phydev,
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struct mii_ioctl_data *mii_data, int cmd);
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The MII ioctl. Note that this function will completely screw up the state
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machine if you write registers like BMCR, BMSR, ADVERTISE, etc. Best to
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use this only to write registers which are not standard, and don't set off
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a renegotiation.
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PHY Device Drivers
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With the PHY Abstraction Layer, adding support for new PHYs is
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quite easy. In some cases, no work is required at all! However,
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many PHYs require a little hand-holding to get up-and-running.
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Generic PHY driver
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If the desired PHY doesn't have any errata, quirks, or special
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features you want to support, then it may be best to not add
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support, and let the PHY Abstraction Layer's Generic PHY Driver
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do all of the work.
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Writing a PHY driver
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If you do need to write a PHY driver, the first thing to do is
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make sure it can be matched with an appropriate PHY device.
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This is done during bus initialization by reading the device's
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UID (stored in registers 2 and 3), then comparing it to each
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driver's phy_id field by ANDing it with each driver's
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phy_id_mask field. Also, it needs a name. Here's an example:
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static struct phy_driver dm9161_driver = {
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.phy_id = 0x0181b880,
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.name = "Davicom DM9161E",
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.phy_id_mask = 0x0ffffff0,
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...
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}
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Next, you need to specify what features (speed, duplex, autoneg,
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etc) your PHY device and driver support. Most PHYs support
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PHY_BASIC_FEATURES, but you can look in include/mii.h for other
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features.
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Each driver consists of a number of function pointers:
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config_init: configures PHY into a sane state after a reset.
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For instance, a Davicom PHY requires descrambling disabled.
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probe: Does any setup needed by the driver
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suspend/resume: power management
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config_aneg: Changes the speed/duplex/negotiation settings
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read_status: Reads the current speed/duplex/negotiation settings
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ack_interrupt: Clear a pending interrupt
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config_intr: Enable or disable interrupts
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remove: Does any driver take-down
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Of these, only config_aneg and read_status are required to be
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assigned by the driver code. The rest are optional. Also, it is
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preferred to use the generic phy driver's versions of these two
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functions if at all possible: genphy_read_status and
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genphy_config_aneg. If this is not possible, it is likely that
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you only need to perform some actions before and after invoking
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these functions, and so your functions will wrap the generic
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ones.
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Feel free to look at the Marvell, Cicada, and Davicom drivers in
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drivers/net/phy/ for examples (the lxt and qsemi drivers have
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not been tested as of this writing)
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