OpenCloudOS-Kernel/drivers/net/ethernet/intel/ice/ice_hw_autogen.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2018, Intel Corporation. */

/* Machine-generated file */

#ifndef _ICE_HW_AUTOGEN_H_
#define _ICE_HW_AUTOGEN_H_

#define PF_FW_ARQBAH			0x00080180
#define PF_FW_ARQBAL			0x00080080
#define PF_FW_ARQH			0x00080380
#define PF_FW_ARQH_ARQH_S		0
#define PF_FW_ARQH_ARQH_M		ICE_M(0x3FF, PF_FW_ARQH_ARQH_S)
#define PF_FW_ARQLEN			0x00080280
#define PF_FW_ARQLEN_ARQLEN_S		0
#define PF_FW_ARQLEN_ARQLEN_M		ICE_M(0x3FF, PF_FW_ARQLEN_ARQLEN_S)
#define PF_FW_ARQLEN_ARQENABLE_S	31
#define PF_FW_ARQLEN_ARQENABLE_M	BIT(PF_FW_ARQLEN_ARQENABLE_S)
#define PF_FW_ARQT			0x00080480
#define PF_FW_ATQBAH			0x00080100
#define PF_FW_ATQBAL			0x00080000
#define PF_FW_ATQH			0x00080300
#define PF_FW_ATQH_ATQH_S		0
#define PF_FW_ATQH_ATQH_M		ICE_M(0x3FF, PF_FW_ATQH_ATQH_S)
#define PF_FW_ATQLEN			0x00080200
#define PF_FW_ATQLEN_ATQLEN_S		0
#define PF_FW_ATQLEN_ATQLEN_M		ICE_M(0x3FF, PF_FW_ATQLEN_ATQLEN_S)
#define PF_FW_ATQLEN_ATQENABLE_S	31
#define PF_FW_ATQLEN_ATQENABLE_M	BIT(PF_FW_ATQLEN_ATQENABLE_S)
#define PF_FW_ATQT			0x00080400
#define GLGEN_RSTAT			0x000B8188
#define GLGEN_RSTAT_DEVSTATE_S		0
#define GLGEN_RSTAT_DEVSTATE_M		ICE_M(0x3, GLGEN_RSTAT_DEVSTATE_S)
#define GLGEN_RSTCTL			0x000B8180
#define GLGEN_RSTCTL_GRSTDEL_S		0
#define GLGEN_RSTCTL_GRSTDEL_M		ICE_M(0x3F, GLGEN_RSTCTL_GRSTDEL_S)
#define GLGEN_RTRIG			0x000B8190
#define GLGEN_RTRIG_CORER_S		0
#define GLGEN_RTRIG_CORER_M		BIT(GLGEN_RTRIG_CORER_S)
#define GLGEN_RTRIG_GLOBR_S		1
#define GLGEN_RTRIG_GLOBR_M		BIT(GLGEN_RTRIG_GLOBR_S)
#define GLGEN_STAT			0x000B612C
#define PFGEN_CTRL			0x00091000
#define PFGEN_CTRL_PFSWR_S		0
#define PFGEN_CTRL_PFSWR_M		BIT(PFGEN_CTRL_PFSWR_S)
#define GLLAN_RCTL_0			0x002941F8
#define GLNVM_FLA			0x000B6108
#define GLNVM_FLA_LOCKED_S		6
#define GLNVM_FLA_LOCKED_M		BIT(GLNVM_FLA_LOCKED_S)
#define GLNVM_GENS			0x000B6100
#define GLNVM_GENS_SR_SIZE_S		5
#define GLNVM_GENS_SR_SIZE_M		ICE_M(0x7, GLNVM_GENS_SR_SIZE_S)
#define GLNVM_ULD			0x000B6008
#define GLNVM_ULD_CORER_DONE_S		3
#define GLNVM_ULD_CORER_DONE_M		BIT(GLNVM_ULD_CORER_DONE_S)
#define GLNVM_ULD_GLOBR_DONE_S		4
#define GLNVM_ULD_GLOBR_DONE_M		BIT(GLNVM_ULD_GLOBR_DONE_S)
#define PF_FUNC_RID			0x0009E880
#define PF_FUNC_RID_FUNC_NUM_S		0
#define PF_FUNC_RID_FUNC_NUM_M		ICE_M(0x7, PF_FUNC_RID_FUNC_NUM_S)

#endif /* _ICE_HW_AUTOGEN_H_ */