2019-05-19 20:07:45 +08:00
|
|
|
# SPDX-License-Identifier: GPL-2.0-only
|
2017-07-11 09:08:08 +08:00
|
|
|
#
|
|
|
|
# For a description of the syntax of this configuration file,
|
2019-06-13 01:52:48 +08:00
|
|
|
# see Documentation/kbuild/kconfig-language.rst.
|
2017-07-11 09:08:08 +08:00
|
|
|
#
|
|
|
|
|
2018-04-27 14:38:23 +08:00
|
|
|
config 64BIT
|
|
|
|
bool
|
|
|
|
|
|
|
|
config 32BIT
|
|
|
|
bool
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config RISCV
|
|
|
|
def_bool y
|
2020-06-09 22:14:48 +08:00
|
|
|
select ARCH_CLOCKSOURCE_INIT
|
2021-08-10 21:51:05 +08:00
|
|
|
select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
|
2019-06-13 15:09:03 +08:00
|
|
|
select ARCH_HAS_BINFMT_FLAT
|
2020-07-15 05:26:11 +08:00
|
|
|
select ARCH_HAS_DEBUG_VM_PGTABLE
|
2020-06-05 04:55:14 +08:00
|
|
|
select ARCH_HAS_DEBUG_VIRTUAL if MMU
|
2020-06-04 07:03:55 +08:00
|
|
|
select ARCH_HAS_DEBUG_WX
|
2021-02-25 15:03:03 +08:00
|
|
|
select ARCH_HAS_FORTIFY_SOURCE
|
2020-06-05 04:55:14 +08:00
|
|
|
select ARCH_HAS_GCOV_PROFILE_ALL
|
|
|
|
select ARCH_HAS_GIGANTIC_PAGE
|
2020-06-26 20:40:56 +08:00
|
|
|
select ARCH_HAS_KCOV
|
2020-06-05 04:55:14 +08:00
|
|
|
select ARCH_HAS_MMIOWB
|
|
|
|
select ARCH_HAS_PTE_SPECIAL
|
2021-07-08 09:07:54 +08:00
|
|
|
select ARCH_HAS_SET_DIRECT_MAP if MMU
|
|
|
|
select ARCH_HAS_SET_MEMORY if MMU
|
2021-04-13 14:35:14 +08:00
|
|
|
select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
|
|
|
|
select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL
|
2021-03-07 10:24:46 +08:00
|
|
|
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
2021-08-05 00:30:59 +08:00
|
|
|
select ARCH_HAS_UBSAN_SANITIZE_ALL
|
2020-06-23 13:36:59 +08:00
|
|
|
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
|
|
|
|
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
|
2021-08-05 00:29:08 +08:00
|
|
|
select ARCH_STACKWALK
|
|
|
|
select ARCH_SUPPORTS_ATOMIC_RMW
|
|
|
|
select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU
|
2021-05-05 09:38:13 +08:00
|
|
|
select ARCH_SUPPORTS_HUGETLBFS if MMU
|
2021-05-07 17:47:15 +08:00
|
|
|
select ARCH_USE_MEMTEST
|
2020-06-05 04:55:14 +08:00
|
|
|
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
|
2017-07-11 09:08:08 +08:00
|
|
|
select ARCH_WANT_FRAME_POINTERS
|
2020-06-05 04:55:14 +08:00
|
|
|
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
|
2021-04-17 09:10:09 +08:00
|
|
|
select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
|
2021-08-26 22:10:29 +08:00
|
|
|
select BUILDTIME_TABLE_SORT if MMU
|
2017-07-11 09:08:08 +08:00
|
|
|
select CLONE_BACKWARDS
|
2020-09-15 00:56:30 +08:00
|
|
|
select CLINT_TIMER if !MMU
|
2017-07-11 09:08:08 +08:00
|
|
|
select COMMON_CLK
|
2020-06-05 04:55:14 +08:00
|
|
|
select EDAC_SUPPORT
|
|
|
|
select GENERIC_ARCH_TOPOLOGY if SMP
|
|
|
|
select GENERIC_ATOMIC64 if !64BIT
|
2021-03-07 10:24:46 +08:00
|
|
|
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
|
2020-09-18 06:37:11 +08:00
|
|
|
select GENERIC_EARLY_IOREMAP
|
2020-06-09 22:14:48 +08:00
|
|
|
select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
|
2021-07-08 09:59:48 +08:00
|
|
|
select GENERIC_IDLE_POLL_SETUP
|
2021-09-08 10:55:58 +08:00
|
|
|
select GENERIC_IOREMAP if MMU
|
2020-06-05 04:55:14 +08:00
|
|
|
select GENERIC_IRQ_MULTI_HANDLER
|
2017-07-11 09:08:08 +08:00
|
|
|
select GENERIC_IRQ_SHOW
|
2021-07-08 09:59:49 +08:00
|
|
|
select GENERIC_IRQ_SHOW_LEVEL
|
2020-07-10 02:51:17 +08:00
|
|
|
select GENERIC_LIB_DEVMEM_IS_ALLOWED
|
2017-07-11 09:08:08 +08:00
|
|
|
select GENERIC_PCI_IOMAP
|
2020-06-05 04:55:14 +08:00
|
|
|
select GENERIC_PTDUMP if MMU
|
2018-12-04 18:29:51 +08:00
|
|
|
select GENERIC_SCHED_CLOCK
|
2020-06-05 04:55:14 +08:00
|
|
|
select GENERIC_SMP_IDLE_THREAD
|
2020-06-09 22:14:48 +08:00
|
|
|
select GENERIC_TIME_VSYSCALL if MMU && 64BIT
|
2021-09-01 11:20:25 +08:00
|
|
|
select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
|
2018-10-29 18:48:53 +08:00
|
|
|
select HAVE_ARCH_AUDITSYSCALL
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
|
|
|
|
select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_ARCH_KASAN if MMU && 64BIT
|
2021-01-16 13:58:35 +08:00
|
|
|
select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
|
2021-06-15 11:07:34 +08:00
|
|
|
select HAVE_ARCH_KFENCE if MMU && 64BIT
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_ARCH_KGDB if !XIP_KERNEL
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_ARCH_KGDB_QXFER_PKT
|
|
|
|
select HAVE_ARCH_MMAP_RND_BITS if MMU
|
2019-10-05 08:12:22 +08:00
|
|
|
select HAVE_ARCH_SECCOMP_FILTER
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_ARCH_TRACEHOOK
|
2021-07-10 01:36:29 +08:00
|
|
|
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
|
2021-07-02 12:54:21 +08:00
|
|
|
select HAVE_ARCH_THREAD_STRUCT_WHITELIST
|
riscv: add VMAP_STACK overflow detection
This patch adds stack overflow detection to riscv, usable when
CONFIG_VMAP_STACK=y.
Overflow is detected in kernel exception entry(kernel/entry.S), if the
kernel stack is overflow and been detected, the overflow handler is
invoked on a per-cpu overflow stack. This approach preserves GPRs and
the original exception information.
The overflow detect is performed before any attempt is made to access
the stack and the principle of stack overflow detection: kernel stacks
are aligned to double their size, enabling overflow to be detected with
a single bit test. For example, a 16K stack is aligned to 32K, ensuring
that bit 14 of the SP must be zero. On an overflow (or underflow), this
bit is flipped. Thus, overflow (of less than the size of the stack) can
be detected by testing whether this bit is set.
This gives us a useful error message on stack overflow, as can be
trigger with the LKDTM overflow test:
[ 388.053267] lkdtm: Performing direct entry EXHAUST_STACK
[ 388.053663] lkdtm: Calling function with 1024 frame size to depth 32 ...
[ 388.054016] lkdtm: loop 32/32 ...
[ 388.054186] lkdtm: loop 31/32 ...
[ 388.054491] lkdtm: loop 30/32 ...
[ 388.054672] lkdtm: loop 29/32 ...
[ 388.054859] lkdtm: loop 28/32 ...
[ 388.055010] lkdtm: loop 27/32 ...
[ 388.055163] lkdtm: loop 26/32 ...
[ 388.055309] lkdtm: loop 25/32 ...
[ 388.055481] lkdtm: loop 24/32 ...
[ 388.055653] lkdtm: loop 23/32 ...
[ 388.055837] lkdtm: loop 22/32 ...
[ 388.056015] lkdtm: loop 21/32 ...
[ 388.056188] lkdtm: loop 20/32 ...
[ 388.058145] Insufficient stack space to handle exception!
[ 388.058153] Task stack: [0xffffffd014260000..0xffffffd014264000]
[ 388.058160] Overflow stack: [0xffffffe1f8d2c220..0xffffffe1f8d2d220]
[ 388.058168] CPU: 0 PID: 89 Comm: bash Not tainted 5.12.0-rc8-dirty #90
[ 388.058175] Hardware name: riscv-virtio,qemu (DT)
[ 388.058187] epc : number+0x32/0x2c0
[ 388.058247] ra : vsnprintf+0x2ae/0x3f0
[ 388.058255] epc : ffffffe0002d38f6 ra : ffffffe0002d814e sp : ffffffd01425ffc0
[ 388.058263] gp : ffffffe0012e4010 tp : ffffffe08014da00 t0 : ffffffd0142606e8
[ 388.058271] t1 : 0000000000000000 t2 : 0000000000000000 s0 : ffffffd014260070
[ 388.058303] s1 : ffffffd014260158 a0 : ffffffd01426015e a1 : ffffffd014260158
[ 388.058311] a2 : 0000000000000013 a3 : ffff0a01ffffff10 a4 : ffffffe000c398e0
[ 388.058319] a5 : 511b02ec65f3e300 a6 : 0000000000a1749a a7 : 0000000000000000
[ 388.058327] s2 : ffffffff000000ff s3 : 00000000ffff0a01 s4 : ffffffe0012e50a8
[ 388.058335] s5 : 0000000000ffff0a s6 : ffffffe0012e50a8 s7 : ffffffe000da1cc0
[ 388.058343] s8 : ffffffffffffffff s9 : ffffffd0142602b0 s10: ffffffd0142602a8
[ 388.058351] s11: ffffffd01426015e t3 : 00000000000f0000 t4 : ffffffffffffffff
[ 388.058359] t5 : 000000000000002f t6 : ffffffd014260158
[ 388.058366] status: 0000000000000100 badaddr: ffffffd01425fff8 cause: 000000000000000f
[ 388.058374] Kernel panic - not syncing: Kernel stack overflow
[ 388.058381] CPU: 0 PID: 89 Comm: bash Not tainted 5.12.0-rc8-dirty #90
[ 388.058387] Hardware name: riscv-virtio,qemu (DT)
[ 388.058393] Call Trace:
[ 388.058400] [<ffffffe000004944>] walk_stackframe+0x0/0xce
[ 388.058406] [<ffffffe0006f0b28>] dump_backtrace+0x38/0x46
[ 388.058412] [<ffffffe0006f0b46>] show_stack+0x10/0x18
[ 388.058418] [<ffffffe0006f3690>] dump_stack+0x74/0x8e
[ 388.058424] [<ffffffe0006f0d52>] panic+0xfc/0x2b2
[ 388.058430] [<ffffffe0006f0acc>] print_trace_address+0x0/0x24
[ 388.058436] [<ffffffe0002d814e>] vsnprintf+0x2ae/0x3f0
[ 388.058956] SMP: stopping secondary CPUs
Signed-off-by: Tong Tiangen <tongtiangen@huawei.com>
Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-06-21 11:28:55 +08:00
|
|
|
select HAVE_ARCH_VMAP_STACK if MMU && 64BIT
|
2019-08-19 13:54:20 +08:00
|
|
|
select HAVE_ASM_MODVERSIONS
|
2020-06-24 17:03:16 +08:00
|
|
|
select HAVE_CONTEXT_TRACKING
|
2020-06-27 18:50:50 +08:00
|
|
|
select HAVE_DEBUG_KMEMLEAK
|
2019-10-28 20:10:41 +08:00
|
|
|
select HAVE_DMA_CONTIGUOUS if MMU
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_EBPF_JIT if MMU
|
2020-12-18 00:01:45 +08:00
|
|
|
select HAVE_FUNCTION_ERROR_INJECTION
|
RISC-V: Add futex support.
Here is an attempt to add the missing futex support. I started with the MIPS
version of futex.h and modified it until I got it working. I tested it on
a HiFive Unleashed running Fedora Core 29 using the fc29 4.15 version of the
kernel. This was tested against the glibc testsuite, where it fixes 14 nptl
related testsuite failures. That unfortunately only tests the cmpxchg support,
so I also used the testcase at the end of
https://lwn.net/Articles/148830/
which tests the atomic_op functionality, except that it doesn't verify that
the operations are atomic, which they obviously are. This testcase runs
successfully with the patch and fails without it.
I'm not a kernel expert, so there could be details I got wrong here. I wasn't
sure about the memory model support, so I used aqrl which seemed safest, and
didn't add fences which seemed unnecessary. I'm not sure about the copyright
statements, I left in Ralf Baechle's line because I started with his code.
Checkpatch reports some style problems, but it is the same style as the MIPS
futex.h, and the uses of ENOSYS appear correct even though it complains about
them. I don't know if any of that matters.
This patch was tested on qemu with the glibc nptl/tst-cond-except
testcase, and the wake_op testcase from above.
Signed-off-by: Jim Wilson <jimw@sifive.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-10-17 05:42:59 +08:00
|
|
|
select HAVE_FUTEX_CMPXCHG if FUTEX
|
2020-06-26 20:40:56 +08:00
|
|
|
select HAVE_GCC_PLUGINS
|
2020-06-09 22:14:48 +08:00
|
|
|
select HAVE_GENERIC_VDSO if MMU && 64BIT
|
2020-10-28 12:28:42 +08:00
|
|
|
select HAVE_IRQ_TIME_ACCOUNTING
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_KPROBES if !XIP_KERNEL
|
|
|
|
select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL
|
|
|
|
select HAVE_KRETPROBES if !XIP_KERNEL
|
2021-04-17 00:37:22 +08:00
|
|
|
select HAVE_MOVE_PMD
|
|
|
|
select HAVE_MOVE_PUD
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_PCI
|
2018-04-20 07:27:49 +08:00
|
|
|
select HAVE_PERF_EVENTS
|
2019-09-05 11:46:35 +08:00
|
|
|
select HAVE_PERF_REGS
|
|
|
|
select HAVE_PERF_USER_STACK_DUMP
|
2020-12-18 00:01:37 +08:00
|
|
|
select HAVE_REGS_AND_STACK_ACCESS_API
|
2021-06-20 20:01:51 +08:00
|
|
|
select HAVE_FUNCTION_ARG_ACCESS_API
|
2020-07-11 00:19:57 +08:00
|
|
|
select HAVE_STACKPROTECTOR
|
2018-12-06 23:26:35 +08:00
|
|
|
select HAVE_SYSCALL_TRACEPOINTS
|
2017-07-11 09:08:08 +08:00
|
|
|
select IRQ_DOMAIN
|
2021-07-08 09:59:47 +08:00
|
|
|
select IRQ_FORCED_THREADING
|
2017-07-11 09:08:08 +08:00
|
|
|
select MODULES_USE_ELF_RELA if MODULES
|
RISC-V: Support MODULE_SECTIONS mechanism on RV32
This patch supports dynamic generate got and plt sections mechanism on
rv32. It contains the modification as follows:
- Always enable MODULE_SECTIONS (both rv64 and rv32)
- Change the fixed size type.
This patch had been tested by following modules:
btrfs 6795991 0 - Live 0xa544b000
test_static_keys 17304 0 - Live 0xa28be000
zstd_compress 1198986 1 btrfs, Live 0xa2a25000
zstd_decompress 608112 1 btrfs, Live 0xa24e7000
lzo 8787 0 - Live 0xa2049000
xor 27461 1 btrfs, Live 0xa2041000
zram 78849 0 - Live 0xa2276000
netdevsim 55909 0 - Live 0xa202d000
tun 211534 0 - Live 0xa21b5000
fuse 566049 0 - Live 0xa25fb000
nfs_layout_flexfiles 192597 0 - Live 0xa229b000
ramoops 74895 0 - Live 0xa2019000
xfs 3973221 0 - Live 0xa507f000
libcrc32c 3053 2 btrfs,xfs, Live 0xa34af000
lzo_compress 17302 2 btrfs,lzo, Live 0xa347d000
lzo_decompress 7178 2 btrfs,lzo, Live 0xa3451000
raid6_pq 142086 1 btrfs, Live 0xa33a4000
reed_solomon 31022 1 ramoops, Live 0xa31eb000
test_bitmap 3734 0 - Live 0xa31af000
test_bpf 1588736 0 - Live 0xa2c11000
test_kmod 41161 0 - Live 0xa29f8000
test_module 1356 0 - Live 0xa299e000
test_printf 6024 0 [permanent], Live 0xa2971000
test_static_key_base 5797 1 test_static_keys, Live 0xa2931000
test_user_copy 4382 0 - Live 0xa28c9000
xxhash 70501 2 zstd_compress,zstd_decompress, Live 0xa2055000
Signed-off-by: Zong Li <zong@andestech.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-12-07 17:02:16 +08:00
|
|
|
select MODULE_SECTIONS if MODULES
|
2020-06-05 04:55:14 +08:00
|
|
|
select OF
|
|
|
|
select OF_EARLY_FLATTREE
|
|
|
|
select OF_IRQ
|
2018-11-16 03:05:33 +08:00
|
|
|
select PCI_DOMAINS_GENERIC if PCI
|
2018-11-16 03:05:32 +08:00
|
|
|
select PCI_MSI if PCI
|
2020-06-01 17:15:43 +08:00
|
|
|
select RISCV_INTC
|
2020-08-17 20:42:50 +08:00
|
|
|
select RISCV_TIMER if RISCV_SBI
|
2020-06-05 04:55:14 +08:00
|
|
|
select SPARSE_IRQ
|
|
|
|
select SYSCTL_EXCEPTION_TRACE
|
|
|
|
select THREAD_INFO_IN_TASK
|
2021-07-31 13:22:32 +08:00
|
|
|
select TRACE_IRQFLAGS_SUPPORT
|
2020-09-07 13:58:22 +08:00
|
|
|
select UACCESS_MEMCPY if !MMU
|
2021-07-01 09:52:20 +08:00
|
|
|
select ZONE_DMA32 if 64BIT
|
2019-09-24 06:39:21 +08:00
|
|
|
|
|
|
|
config ARCH_MMAP_RND_BITS_MIN
|
|
|
|
default 18 if 64BIT
|
|
|
|
default 8
|
|
|
|
|
|
|
|
# max bits determined by the following formula:
|
|
|
|
# VA_BITS - PAGE_SHIFT - 3
|
|
|
|
config ARCH_MMAP_RND_BITS_MAX
|
|
|
|
default 24 if 64BIT # SV39 based
|
|
|
|
default 17
|
2017-07-11 09:08:08 +08:00
|
|
|
|
2019-10-28 20:10:32 +08:00
|
|
|
# set if we run in machine mode, cleared if we run in supervisor mode
|
|
|
|
config RISCV_M_MODE
|
|
|
|
bool
|
2019-10-28 20:10:41 +08:00
|
|
|
default !MMU
|
2019-10-28 20:10:32 +08:00
|
|
|
|
2019-10-28 20:10:33 +08:00
|
|
|
# set if we are running in S-mode and can use SBI calls
|
|
|
|
config RISCV_SBI
|
|
|
|
bool
|
|
|
|
depends on !RISCV_M_MODE
|
|
|
|
default y
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config MMU
|
2019-10-28 20:10:41 +08:00
|
|
|
bool "MMU-based Paged Memory Management Support"
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Select if you want MMU-based virtualised addressing space
|
|
|
|
support by paged memory management. If unsure, say 'Y'.
|
2017-07-11 09:08:08 +08:00
|
|
|
|
2019-08-29 05:40:54 +08:00
|
|
|
config VA_BITS
|
|
|
|
int
|
|
|
|
default 32 if 32BIT
|
|
|
|
default 39 if 64BIT
|
|
|
|
|
|
|
|
config PA_BITS
|
|
|
|
int
|
|
|
|
default 34 if 32BIT
|
|
|
|
default 56 if 64BIT
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config PAGE_OFFSET
|
|
|
|
hex
|
2022-01-17 17:57:16 +08:00
|
|
|
default 0xC0000000 if 32BIT
|
2019-10-28 20:10:41 +08:00
|
|
|
default 0x80000000 if 64BIT && !MMU
|
2022-01-17 17:57:16 +08:00
|
|
|
default 0xffffffe000000000 if 64BIT
|
2017-07-11 09:08:08 +08:00
|
|
|
|
2021-10-29 12:59:27 +08:00
|
|
|
config KASAN_SHADOW_OFFSET
|
|
|
|
hex
|
|
|
|
depends on KASAN_GENERIC
|
|
|
|
default 0xdfffffc800000000 if 64BIT
|
|
|
|
default 0xffffffff if 32BIT
|
|
|
|
|
2019-08-29 05:40:54 +08:00
|
|
|
config ARCH_FLATMEM_ENABLE
|
2020-11-19 08:38:29 +08:00
|
|
|
def_bool !NUMA
|
2019-08-29 05:40:54 +08:00
|
|
|
|
|
|
|
config ARCH_SPARSEMEM_ENABLE
|
|
|
|
def_bool y
|
2020-02-12 18:34:24 +08:00
|
|
|
depends on MMU
|
2021-03-29 11:13:07 +08:00
|
|
|
select SPARSEMEM_STATIC if 32BIT && SPARSEMEM
|
2021-03-15 20:03:07 +08:00
|
|
|
select SPARSEMEM_VMEMMAP_ENABLE if 64BIT
|
2019-08-29 05:40:54 +08:00
|
|
|
|
|
|
|
config ARCH_SELECT_MEMORY_MODEL
|
|
|
|
def_bool ARCH_SPARSEMEM_ENABLE
|
|
|
|
|
2019-05-26 20:50:38 +08:00
|
|
|
config ARCH_WANT_GENERAL_HUGETLB
|
|
|
|
def_bool y
|
|
|
|
|
2020-12-18 00:01:44 +08:00
|
|
|
config ARCH_SUPPORTS_UPROBES
|
|
|
|
def_bool y
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config STACKTRACE_SUPPORT
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
config GENERIC_BUG
|
|
|
|
def_bool y
|
|
|
|
depends on BUG
|
|
|
|
select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
|
|
|
|
|
|
|
|
config GENERIC_BUG_RELATIVE_POINTERS
|
|
|
|
bool
|
|
|
|
|
|
|
|
config GENERIC_CALIBRATE_DELAY
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
config GENERIC_CSUM
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
config GENERIC_HWEIGHT
|
|
|
|
def_bool y
|
|
|
|
|
2019-01-07 23:27:01 +08:00
|
|
|
config FIX_EARLYCON_MEM
|
2019-12-17 19:15:16 +08:00
|
|
|
def_bool MMU
|
2019-01-07 23:27:01 +08:00
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config PGTABLE_LEVELS
|
|
|
|
int
|
|
|
|
default 3 if 64BIT
|
|
|
|
default 2
|
|
|
|
|
2020-06-27 21:57:08 +08:00
|
|
|
config LOCKDEP_SUPPORT
|
|
|
|
def_bool y
|
|
|
|
|
2019-06-18 03:29:48 +08:00
|
|
|
source "arch/riscv/Kconfig.socs"
|
riscv: Introduce alternative mechanism to apply errata solution
Introduce the "alternative" mechanism from ARM64 and x86 to apply the CPU
vendors' errata solution at runtime. The main purpose of this patch is
to provide a framework. Therefore, the implementation is quite basic for
now so that some scenarios could not use this schemei, such as patching
code to a module, relocating the patching code and heterogeneous CPU
topology.
Users could use the macro ALTERNATIVE to apply an errata to the existing
code flow. In the macro ALTERNATIVE, users need to specify the manufacturer
information(vendorid, archid, and impid) for this errata. Therefore, kernel
will know this errata is suitable for which CPU core. During the booting
procedure, kernel will select the errata required by the CPU core and then
patch it. It means that the kernel only applies the errata to the specified
CPU core. In this case, the vendor's errata does not affect each other at
runtime. The above patching procedure only occurs during the booting phase,
so we only take the overhead of the "alternative" mechanism once.
This "alternative" mechanism is enabled by default to ensure that all
required errata will be applied. However, users can disable this feature by
the Kconfig "CONFIG_RISCV_ERRATA_ALTERNATIVE".
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-03-22 22:26:03 +08:00
|
|
|
source "arch/riscv/Kconfig.erratas"
|
2019-06-18 03:29:48 +08:00
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
menu "Platform type"
|
|
|
|
|
|
|
|
choice
|
|
|
|
prompt "Base ISA"
|
|
|
|
default ARCH_RV64I
|
|
|
|
help
|
2019-01-09 03:45:57 +08:00
|
|
|
This selects the base ISA that this kernel will target and must match
|
2017-07-11 09:08:08 +08:00
|
|
|
the target platform.
|
|
|
|
|
|
|
|
config ARCH_RV32I
|
|
|
|
bool "RV32I"
|
|
|
|
select 32BIT
|
2018-04-11 15:50:17 +08:00
|
|
|
select GENERIC_LIB_ASHLDI3
|
|
|
|
select GENERIC_LIB_ASHRDI3
|
|
|
|
select GENERIC_LIB_LSHRDI3
|
2018-06-25 16:49:38 +08:00
|
|
|
select GENERIC_LIB_UCMPDI2
|
2019-10-28 20:10:41 +08:00
|
|
|
select MMU
|
2017-07-11 09:08:08 +08:00
|
|
|
|
|
|
|
config ARCH_RV64I
|
|
|
|
bool "RV64I"
|
|
|
|
select 64BIT
|
2021-09-11 07:40:42 +08:00
|
|
|
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)
|
2019-10-28 20:10:41 +08:00
|
|
|
select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
|
2020-06-05 04:55:14 +08:00
|
|
|
select HAVE_FUNCTION_GRAPH_TRACER
|
2021-05-11 00:28:38 +08:00
|
|
|
select HAVE_FUNCTION_TRACER if !XIP_KERNEL
|
2019-10-28 20:10:41 +08:00
|
|
|
select SWIOTLB if MMU
|
2017-07-11 09:08:08 +08:00
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
# We must be able to map all physical memory into the kernel, but the compiler
|
|
|
|
# is still a bit more efficient when generating code if it's setup in a manner
|
|
|
|
# such that it can only map 2GiB of memory.
|
|
|
|
choice
|
|
|
|
prompt "Kernel Code Model"
|
|
|
|
default CMODEL_MEDLOW if 32BIT
|
|
|
|
default CMODEL_MEDANY if 64BIT
|
|
|
|
|
|
|
|
config CMODEL_MEDLOW
|
|
|
|
bool "medium low code model"
|
|
|
|
config CMODEL_MEDANY
|
|
|
|
bool "medium any code model"
|
|
|
|
endchoice
|
|
|
|
|
2018-03-15 16:50:41 +08:00
|
|
|
config MODULE_SECTIONS
|
|
|
|
bool
|
|
|
|
select HAVE_MOD_ARCH_SPECIFIC
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config SMP
|
|
|
|
bool "Symmetric Multi-Processing"
|
|
|
|
help
|
|
|
|
This enables support for systems with more than one CPU. If
|
|
|
|
you say N here, the kernel will run on single and
|
|
|
|
multiprocessor machines, but will use only one CPU of a
|
|
|
|
multiprocessor machine. If you say Y here, the kernel will run
|
|
|
|
on many, but not all, single processor machines. On a single
|
|
|
|
processor machine, the kernel will run faster if you say N
|
|
|
|
here.
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
|
|
|
|
config NR_CPUS
|
|
|
|
int "Maximum number of CPUs (2-32)"
|
|
|
|
range 2 32
|
|
|
|
depends on SMP
|
|
|
|
default "8"
|
|
|
|
|
2020-03-18 09:11:44 +08:00
|
|
|
config HOTPLUG_CPU
|
|
|
|
bool "Support for hot-pluggable CPUs"
|
|
|
|
depends on SMP
|
|
|
|
select GENERIC_IRQ_MIGRATION
|
|
|
|
help
|
|
|
|
|
|
|
|
Say Y here to experiment with turning CPUs off and on. CPUs
|
|
|
|
can be controlled through /sys/devices/system/cpu.
|
|
|
|
|
|
|
|
Say N if you want to disable CPU hotplug.
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
choice
|
|
|
|
prompt "CPU Tuning"
|
|
|
|
default TUNE_GENERIC
|
|
|
|
|
|
|
|
config TUNE_GENERIC
|
|
|
|
bool "generic"
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
2020-11-19 08:38:29 +08:00
|
|
|
# Common NUMA Features
|
|
|
|
config NUMA
|
|
|
|
bool "NUMA Memory Allocation and Scheduler Support"
|
2021-03-30 21:25:31 +08:00
|
|
|
depends on SMP && MMU
|
2020-11-19 08:38:29 +08:00
|
|
|
select GENERIC_ARCH_NUMA
|
|
|
|
select OF_NUMA
|
|
|
|
select ARCH_SUPPORTS_NUMA_BALANCING
|
|
|
|
help
|
|
|
|
Enable NUMA (Non-Uniform Memory Access) support.
|
|
|
|
|
|
|
|
The kernel will try to allocate memory used by a CPU on the
|
|
|
|
local memory of the CPU and add some more NUMA awareness to the kernel.
|
|
|
|
|
|
|
|
config NODES_SHIFT
|
|
|
|
int "Maximum NUMA Nodes (as a power of 2)"
|
|
|
|
range 1 10
|
|
|
|
default "2"
|
2021-06-29 10:43:01 +08:00
|
|
|
depends on NUMA
|
2020-11-19 08:38:29 +08:00
|
|
|
help
|
|
|
|
Specify the maximum number of NUMA Nodes available on the target
|
|
|
|
system. Increases memory reserved to accommodate various tables.
|
|
|
|
|
|
|
|
config USE_PERCPU_NUMA_NODE_ID
|
|
|
|
def_bool y
|
|
|
|
depends on NUMA
|
|
|
|
|
|
|
|
config NEED_PER_CPU_EMBED_FIRST_CHUNK
|
|
|
|
def_bool y
|
|
|
|
depends on NUMA
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
config RISCV_ISA_C
|
|
|
|
bool "Emit compressed instructions when building Linux"
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Adds "C" to the ISA subsets that the toolchain is allowed to emit
|
|
|
|
when building Linux, which results in compressed instructions in the
|
|
|
|
Linux binary.
|
|
|
|
|
|
|
|
If you don't know what to do here, say Y.
|
|
|
|
|
2018-04-20 07:27:49 +08:00
|
|
|
menu "supported PMU type"
|
|
|
|
depends on PERF_EVENTS
|
|
|
|
|
|
|
|
config RISCV_BASE_PMU
|
|
|
|
bool "Base Performance Monitoring Unit"
|
|
|
|
def_bool y
|
|
|
|
help
|
|
|
|
A base PMU that serves as a reference implementation and has limited
|
|
|
|
feature of perf. It can run on any RISC-V machines so serves as the
|
|
|
|
fallback, but this option can also be disable to reduce kernel size.
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2018-10-09 10:18:33 +08:00
|
|
|
config FPU
|
|
|
|
bool "FPU support"
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Say N here if you want to disable all floating-point related procedure
|
|
|
|
in the kernel.
|
|
|
|
|
|
|
|
If you don't know what to do here, say Y.
|
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
endmenu
|
|
|
|
|
2018-09-20 06:48:15 +08:00
|
|
|
menu "Kernel features"
|
2017-07-11 09:08:08 +08:00
|
|
|
|
|
|
|
source "kernel/Kconfig.hz"
|
|
|
|
|
2020-03-18 09:11:37 +08:00
|
|
|
config RISCV_SBI_V01
|
|
|
|
bool "SBI v0.1 support"
|
|
|
|
default y
|
|
|
|
depends on RISCV_SBI
|
|
|
|
help
|
|
|
|
This config allows kernel to use SBI v0.1 APIs. This will be
|
|
|
|
deprecated in future once legacy M-mode software are no longer in use.
|
2021-04-19 08:55:36 +08:00
|
|
|
|
|
|
|
config KEXEC
|
|
|
|
bool "Kexec system call"
|
|
|
|
select KEXEC_CORE
|
|
|
|
select HOTPLUG_CPU if SMP
|
|
|
|
depends on MMU
|
|
|
|
help
|
|
|
|
kexec is a system call that implements the ability to shutdown your
|
|
|
|
current kernel, and to start another kernel. It is like a reboot
|
|
|
|
but it is independent of the system firmware. And like a reboot
|
|
|
|
you can start any kernel with it, not just Linux.
|
|
|
|
|
|
|
|
The name comes from the similarity to the exec system call.
|
|
|
|
|
2021-04-19 08:55:39 +08:00
|
|
|
config CRASH_DUMP
|
|
|
|
bool "Build kdump crash kernel"
|
|
|
|
help
|
|
|
|
Generate crash dump after being started by kexec. This should
|
|
|
|
be normally only set in special crash dump kernels which are
|
|
|
|
loaded in the main kernel with kexec-tools into a specially
|
|
|
|
reserved region and then later executed after a crash by
|
|
|
|
kdump/kexec.
|
|
|
|
|
|
|
|
For more details see Documentation/admin-guide/kdump/kdump.rst
|
2021-04-19 08:55:36 +08:00
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
endmenu
|
|
|
|
|
2018-09-20 06:48:15 +08:00
|
|
|
menu "Boot options"
|
|
|
|
|
2018-11-18 08:06:56 +08:00
|
|
|
config CMDLINE
|
|
|
|
string "Built-in kernel command line"
|
2018-09-20 06:48:15 +08:00
|
|
|
help
|
2018-11-18 08:06:56 +08:00
|
|
|
For most platforms, the arguments for the kernel's command line
|
|
|
|
are provided at run-time, during boot. However, there are cases
|
|
|
|
where either no arguments are being provided or the provided
|
|
|
|
arguments are insufficient or even invalid.
|
2018-09-20 06:48:15 +08:00
|
|
|
|
2018-11-18 08:06:56 +08:00
|
|
|
When that occurs, it is possible to define a built-in command
|
|
|
|
line here and choose how the kernel should use it later on.
|
2018-09-20 06:48:15 +08:00
|
|
|
|
2018-11-18 08:06:56 +08:00
|
|
|
choice
|
|
|
|
prompt "Built-in command line usage" if CMDLINE != ""
|
|
|
|
default CMDLINE_FALLBACK
|
|
|
|
help
|
|
|
|
Choose how the kernel will handle the provided built-in command
|
|
|
|
line.
|
2018-09-20 06:48:15 +08:00
|
|
|
|
2018-11-18 08:06:56 +08:00
|
|
|
config CMDLINE_FALLBACK
|
|
|
|
bool "Use bootloader kernel arguments if available"
|
2018-09-20 06:48:15 +08:00
|
|
|
help
|
2018-11-18 08:06:56 +08:00
|
|
|
Use the built-in command line as fallback in case we get nothing
|
|
|
|
during boot. This is the default behaviour.
|
|
|
|
|
|
|
|
config CMDLINE_EXTEND
|
|
|
|
bool "Extend bootloader kernel arguments"
|
|
|
|
help
|
|
|
|
The command-line arguments provided during boot will be
|
|
|
|
appended to the built-in command line. This is useful in
|
|
|
|
cases where the provided arguments are insufficient and
|
|
|
|
you don't want to or cannot modify them.
|
|
|
|
|
2018-09-20 06:48:15 +08:00
|
|
|
|
|
|
|
config CMDLINE_FORCE
|
2018-11-18 08:06:56 +08:00
|
|
|
bool "Always use the default kernel command string"
|
2018-09-20 06:48:15 +08:00
|
|
|
help
|
2018-11-18 08:06:56 +08:00
|
|
|
Always use the built-in command line, even if we get one during
|
|
|
|
boot. This is useful in case you need to override the provided
|
|
|
|
command line on systems where you don't have or want control
|
|
|
|
over it.
|
2018-09-20 06:48:15 +08:00
|
|
|
|
2018-11-18 08:06:56 +08:00
|
|
|
endchoice
|
2018-09-20 06:48:15 +08:00
|
|
|
|
2020-09-18 06:37:14 +08:00
|
|
|
config EFI_STUB
|
|
|
|
bool
|
|
|
|
|
|
|
|
config EFI
|
|
|
|
bool "UEFI runtime support"
|
2021-04-13 14:35:14 +08:00
|
|
|
depends on OF && !XIP_KERNEL
|
2020-09-18 06:37:14 +08:00
|
|
|
select LIBFDT
|
|
|
|
select UCS2_STRING
|
|
|
|
select EFI_PARAMS_FROM_FDT
|
|
|
|
select EFI_STUB
|
|
|
|
select EFI_GENERIC_STUB
|
2020-09-18 06:37:15 +08:00
|
|
|
select EFI_RUNTIME_WRAPPERS
|
2020-09-18 06:37:14 +08:00
|
|
|
select RISCV_ISA_C
|
2020-09-18 06:37:15 +08:00
|
|
|
depends on MMU
|
2020-09-18 06:37:14 +08:00
|
|
|
default y
|
|
|
|
help
|
|
|
|
This option provides support for runtime services provided
|
|
|
|
by UEFI firmware (such as non-volatile variables, realtime
|
|
|
|
clock, and platform reset). A UEFI stub is also provided to
|
|
|
|
allow the kernel to be booted as an EFI application. This
|
|
|
|
is only useful on systems that have UEFI firmware.
|
|
|
|
|
riscv: Enable per-task stack canaries
This enables the use of per-task stack canary values if GCC has
support for emitting the stack canary reference relative to the
value of tp, which holds the task struct pointer in the riscv
kernel.
After compare arm64 and x86 implementations, seems arm64's is more
flexible and readable. The key point is how gcc get the offset of
stack_canary from gs/el0_sp.
x86: Use a fix offset from gs, not flexible.
struct fixed_percpu_data {
/*
* GCC hardcodes the stack canary as %gs:40. Since the
* irq_stack is the object at %gs:0, we reserve the bottom
* 48 bytes of the irq stack for the canary.
*/
char gs_base[40]; // :(
unsigned long stack_canary;
};
arm64: Use -mstack-protector-guard-offset & guard-reg
gcc options:
-mstack-protector-guard=sysreg
-mstack-protector-guard-reg=sp_el0
-mstack-protector-guard-offset=xxx
riscv: Use -mstack-protector-guard-offset & guard-reg
gcc options:
-mstack-protector-guard=tls
-mstack-protector-guard-reg=tp
-mstack-protector-guard-offset=xxx
GCC's implementation has been merged:
commit c931e8d5a96463427040b0d11f9c4352ac22b2b0
Author: Cooper Qu <cooper.qu@linux.alibaba.com>
Date: Mon Jul 13 16:15:08 2020 +0800
RISC-V: Add support for TLS stack protector canary access
In the end, these codes are inserted by gcc before return:
* 0xffffffe00020b396 <+120>: ld a5,1008(tp) # 0x3f0
* 0xffffffe00020b39a <+124>: xor a5,a5,a4
* 0xffffffe00020b39c <+126>: mv a0,s5
* 0xffffffe00020b39e <+128>: bnez a5,0xffffffe00020b61c <_do_fork+766>
0xffffffe00020b3a2 <+132>: ld ra,136(sp)
0xffffffe00020b3a4 <+134>: ld s0,128(sp)
0xffffffe00020b3a6 <+136>: ld s1,120(sp)
0xffffffe00020b3a8 <+138>: ld s2,112(sp)
0xffffffe00020b3aa <+140>: ld s3,104(sp)
0xffffffe00020b3ac <+142>: ld s4,96(sp)
0xffffffe00020b3ae <+144>: ld s5,88(sp)
0xffffffe00020b3b0 <+146>: ld s6,80(sp)
0xffffffe00020b3b2 <+148>: ld s7,72(sp)
0xffffffe00020b3b4 <+150>: addi sp,sp,144
0xffffffe00020b3b6 <+152>: ret
...
* 0xffffffe00020b61c <+766>: auipc ra,0x7f8
* 0xffffffe00020b620 <+770>: jalr -1764(ra) # 0xffffffe000a02f38 <__stack_chk_fail>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Cooper Qu <cooper.qu@linux.alibaba.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-18 00:29:18 +08:00
|
|
|
config CC_HAVE_STACKPROTECTOR_TLS
|
|
|
|
def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0)
|
|
|
|
|
|
|
|
config STACKPROTECTOR_PER_TASK
|
|
|
|
def_bool y
|
2021-07-07 00:26:21 +08:00
|
|
|
depends on !GCC_PLUGIN_RANDSTRUCT
|
riscv: Enable per-task stack canaries
This enables the use of per-task stack canary values if GCC has
support for emitting the stack canary reference relative to the
value of tp, which holds the task struct pointer in the riscv
kernel.
After compare arm64 and x86 implementations, seems arm64's is more
flexible and readable. The key point is how gcc get the offset of
stack_canary from gs/el0_sp.
x86: Use a fix offset from gs, not flexible.
struct fixed_percpu_data {
/*
* GCC hardcodes the stack canary as %gs:40. Since the
* irq_stack is the object at %gs:0, we reserve the bottom
* 48 bytes of the irq stack for the canary.
*/
char gs_base[40]; // :(
unsigned long stack_canary;
};
arm64: Use -mstack-protector-guard-offset & guard-reg
gcc options:
-mstack-protector-guard=sysreg
-mstack-protector-guard-reg=sp_el0
-mstack-protector-guard-offset=xxx
riscv: Use -mstack-protector-guard-offset & guard-reg
gcc options:
-mstack-protector-guard=tls
-mstack-protector-guard-reg=tp
-mstack-protector-guard-offset=xxx
GCC's implementation has been merged:
commit c931e8d5a96463427040b0d11f9c4352ac22b2b0
Author: Cooper Qu <cooper.qu@linux.alibaba.com>
Date: Mon Jul 13 16:15:08 2020 +0800
RISC-V: Add support for TLS stack protector canary access
In the end, these codes are inserted by gcc before return:
* 0xffffffe00020b396 <+120>: ld a5,1008(tp) # 0x3f0
* 0xffffffe00020b39a <+124>: xor a5,a5,a4
* 0xffffffe00020b39c <+126>: mv a0,s5
* 0xffffffe00020b39e <+128>: bnez a5,0xffffffe00020b61c <_do_fork+766>
0xffffffe00020b3a2 <+132>: ld ra,136(sp)
0xffffffe00020b3a4 <+134>: ld s0,128(sp)
0xffffffe00020b3a6 <+136>: ld s1,120(sp)
0xffffffe00020b3a8 <+138>: ld s2,112(sp)
0xffffffe00020b3aa <+140>: ld s3,104(sp)
0xffffffe00020b3ac <+142>: ld s4,96(sp)
0xffffffe00020b3ae <+144>: ld s5,88(sp)
0xffffffe00020b3b0 <+146>: ld s6,80(sp)
0xffffffe00020b3b2 <+148>: ld s7,72(sp)
0xffffffe00020b3b4 <+150>: addi sp,sp,144
0xffffffe00020b3b6 <+152>: ret
...
* 0xffffffe00020b61c <+766>: auipc ra,0x7f8
* 0xffffffe00020b620 <+770>: jalr -1764(ra) # 0xffffffe000a02f38 <__stack_chk_fail>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Cooper Qu <cooper.qu@linux.alibaba.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-12-18 00:29:18 +08:00
|
|
|
depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
|
|
|
|
|
2021-07-21 15:59:36 +08:00
|
|
|
config PHYS_RAM_BASE_FIXED
|
|
|
|
bool "Explicitly specified physical RAM address"
|
|
|
|
default n
|
|
|
|
|
2021-04-13 14:35:14 +08:00
|
|
|
config PHYS_RAM_BASE
|
|
|
|
hex "Platform Physical RAM address"
|
2021-07-21 15:59:36 +08:00
|
|
|
depends on PHYS_RAM_BASE_FIXED
|
2021-04-13 14:35:14 +08:00
|
|
|
default "0x80000000"
|
|
|
|
help
|
|
|
|
This is the physical address of RAM in the system. It has to be
|
|
|
|
explicitly specified to run early relocations of read-write data
|
|
|
|
from flash to RAM.
|
|
|
|
|
|
|
|
config XIP_KERNEL
|
|
|
|
bool "Kernel Execute-In-Place from ROM"
|
|
|
|
depends on MMU && SPARSEMEM
|
|
|
|
# This prevents XIP from being enabled by all{yes,mod}config, which
|
|
|
|
# fail to build since XIP doesn't support large kernels.
|
|
|
|
depends on !COMPILE_TEST
|
2021-07-21 15:59:36 +08:00
|
|
|
select PHYS_RAM_BASE_FIXED
|
2021-04-13 14:35:14 +08:00
|
|
|
help
|
|
|
|
Execute-In-Place allows the kernel to run from non-volatile storage
|
|
|
|
directly addressable by the CPU, such as NOR flash. This saves RAM
|
|
|
|
space since the text section of the kernel is not loaded from flash
|
|
|
|
to RAM. Read-write sections, such as the data section and stack,
|
|
|
|
are still copied to RAM. The XIP kernel is not compressed since
|
|
|
|
it has to run directly from flash, so it will take more space to
|
|
|
|
store it. The flash address used to link the kernel object files,
|
|
|
|
and for storing it, is configuration dependent. Therefore, if you
|
|
|
|
say Y here, you must know the proper physical address where to
|
|
|
|
store the kernel image depending on your own flash memory usage.
|
|
|
|
|
|
|
|
Also note that the make target becomes "make xipImage" rather than
|
|
|
|
"make zImage" or "make Image". The final kernel binary to put in
|
|
|
|
ROM memory will be arch/riscv/boot/xipImage.
|
|
|
|
|
|
|
|
SPARSEMEM is required because the kernel text and rodata that are
|
|
|
|
flash resident are not backed by memmap, then any attempt to get
|
|
|
|
a struct page on those regions will trigger a fault.
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
config XIP_PHYS_ADDR
|
|
|
|
hex "XIP Kernel Physical Location"
|
|
|
|
depends on XIP_KERNEL
|
|
|
|
default "0x21000000"
|
|
|
|
help
|
|
|
|
This is the physical address in your flash memory the kernel will
|
|
|
|
be linked for and stored to. This address is dependent on your
|
|
|
|
own flash usage.
|
|
|
|
|
2018-09-20 06:48:15 +08:00
|
|
|
endmenu
|
|
|
|
|
2020-04-14 12:43:24 +08:00
|
|
|
config BUILTIN_DTB
|
2021-04-13 14:35:14 +08:00
|
|
|
bool
|
2020-04-14 12:43:24 +08:00
|
|
|
depends on OF
|
2021-04-13 14:35:14 +08:00
|
|
|
default y if XIP_KERNEL
|
2020-04-14 12:43:24 +08:00
|
|
|
|
2017-07-11 09:08:08 +08:00
|
|
|
menu "Power management options"
|
|
|
|
|
2018-12-11 19:01:04 +08:00
|
|
|
source "kernel/power/Kconfig"
|
2017-07-11 09:08:08 +08:00
|
|
|
|
|
|
|
endmenu
|
2020-09-18 06:37:14 +08:00
|
|
|
|
2021-09-27 19:40:01 +08:00
|
|
|
source "arch/riscv/kvm/Kconfig"
|