RAS: Add a tracepoint for reporting memory controller events
Add a new tracepoint-based hardware events report method for
reporting Memory Controller events.
Part of the description bellow is shamelessly copied from Tony
Luck's notes about the Hardware Error BoF during LPC 2010 [1].
Tony, thanks for your notes and discussions to generate the
h/w error reporting requirements.
[1] http://lwn.net/Articles/416669/
We have several subsystems & methods for reporting hardware errors:
1) EDAC ("Error Detection and Correction"). In its original form
this consisted of a platform specific driver that read topology
information and error counts from chipset registers and reported
the results via a sysfs interface.
2) mcelog - x86 specific decoding of machine check bank registers
reporting in binary form via /dev/mcelog. Recent additions make use
of the APEI extensions that were documented in version 4.0a of the
ACPI specification to acquire more information about errors without
having to rely reading chipset registers directly. A user level
programs decodes into somewhat human readable format.
3) drivers/edac/mce_amd.c - this driver hooks into the mcelog path and
decodes errors reported via machine check bank registers in AMD
processors to the console log using printk();
Each of these mechanisms has a band of followers ... and none
of them appear to meet all the needs of all users.
As part of a RAS subsystem, let's encapsulate the memory error hardware
events into a trace facility.
The tracepoint printk will be displayed like:
mc_event: [quant] (Corrected|Uncorrected|Fatal) error:[error msg] on [label] ([location] [edac_mc detail] [driver_detail]
Where:
[quant] is the quantity of errors
[error msg] is the driver-specific error message
(e. g. "memory read", "bus error", ...);
[location] is the location in terms of memory controller and
branch/channel/slot, channel/slot or csrow/channel;
[label] is the memory stick label;
[edac_mc detail] describes the address location of the error
and the syndrome;
[driver detail] is driver-specifig error message details,
when needed/provided (e. g. "area:DMA", ...)
For example:
mc_event: 1 Corrected error:memory read on memory stick DIMM_1A (mc:0 location:0:0:0 page:0x586b6e offset:0xa66 grain:32 syndrome:0x0 area:DMA)
Of course, any userspace tools meant to handle errors should not parse
the above data. They should, instead, use the binary fields provided by
the tracepoint, mapping them directly into their Management Information
Base.
NOTE: The original patch was providing an additional mechanism for
MCA-based trace events that also contained MCA error register data.
However, as no agreement was reached so far for the MCA-based trace
events, for now, let's add events only for memory errors.
A latter patch is planned to change the tracepoint, for those types
of event.
Cc: Aristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2012-02-23 19:10:34 +08:00
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM ras
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#define TRACE_INCLUDE_FILE ras_event
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#if !defined(_TRACE_HW_EVENT_MC_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_HW_EVENT_MC_H
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#include <linux/tracepoint.h>
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#include <linux/edac.h>
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#include <linux/ktime.h>
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2014-06-12 04:57:27 +08:00
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#include <linux/aer.h>
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RAS: Add a tracepoint for reporting memory controller events
Add a new tracepoint-based hardware events report method for
reporting Memory Controller events.
Part of the description bellow is shamelessly copied from Tony
Luck's notes about the Hardware Error BoF during LPC 2010 [1].
Tony, thanks for your notes and discussions to generate the
h/w error reporting requirements.
[1] http://lwn.net/Articles/416669/
We have several subsystems & methods for reporting hardware errors:
1) EDAC ("Error Detection and Correction"). In its original form
this consisted of a platform specific driver that read topology
information and error counts from chipset registers and reported
the results via a sysfs interface.
2) mcelog - x86 specific decoding of machine check bank registers
reporting in binary form via /dev/mcelog. Recent additions make use
of the APEI extensions that were documented in version 4.0a of the
ACPI specification to acquire more information about errors without
having to rely reading chipset registers directly. A user level
programs decodes into somewhat human readable format.
3) drivers/edac/mce_amd.c - this driver hooks into the mcelog path and
decodes errors reported via machine check bank registers in AMD
processors to the console log using printk();
Each of these mechanisms has a band of followers ... and none
of them appear to meet all the needs of all users.
As part of a RAS subsystem, let's encapsulate the memory error hardware
events into a trace facility.
The tracepoint printk will be displayed like:
mc_event: [quant] (Corrected|Uncorrected|Fatal) error:[error msg] on [label] ([location] [edac_mc detail] [driver_detail]
Where:
[quant] is the quantity of errors
[error msg] is the driver-specific error message
(e. g. "memory read", "bus error", ...);
[location] is the location in terms of memory controller and
branch/channel/slot, channel/slot or csrow/channel;
[label] is the memory stick label;
[edac_mc detail] describes the address location of the error
and the syndrome;
[driver detail] is driver-specifig error message details,
when needed/provided (e. g. "area:DMA", ...)
For example:
mc_event: 1 Corrected error:memory read on memory stick DIMM_1A (mc:0 location:0:0:0 page:0x586b6e offset:0xa66 grain:32 syndrome:0x0 area:DMA)
Of course, any userspace tools meant to handle errors should not parse
the above data. They should, instead, use the binary fields provided by
the tracepoint, mapping them directly into their Management Information
Base.
NOTE: The original patch was providing an additional mechanism for
MCA-based trace events that also contained MCA error register data.
However, as no agreement was reached so far for the MCA-based trace
events, for now, let's add events only for memory errors.
A latter patch is planned to change the tracepoint, for those types
of event.
Cc: Aristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2012-02-23 19:10:34 +08:00
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/*
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* Hardware Events Report
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*
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* Those events are generated when hardware detected a corrected or
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* uncorrected event, and are meant to replace the current API to report
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* errors defined on both EDAC and MCE subsystems.
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*
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* FIXME: Add events for handling memory errors originated from the
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* MCE subsystem.
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*/
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/*
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* Hardware-independent Memory Controller specific events
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*/
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/*
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* Default error mechanisms for Memory Controller errors (CE and UE)
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*/
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TRACE_EVENT(mc_event,
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TP_PROTO(const unsigned int err_type,
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const char *error_msg,
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const char *label,
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const int error_count,
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const u8 mc_index,
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const s8 top_layer,
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const s8 mid_layer,
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const s8 low_layer,
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unsigned long address,
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const u8 grain_bits,
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unsigned long syndrome,
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const char *driver_detail),
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TP_ARGS(err_type, error_msg, label, error_count, mc_index,
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top_layer, mid_layer, low_layer, address, grain_bits,
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syndrome, driver_detail),
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TP_STRUCT__entry(
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__field( unsigned int, error_type )
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__string( msg, error_msg )
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__string( label, label )
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__field( u16, error_count )
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__field( u8, mc_index )
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__field( s8, top_layer )
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__field( s8, middle_layer )
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__field( s8, lower_layer )
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__field( long, address )
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__field( u8, grain_bits )
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__field( long, syndrome )
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__string( driver_detail, driver_detail )
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),
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TP_fast_assign(
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__entry->error_type = err_type;
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__assign_str(msg, error_msg);
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__assign_str(label, label);
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__entry->error_count = error_count;
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__entry->mc_index = mc_index;
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__entry->top_layer = top_layer;
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__entry->middle_layer = mid_layer;
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__entry->lower_layer = low_layer;
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__entry->address = address;
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__entry->grain_bits = grain_bits;
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__entry->syndrome = syndrome;
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__assign_str(driver_detail, driver_detail);
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),
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TP_printk("%d %s error%s:%s%s on %s (mc:%d location:%d:%d:%d address:0x%08lx grain:%d syndrome:0x%08lx%s%s)",
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__entry->error_count,
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2013-02-20 08:26:22 +08:00
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mc_event_error_type(__entry->error_type),
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RAS: Add a tracepoint for reporting memory controller events
Add a new tracepoint-based hardware events report method for
reporting Memory Controller events.
Part of the description bellow is shamelessly copied from Tony
Luck's notes about the Hardware Error BoF during LPC 2010 [1].
Tony, thanks for your notes and discussions to generate the
h/w error reporting requirements.
[1] http://lwn.net/Articles/416669/
We have several subsystems & methods for reporting hardware errors:
1) EDAC ("Error Detection and Correction"). In its original form
this consisted of a platform specific driver that read topology
information and error counts from chipset registers and reported
the results via a sysfs interface.
2) mcelog - x86 specific decoding of machine check bank registers
reporting in binary form via /dev/mcelog. Recent additions make use
of the APEI extensions that were documented in version 4.0a of the
ACPI specification to acquire more information about errors without
having to rely reading chipset registers directly. A user level
programs decodes into somewhat human readable format.
3) drivers/edac/mce_amd.c - this driver hooks into the mcelog path and
decodes errors reported via machine check bank registers in AMD
processors to the console log using printk();
Each of these mechanisms has a band of followers ... and none
of them appear to meet all the needs of all users.
As part of a RAS subsystem, let's encapsulate the memory error hardware
events into a trace facility.
The tracepoint printk will be displayed like:
mc_event: [quant] (Corrected|Uncorrected|Fatal) error:[error msg] on [label] ([location] [edac_mc detail] [driver_detail]
Where:
[quant] is the quantity of errors
[error msg] is the driver-specific error message
(e. g. "memory read", "bus error", ...);
[location] is the location in terms of memory controller and
branch/channel/slot, channel/slot or csrow/channel;
[label] is the memory stick label;
[edac_mc detail] describes the address location of the error
and the syndrome;
[driver detail] is driver-specifig error message details,
when needed/provided (e. g. "area:DMA", ...)
For example:
mc_event: 1 Corrected error:memory read on memory stick DIMM_1A (mc:0 location:0:0:0 page:0x586b6e offset:0xa66 grain:32 syndrome:0x0 area:DMA)
Of course, any userspace tools meant to handle errors should not parse
the above data. They should, instead, use the binary fields provided by
the tracepoint, mapping them directly into their Management Information
Base.
NOTE: The original patch was providing an additional mechanism for
MCA-based trace events that also contained MCA error register data.
However, as no agreement was reached so far for the MCA-based trace
events, for now, let's add events only for memory errors.
A latter patch is planned to change the tracepoint, for those types
of event.
Cc: Aristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2012-02-23 19:10:34 +08:00
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__entry->error_count > 1 ? "s" : "",
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((char *)__get_str(msg))[0] ? " " : "",
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__get_str(msg),
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__get_str(label),
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__entry->mc_index,
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__entry->top_layer,
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__entry->middle_layer,
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__entry->lower_layer,
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__entry->address,
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1 << __entry->grain_bits,
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__entry->syndrome,
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((char *)__get_str(driver_detail))[0] ? " " : "",
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__get_str(driver_detail))
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);
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2014-06-12 04:57:27 +08:00
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/*
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* PCIe AER Trace event
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*
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* These events are generated when hardware detects a corrected or
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* uncorrected event on a PCIe device. The event report has
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* the following structure:
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*
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* char * dev_name - The name of the slot where the device resides
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* ([domain:]bus:device.function).
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* u32 status - Either the correctable or uncorrectable register
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* indicating what error or errors have been seen
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* u8 severity - error severity 0:NONFATAL 1:FATAL 2:CORRECTED
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*/
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#define aer_correctable_errors \
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{BIT(0), "Receiver Error"}, \
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{BIT(6), "Bad TLP"}, \
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{BIT(7), "Bad DLLP"}, \
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{BIT(8), "RELAY_NUM Rollover"}, \
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{BIT(12), "Replay Timer Timeout"}, \
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{BIT(13), "Advisory Non-Fatal"}
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#define aer_uncorrectable_errors \
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{BIT(4), "Data Link Protocol"}, \
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{BIT(12), "Poisoned TLP"}, \
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{BIT(13), "Flow Control Protocol"}, \
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{BIT(14), "Completion Timeout"}, \
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{BIT(15), "Completer Abort"}, \
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{BIT(16), "Unexpected Completion"}, \
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{BIT(17), "Receiver Overflow"}, \
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{BIT(18), "Malformed TLP"}, \
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{BIT(19), "ECRC"}, \
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{BIT(20), "Unsupported Request"}
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TRACE_EVENT(aer_event,
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TP_PROTO(const char *dev_name,
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const u32 status,
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const u8 severity),
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TP_ARGS(dev_name, status, severity),
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TP_STRUCT__entry(
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__string( dev_name, dev_name )
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__field( u32, status )
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__field( u8, severity )
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),
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TP_fast_assign(
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__assign_str(dev_name, dev_name);
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__entry->status = status;
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__entry->severity = severity;
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),
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TP_printk("%s PCIe Bus Error: severity=%s, %s\n",
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__get_str(dev_name),
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__entry->severity == AER_CORRECTABLE ? "Corrected" :
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__entry->severity == AER_FATAL ?
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"Fatal" : "Uncorrected, non-fatal",
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__entry->severity == AER_CORRECTABLE ?
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__print_flags(__entry->status, "|", aer_correctable_errors) :
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__print_flags(__entry->status, "|", aer_uncorrectable_errors))
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);
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RAS: Add a tracepoint for reporting memory controller events
Add a new tracepoint-based hardware events report method for
reporting Memory Controller events.
Part of the description bellow is shamelessly copied from Tony
Luck's notes about the Hardware Error BoF during LPC 2010 [1].
Tony, thanks for your notes and discussions to generate the
h/w error reporting requirements.
[1] http://lwn.net/Articles/416669/
We have several subsystems & methods for reporting hardware errors:
1) EDAC ("Error Detection and Correction"). In its original form
this consisted of a platform specific driver that read topology
information and error counts from chipset registers and reported
the results via a sysfs interface.
2) mcelog - x86 specific decoding of machine check bank registers
reporting in binary form via /dev/mcelog. Recent additions make use
of the APEI extensions that were documented in version 4.0a of the
ACPI specification to acquire more information about errors without
having to rely reading chipset registers directly. A user level
programs decodes into somewhat human readable format.
3) drivers/edac/mce_amd.c - this driver hooks into the mcelog path and
decodes errors reported via machine check bank registers in AMD
processors to the console log using printk();
Each of these mechanisms has a band of followers ... and none
of them appear to meet all the needs of all users.
As part of a RAS subsystem, let's encapsulate the memory error hardware
events into a trace facility.
The tracepoint printk will be displayed like:
mc_event: [quant] (Corrected|Uncorrected|Fatal) error:[error msg] on [label] ([location] [edac_mc detail] [driver_detail]
Where:
[quant] is the quantity of errors
[error msg] is the driver-specific error message
(e. g. "memory read", "bus error", ...);
[location] is the location in terms of memory controller and
branch/channel/slot, channel/slot or csrow/channel;
[label] is the memory stick label;
[edac_mc detail] describes the address location of the error
and the syndrome;
[driver detail] is driver-specifig error message details,
when needed/provided (e. g. "area:DMA", ...)
For example:
mc_event: 1 Corrected error:memory read on memory stick DIMM_1A (mc:0 location:0:0:0 page:0x586b6e offset:0xa66 grain:32 syndrome:0x0 area:DMA)
Of course, any userspace tools meant to handle errors should not parse
the above data. They should, instead, use the binary fields provided by
the tracepoint, mapping them directly into their Management Information
Base.
NOTE: The original patch was providing an additional mechanism for
MCA-based trace events that also contained MCA error register data.
However, as no agreement was reached so far for the MCA-based trace
events, for now, let's add events only for memory errors.
A latter patch is planned to change the tracepoint, for those types
of event.
Cc: Aristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2012-02-23 19:10:34 +08:00
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#endif /* _TRACE_HW_EVENT_MC_H */
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/* This part must be outside protection */
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#include <trace/define_trace.h>
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