2022-06-07 22:11:11 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2015-01-27 01:26:32 +08:00
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/*
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* Clock domain register offsets for TI81XX.
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*
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2020-07-19 18:30:33 +08:00
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* Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/
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2015-01-27 01:26:32 +08:00
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* Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
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#define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
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/* TI81XX common CM module offsets */
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2015-12-23 07:39:52 +08:00
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#define TI81XX_CM_ACTIVE_MOD 0x0400 /* 256B */
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#define TI81XX_CM_DEFAULT_MOD 0x0500 /* 256B */
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2015-01-27 01:26:32 +08:00
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#define TI81XX_CM_ALWON_MOD 0x1400 /* 1KB */
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2015-12-23 07:39:52 +08:00
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#define TI81XX_CM_SGX_MOD 0x0900 /* 256B */
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2015-01-27 01:26:32 +08:00
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/* TI816X CM module offsets */
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#define TI816X_CM_IVAHD0_MOD 0x0600 /* 256B */
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#define TI816X_CM_IVAHD1_MOD 0x0700 /* 256B */
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#define TI816X_CM_IVAHD2_MOD 0x0800 /* 256B */
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/* ALWON */
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#define TI81XX_CM_ALWON_L3_SLOW_CLKDM 0x0000
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#define TI81XX_CM_ALWON_L3_MED_CLKDM 0x0004
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#define TI81XX_CM_ETHERNET_CLKDM 0x0004
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#define TI81XX_CM_MMU_CLKDM 0x000C
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#define TI81XX_CM_MMUCFG_CLKDM 0x0010
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#define TI81XX_CM_ALWON_MPU_CLKDM 0x001C
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#define TI81XX_CM_ALWON_L3_FAST_CLKDM 0x0030
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/* ACTIVE */
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#define TI816X_CM_ACTIVE_GEM_CLKDM 0x0000
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/* IVAHD0 */
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#define TI816X_CM_IVAHD0_CLKDM 0x0000
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/* IVAHD1 */
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#define TI816X_CM_IVAHD1_CLKDM 0x0000
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/* IVAHD2 */
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#define TI816X_CM_IVAHD2_CLKDM 0x0000
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/* SGX */
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#define TI816X_CM_SGX_CLKDM 0x0000
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/* DEFAULT */
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#define TI816X_CM_DEFAULT_L3_MED_CLKDM 0x0004
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#define TI816X_CM_DEFAULT_PCI_CLKDM 0x0010
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#define TI816X_CM_DEFAULT_L3_SLOW_CLKDM 0x0014
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#define TI816X_CM_DEFAULT_DUCATI_CLKDM 0x0018
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2017-03-14 19:14:12 +08:00
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#define TI816X_CM_DEFAULT_SATA_CLKDM 0x0060
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2015-01-27 01:26:32 +08:00
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#endif
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