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OpenCloudOS-Kernel/arch/arm/mach-tegra/Makefile

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[ARM] tegra: initial tegra support v2: Fixes from Mike Rapoport - remove unused header files (mach/dma.h and mach/nand.h) - remove tegra 1 references from Makefile.boot v2: fixes from Russell King - remove mach/io.h include from mach/iomap.h - fix whitespace in Kconfig v2: from Colin Cross - fix invalid immediate in debug-macro.S v3: - allow selection of multiple boards Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
2010-01-22 08:53:02 +08:00
obj-y += common.o
obj-y += io.o
ARM: tegra: irq: Move legacy_irq.c into irq.c Now that irq.c is just an interface layer between the gic and legacy_irq.c, move the contents of legacy_irq.c into irq.c. Signed-off-by: Colin Cross <ccross@android.com>
2011-05-02 06:26:51 +08:00
obj-y += irq.o
[ARM] tegra: Add clock support v2: fixes from Russell King: - include linux/io.h instead of asm/io.h - fix whitespace in Kconfig - Use spin_lock_init to initialize lock - Return -ENOSYS instead of BUG for unimplemented clock ops - Use proper return values in tegra2 clock ops additional changes: - Rename some clocks to match dev_ids - add rate propagation - add debugfs entries - add support for clock listed in clk_lookup under multiple dev_ids v3: - Replace per-clock locking with global clock lock - Autodetect clock state on init - Let clock dividers pick next lower possible frequency - Add support for clock init tables - Minor bug fixes - Fix checkpatch issues Signed-off-by: Colin Cross <ccross@android.com>
2010-01-29 08:40:29 +08:00
obj-y += clock.o
[ARM] tegra: Add timer support v2: fixes from Russell King: - include linux/io.h instead of asm/io.h fixes from Gary King: - remove extra (and incorrect) irq definitions - use timer 3 instead of timer 1 for compatibility with other drivers - fix typo that disabled oneshot mode v3: - Implement sched_clock - Fix checkpatch issues fixes from Gary King: - Fix incorrect cycles calculation - Fix min_delta_ns assignment fixes from Linus Walleij: - use calc_mult_shift() instead of hard coding values Signed-off-by: Colin Cross <ccross@android.com>
2010-01-29 08:41:42 +08:00
obj-y += timer.o
[ARM] tegra: Add support for reading fuses The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>
2010-06-24 06:49:17 +08:00
obj-y += fuse.o
ARM: tegra: Add a simple PMC driver This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that. In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-01-26 05:43:28 +08:00
obj-y += pmc.o
ARM: tegra: functions to access the flowcontroller Introduce some functions to write to the flowcontroller registers. The flowcontroller controls CPU sleepstates and wakeup. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-10 07:47:44 +08:00
obj-y += flowctrl.o
ARM: tegra: build powergate unconditionally powergate functions are needed for tegra30 as well (see common.c), so build it always. Fixes: arch/arm/mach-tegra/built-in.o: In function `tegra30_init_early': apbio.c:(.init.text+0x78): undefined reference to `tegra_powergate_init' (using "allnoconfig" with tegra30 enabled) Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-13 21:55:47 +08:00
obj-y += powergate.o
ARM: tegra: apbio access using dma for tegra20 only The Tegra20 HW issue with accessing APBIO registers (such as fuse registers) directly from the CPU concurrently with APB DMA accesses has been fixed in Tegra30 and later chips. Access these registers directly from the CPU on Tegra30 and later, and apply the workaround only for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20 20:36:34 +08:00
obj-y += apbio.o
ARM: tegra: Avoid compiling cpuidle code when not configured No need to compile cpuidle.c and sleep.S if cpuidle isn't configured in the kernel. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-24 00:21:52 +08:00
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_CPU_IDLE) += sleep.o
ARM: tegra: Rename tegra20 clock file Make the name consistent with other files. s/tegra2/tegra20 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-06 14:27:41 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks.o
ARM: tegra20: Separate out clk ops and clk data Move clock initialization data to separate file. This is required for migrating to generic clock framework if static initialization is used. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-06 14:27:40 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks_data.o
ARM: tegra: Add speedo-based process identification Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:42:33 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o
ARM: tegra: Add external memory controller driver The frequency memory bus on Tegra can be adjusted without disabling accesses to memory by updating the memory configuration registers from a per-board table, and then changing the clock frequency. The clock controller and memory controller have an interlock that prevents the new memory registers from taking effect until the clock frequency change. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-13 10:22:49 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
ARM: tegra20: add CPU hotplug support Hotplug function put CPU in offline or online mode at runtime. When the CPU been put into offline, it was been clock gated. The offline CPU can be power gated, when the remaining CPU goes into LP2. Based on the worked by: Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 17:31:52 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-t20.o
ARM: tegra: enable tegra30 clock framework Add init calls for clocks on tegra30. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-01-09 13:35:13 +08:00
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o
ARM: tegra30: Separate out clk ops and clk data Move clock initialization data to separate file. This is required for migrating to generic clock framework if static initialization is used. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-06 14:27:39 +08:00
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks_data.o
ARM: tegra: Tegra30 speedo-based process identification This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:42:34 +08:00
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_speedo.o
ARM: tegra30: add CPU hotplug support Hotplug function put CPUs in offline or online state at runtime. When the CPU been put in the offline state, it was been clock and power gated. Except primary CPU other CPUs can be hotplugged. Based on the work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 17:31:51 +08:00
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-t30.o
ARM: tegra: build localtimer support only when needed It is possible to build a tegra kernel without localtimer support, so the tegra specific parts should only be built when that is indeed enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alan Ott <alan@signal11.us> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-03 04:58:32 +08:00
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
ARM: tegra: rework Tegra secondary CPU core bringup Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-10 07:47:45 +08:00
obj-$(CONFIG_SMP) += reset.o
[ARM] tegra: SMP support Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
2010-02-22 09:46:23 +08:00
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
[ARM] tegra: Add cpufreq support Implement cpufreq support for the Tegra SOC. DVFS is handled by the core virtual cpu clock. The frequencies of the two cores are tied together, the highest frequency requested by either core determines the actual frequency. Signed-off-by: Colin Cross <ccross@android.com>
2010-04-23 11:30:13 +08:00
obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
tegra: add PCI Express support Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01 Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Russell King <linux@arm.linux.org.uk> CC: Gary King <GKing@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2010-09-27 17:26:33 +08:00
obj-$(CONFIG_TEGRA_PCI) += pcie.o
[ARM] tegra: harmony: Add harmony board file v2: fixes from Russell King - include linux/io.h instead of mach/io.h v3: fixes from Linus Walleij - remove /16 * 16 from UART clock v3: - Fix checkpatch issues - make board init calls explicit - use clock init table to set clocks - remove panel Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
2010-02-11 09:13:07 +08:00
ARM: tegra: remove CONFIG_MACH_TEGRA_DT * Make ARCH_TEGRA select USE_OF; DT is the way forward. * Build board-dt-tegra*.c when the relevant Tegra SoC support is enabled, rather than requiring a specific config option for this. * The board-specific config options already build board-*-pinmux.o, and when booting from device tree these files are no longer needed, so we can remove some Makefile commands related to those files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-22 05:07:19 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-dt-tegra20.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
ARM: tegra: remove board (but not DT) support for Harmony Harmony can be booted using device tree with equal functionality as when booted using a board file. Remove as much of the board file as is possible, since it's no longer needed. Two special-cases are still left in board-dt-tegra20.c, since the Tegra PCIe driver doesn't support device tree yet, and the Harmony .dts file doesn't yet describe regulators which are needed for PCIe. This logic is now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While this is more code than other boards, it's still unlikely to be much of a problem, and both regulators and PCIe should be supported via device tree in the near future, allowing the remaining code to be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-04 05:24:38 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-harmony-pcie.o
ARM: tegra: add TrimSlice board Add basic support for CompuLab TrimSlice platform Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-07 16:10:53 +08:00
ARM: tegra: remove board (but not DT) support for Paz00 Paz00 (Toshiba AC100) can be booted using device tree with equal functionality as when booted using a board file. Remove as much of the board file as is possible, since it's no longer needed. One special-case is still left in board-dt-tegra20.c, since there is no way to create a WiFi rfkill device from device tree yet. This logic is now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra cases where it's enabled (.configs which did not enable Paz00 support) shouldn't impact much since the amount of code is tiny. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Marc Dietrich <marvin24@gmx.de>
2012-08-04 05:09:04 +08:00
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-paz00.o