2020-07-01 04:06:35 +08:00
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# SPDX-License-Identifier: GPL-2.0-only
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# Intel IOMMU support
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config DMAR_TABLE
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bool
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2021-06-10 10:01:05 +08:00
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config DMAR_PERF
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bool
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2021-10-14 13:38:32 +08:00
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config DMAR_DEBUG
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bool
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2020-07-01 04:06:35 +08:00
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config INTEL_IOMMU
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bool "Support for Intel IOMMU using DMA Remapping Devices"
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depends on PCI_MSI && ACPI && (X86 || IA64)
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2020-08-12 05:13:24 +08:00
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select DMA_OPS
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2020-07-01 04:06:35 +08:00
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select IOMMU_API
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select IOMMU_IOVA
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select NEED_DMA_MAP_STATE
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select DMAR_TABLE
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select SWIOTLB
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select IOASID
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2020-11-24 16:20:56 +08:00
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select IOMMU_DMA
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2021-06-10 10:00:56 +08:00
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select PCI_ATS
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2020-07-01 04:06:35 +08:00
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help
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DMA remapping (DMAR) devices support enables independent address
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translations for Direct Memory Access (DMA) from devices.
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These DMA remapping devices are reported via ACPI tables
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and include PCI device scope covered by these DMA
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remapping devices.
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2021-08-18 21:48:46 +08:00
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if INTEL_IOMMU
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2020-07-01 04:06:35 +08:00
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config INTEL_IOMMU_DEBUGFS
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bool "Export Intel IOMMU internals in Debugfs"
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2021-08-18 21:48:46 +08:00
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depends on IOMMU_DEBUGFS
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2021-06-10 10:01:06 +08:00
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select DMAR_PERF
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2021-10-14 13:38:32 +08:00
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select DMAR_DEBUG
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2020-07-01 04:06:35 +08:00
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help
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!!!WARNING!!!
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DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!!
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Expose Intel IOMMU internals in Debugfs.
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This option is -NOT- intended for production environments, and should
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only be enabled for debugging Intel IOMMU.
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config INTEL_IOMMU_SVM
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bool "Support for Shared Virtual Memory with Intel IOMMU"
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2021-08-18 21:48:46 +08:00
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depends on X86_64
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2020-07-01 04:06:35 +08:00
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select PCI_PASID
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select PCI_PRI
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select MMU_NOTIFIER
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select IOASID
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2021-06-10 10:00:59 +08:00
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select IOMMU_SVA_LIB
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2020-07-01 04:06:35 +08:00
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help
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Shared Virtual Memory (SVM) provides a facility for devices
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to access DMA resources through process address space by
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means of a Process Address Space ID (PASID).
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config INTEL_IOMMU_DEFAULT_ON
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2021-08-18 21:48:46 +08:00
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bool "Enable Intel DMA Remapping Devices by default"
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default y
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2020-07-01 04:06:35 +08:00
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help
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Selecting this option will enable a DMAR device at boot time if
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one is found. If this option is not selected, DMAR support can
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be enabled by passing intel_iommu=on to the kernel.
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config INTEL_IOMMU_BROKEN_GFX_WA
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bool "Workaround broken graphics drivers (going away soon)"
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2021-08-18 21:48:46 +08:00
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depends on BROKEN && X86
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2020-07-01 04:06:35 +08:00
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help
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Current Graphics drivers tend to use physical address
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for DMA and avoid using DMA APIs. Setting this config
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option permits the IOMMU driver to set a unity map for
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all the OS-visible memory. Hence the driver can continue
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to use physical addresses for DMA, at least until this
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option is removed in the 2.6.32 kernel.
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config INTEL_IOMMU_FLOPPY_WA
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def_bool y
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2021-08-18 21:48:46 +08:00
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depends on X86
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2020-07-01 04:06:35 +08:00
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help
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Floppy disk drivers are known to bypass DMA API calls
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thereby failing to work when IOMMU is enabled. This
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workaround will setup a 1:1 mapping for the first
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16MiB to make floppy (an ISA device) work.
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config INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
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bool "Enable Intel IOMMU scalable mode by default"
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2021-08-18 21:48:47 +08:00
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default y
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2020-07-01 04:06:35 +08:00
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help
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Selecting this option will enable by default the scalable mode if
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hardware presents the capability. The scalable mode is defined in
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VT-d 3.0. The scalable mode capability could be checked by reading
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/sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option
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is not selected, scalable mode support could also be enabled by
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passing intel_iommu=sm_on to the kernel. If not sure, please use
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the default value.
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2021-08-18 21:48:46 +08:00
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endif # INTEL_IOMMU
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