2019-08-22 11:48:34 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Ultravisor definitions
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*
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* Copyright 2019, IBM Corporation.
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*
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*/
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#ifndef _ASM_POWERPC_ULTRAVISOR_H
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#define _ASM_POWERPC_ULTRAVISOR_H
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2019-08-22 11:48:35 +08:00
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#include <asm/asm-prototypes.h>
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#include <asm/ultravisor-api.h>
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2019-08-22 11:48:36 +08:00
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#include <asm/firmware.h>
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2019-08-22 11:48:35 +08:00
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2019-08-22 11:48:34 +08:00
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int early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
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int depth, void *data);
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2019-08-22 11:48:36 +08:00
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/*
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* In ultravisor enabled systems, PTCR becomes ultravisor privileged only for
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* writing and an attempt to write to it will cause a Hypervisor Emulation
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* Assistance interrupt.
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*/
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static inline void set_ptcr_when_no_uv(u64 val)
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{
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if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
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mtspr(SPRN_PTCR, val);
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}
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2019-08-22 11:48:35 +08:00
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static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1)
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{
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return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1);
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}
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2019-08-20 10:13:15 +08:00
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static inline int uv_share_page(u64 pfn, u64 npages)
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{
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return ucall_norets(UV_SHARE_PAGE, pfn, npages);
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}
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static inline int uv_unshare_page(u64 pfn, u64 npages)
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{
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return ucall_norets(UV_UNSHARE_PAGE, pfn, npages);
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}
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2019-08-22 11:48:34 +08:00
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#endif /* _ASM_POWERPC_ULTRAVISOR_H */
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