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OpenCloudOS-Kernel/drivers/dma/xilinx/Makefile

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treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-19 20:07:45 +08:00
# SPDX-License-Identifier: GPL-2.0-only
dmaengine: xilinx: Rename driver and config In the existing vdma driver support for AXI DMA and CDMA got added so the driver is no longer VDMA specific. This patch renames the driver and DT binding doc to xilinx_dma and updates the Kconfig description for all the DMAS. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-06-24 13:21:25 +08:00
obj-$(CONFIG_XILINX_DMA) += xilinx_dma.o
dmaengine: xilinx: xdma: Add xilinx xdma driver Add driver to enable PCIe board which uses XDMA (the DMA/Bridge Subsystem for PCI Express). For example, Xilinx Alveo PCIe devices. https://www.xilinx.com/products/boards-and-kits/alveo.html The XDMA engine support up to 4 Host to Card (H2C) and 4 Card to Host (C2H) channels. Memory transfers are specified on a per-channel basis in descriptor linked lists, which the DMA fetches from host memory and processes. Events such as descriptor completion and errors are signaled using interrupts. The hardware detail is provided by https://docs.xilinx.com/r/en-US/pg195-pcie-dma/Introduction This driver implements dmaengine APIs. - probe the available DMA channels - use dma_slave_map for channel lookup - use virtual channel to manage dmaengine tx descriptors - implement device_prep_slave_sg callback to handle host scatter gather list - implement device_config to config device address for DMA transfer Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Sonal Santan <sonal.santan@amd.com> Signed-off-by: Max Zhen <max.zhen@amd.com> Signed-off-by: Brian Xu <brian.xu@amd.com> Tested-by: Martin Tuma <tumic@gpxsee.org> Link: https://lore.kernel.org/r/1674145926-29449-2-git-send-email-lizhi.hou@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-01-20 00:32:05 +08:00
obj-$(CONFIG_XILINX_XDMA) += xdma.o
dmaengine: Add Xilinx zynqmp dma engine driver support Added the driver for zynqmp dma engine used in Zynq UltraScale+ MPSoC. This dma controller supports memory to memory and I/O to I/O buffer transfers. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-01 19:37:06 +08:00
obj-$(CONFIG_XILINX_ZYNQMP_DMA) += zynqmp_dma.o
dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver The ZynqMP DisplayPort subsystem includes a DMA engine called DPDMA with 6 DMa channels (4 for display and 2 for audio). This driver exposes the DPDMA through the dmaengine API, to be used by audio (ALSA) and display (DRM) drivers for the DisplayPort subsystem. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200717013337.24122-4-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17 09:33:35 +08:00
obj-$(CONFIG_XILINX_ZYNQMP_DPDMA) += xilinx_dpdma.o