2011-10-04 18:19:01 +08:00
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/* exynos_drm_crtc.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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2012-12-18 01:30:17 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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2011-10-04 18:19:01 +08:00
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*/
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2012-10-03 01:01:07 +08:00
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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2015-06-01 23:04:44 +08:00
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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2011-10-04 18:19:01 +08:00
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2013-08-13 07:46:40 +08:00
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#include "exynos_drm_crtc.h"
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2011-10-04 18:19:01 +08:00
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#include "exynos_drm_drv.h"
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2012-06-27 13:27:04 +08:00
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#include "exynos_drm_plane.h"
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2011-10-04 18:19:01 +08:00
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2015-06-01 23:04:53 +08:00
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static void exynos_drm_crtc_enable(struct drm_crtc *crtc)
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2011-10-04 18:19:01 +08:00
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{
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2011-11-04 16:04:45 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2011-10-04 18:19:01 +08:00
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2015-06-01 23:04:55 +08:00
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if (exynos_crtc->ops->enable)
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exynos_crtc->ops->enable(exynos_crtc);
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2014-02-19 20:02:55 +08:00
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2015-06-01 23:04:53 +08:00
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drm_crtc_vblank_on(crtc);
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2011-10-04 18:19:01 +08:00
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}
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2015-06-01 23:04:51 +08:00
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static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
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{
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2015-06-01 23:04:53 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2015-06-01 23:04:51 +08:00
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2015-06-01 23:04:53 +08:00
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/* wait for the completion of page flip. */
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if (!wait_event_timeout(exynos_crtc->pending_flip_queue,
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(exynos_crtc->event == NULL), HZ/20))
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exynos_crtc->event = NULL;
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drm_crtc_vblank_off(crtc);
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2015-06-01 23:04:55 +08:00
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if (exynos_crtc->ops->disable)
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exynos_crtc->ops->disable(exynos_crtc);
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2015-06-01 23:04:51 +08:00
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}
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2011-10-04 18:19:01 +08:00
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static bool
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exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
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2012-07-17 23:56:50 +08:00
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const struct drm_display_mode *mode,
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2011-10-04 18:19:01 +08:00
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struct drm_display_mode *adjusted_mode)
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{
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2014-01-31 05:19:19 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2015-01-18 17:16:23 +08:00
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if (exynos_crtc->ops->mode_fixup)
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return exynos_crtc->ops->mode_fixup(exynos_crtc, mode,
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adjusted_mode);
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2014-01-31 05:19:19 +08:00
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2011-10-04 18:19:01 +08:00
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return true;
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}
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2015-06-01 23:04:43 +08:00
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static void
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exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
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2011-10-04 18:19:01 +08:00
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{
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2012-06-27 13:27:05 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2012-09-14 12:29:47 +08:00
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2015-06-01 23:04:43 +08:00
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if (exynos_crtc->ops->commit)
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exynos_crtc->ops->commit(exynos_crtc);
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2011-10-04 18:19:01 +08:00
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}
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2015-07-21 19:28:58 +08:00
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static void exynos_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state)
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2015-06-01 23:04:48 +08:00
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2015-08-24 19:36:59 +08:00
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struct drm_plane *plane;
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2015-06-01 23:04:48 +08:00
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if (crtc->state->event) {
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WARN_ON(drm_crtc_vblank_get(crtc) != 0);
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exynos_crtc->event = crtc->state->event;
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}
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2015-08-24 19:36:59 +08:00
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drm_atomic_crtc_for_each_plane(plane, crtc) {
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struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
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if (exynos_crtc->ops->atomic_begin)
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exynos_crtc->ops->atomic_begin(exynos_crtc,
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exynos_plane);
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}
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2015-06-01 23:04:48 +08:00
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}
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2015-07-21 19:28:58 +08:00
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static void exynos_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state)
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2015-06-01 23:04:48 +08:00
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{
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2015-08-24 19:36:59 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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struct drm_plane *plane;
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drm_atomic_crtc_for_each_plane(plane, crtc) {
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struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
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if (exynos_crtc->ops->atomic_flush)
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exynos_crtc->ops->atomic_flush(exynos_crtc,
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exynos_plane);
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}
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2015-06-01 23:04:48 +08:00
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}
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2011-10-04 18:19:01 +08:00
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static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
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2015-06-01 23:04:53 +08:00
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.enable = exynos_drm_crtc_enable,
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2015-06-01 23:04:51 +08:00
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.disable = exynos_drm_crtc_disable,
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2011-10-04 18:19:01 +08:00
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.mode_fixup = exynos_drm_crtc_mode_fixup,
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2015-06-01 23:04:43 +08:00
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.mode_set_nofb = exynos_drm_crtc_mode_set_nofb,
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2015-06-01 23:04:48 +08:00
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.atomic_begin = exynos_crtc_atomic_begin,
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.atomic_flush = exynos_crtc_atomic_flush,
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2011-10-04 18:19:01 +08:00
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};
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static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
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{
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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struct exynos_drm_private *private = crtc->dev->dev_private;
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private->crtc[exynos_crtc->pipe] = NULL;
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drm_crtc_cleanup(crtc);
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kfree(exynos_crtc);
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}
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static struct drm_crtc_funcs exynos_crtc_funcs = {
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2015-06-01 23:04:47 +08:00
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.set_config = drm_atomic_helper_set_config,
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2015-06-01 23:04:48 +08:00
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.page_flip = drm_atomic_helper_page_flip,
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2011-10-04 18:19:01 +08:00
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.destroy = exynos_drm_crtc_destroy,
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2015-06-01 23:04:44 +08:00
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.reset = drm_atomic_helper_crtc_reset,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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2011-10-04 18:19:01 +08:00
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};
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2015-01-18 17:16:23 +08:00
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struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
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2015-05-07 08:04:45 +08:00
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struct drm_plane *plane,
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int pipe,
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enum exynos_drm_output_type type,
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const struct exynos_drm_crtc_ops *ops,
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void *ctx)
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2011-10-04 18:19:01 +08:00
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{
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struct exynos_drm_crtc *exynos_crtc;
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2014-11-27 02:43:27 +08:00
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struct exynos_drm_private *private = drm_dev->dev_private;
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2011-10-04 18:19:01 +08:00
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struct drm_crtc *crtc;
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2014-09-19 20:58:53 +08:00
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int ret;
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2011-10-04 18:19:01 +08:00
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exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
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2013-08-19 18:04:55 +08:00
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if (!exynos_crtc)
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2015-01-18 17:16:23 +08:00
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return ERR_PTR(-ENOMEM);
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2011-10-04 18:19:01 +08:00
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2013-05-21 15:55:58 +08:00
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init_waitqueue_head(&exynos_crtc->pending_flip_queue);
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2014-02-19 20:02:55 +08:00
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2014-11-05 04:25:27 +08:00
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exynos_crtc->pipe = pipe;
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2014-11-06 05:51:35 +08:00
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exynos_crtc->type = type;
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2015-01-18 17:16:23 +08:00
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exynos_crtc->ops = ops;
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exynos_crtc->ctx = ctx;
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2012-06-27 13:27:04 +08:00
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2014-11-04 04:20:29 +08:00
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crtc = &exynos_crtc->base;
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2011-10-04 18:19:01 +08:00
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2014-11-05 04:25:27 +08:00
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private->crtc[pipe] = crtc;
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2011-10-04 18:19:01 +08:00
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2014-11-27 02:43:27 +08:00
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ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL,
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2014-09-19 20:58:53 +08:00
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&exynos_crtc_funcs);
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if (ret < 0)
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goto err_crtc;
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2011-10-04 18:19:01 +08:00
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drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
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2015-01-18 17:16:23 +08:00
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return exynos_crtc;
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2014-09-19 20:58:53 +08:00
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err_crtc:
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plane->funcs->destroy(plane);
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kfree(exynos_crtc);
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2015-01-18 17:16:23 +08:00
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return ERR_PTR(ret);
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2011-10-04 18:19:01 +08:00
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}
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2014-02-19 20:02:55 +08:00
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int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe)
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2011-10-04 18:19:01 +08:00
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{
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struct exynos_drm_private *private = dev->dev_private;
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2011-12-06 10:06:54 +08:00
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struct exynos_drm_crtc *exynos_crtc =
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2014-02-19 20:02:55 +08:00
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to_exynos_crtc(private->crtc[pipe]);
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2011-10-04 18:19:01 +08:00
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2015-01-18 17:16:23 +08:00
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if (exynos_crtc->ops->enable_vblank)
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2015-07-16 23:23:39 +08:00
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return exynos_crtc->ops->enable_vblank(exynos_crtc);
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2011-10-04 18:19:01 +08:00
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return 0;
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}
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2014-02-19 20:02:55 +08:00
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void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe)
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2011-10-04 18:19:01 +08:00
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{
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struct exynos_drm_private *private = dev->dev_private;
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2011-12-06 10:06:54 +08:00
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struct exynos_drm_crtc *exynos_crtc =
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2014-02-19 20:02:55 +08:00
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to_exynos_crtc(private->crtc[pipe]);
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2011-10-04 18:19:01 +08:00
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2015-01-18 17:16:23 +08:00
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if (exynos_crtc->ops->disable_vblank)
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exynos_crtc->ops->disable_vblank(exynos_crtc);
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2011-10-04 18:19:01 +08:00
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}
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2013-01-03 18:44:04 +08:00
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2015-07-16 23:23:32 +08:00
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void exynos_drm_crtc_finish_pageflip(struct exynos_drm_crtc *exynos_crtc)
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2013-01-03 18:44:04 +08:00
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{
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2015-07-16 23:23:32 +08:00
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struct drm_crtc *crtc = &exynos_crtc->base;
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2013-01-03 18:44:04 +08:00
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unsigned long flags;
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2015-07-16 23:23:32 +08:00
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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2015-04-02 00:02:12 +08:00
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if (exynos_crtc->event) {
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2013-01-03 18:44:04 +08:00
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2015-07-16 23:23:32 +08:00
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drm_crtc_send_vblank_event(crtc, exynos_crtc->event);
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drm_crtc_vblank_put(crtc);
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2013-05-21 15:55:58 +08:00
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wake_up(&exynos_crtc->pending_flip_queue);
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2015-04-02 00:02:12 +08:00
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2013-01-03 18:44:04 +08:00
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}
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2015-04-02 00:02:12 +08:00
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exynos_crtc->event = NULL;
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2015-07-16 23:23:32 +08:00
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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2013-01-03 18:44:04 +08:00
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}
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2014-02-19 20:02:55 +08:00
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void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb)
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{
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2015-01-18 17:16:23 +08:00
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struct exynos_drm_crtc *exynos_crtc;
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2014-02-19 20:02:55 +08:00
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struct drm_device *dev = fb->dev;
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struct drm_crtc *crtc;
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/*
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* make sure that overlay data are updated to real hardware
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* for all encoders.
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*/
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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2015-01-18 17:16:23 +08:00
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exynos_crtc = to_exynos_crtc(crtc);
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2014-02-19 20:02:55 +08:00
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/*
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* wait for vblank interrupt
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* - this makes sure that overlay data are updated to
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* real hardware.
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*/
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2015-01-18 17:16:23 +08:00
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if (exynos_crtc->ops->wait_for_vblank)
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exynos_crtc->ops->wait_for_vblank(exynos_crtc);
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2014-02-19 20:02:55 +08:00
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}
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}
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2014-05-09 13:25:20 +08:00
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int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev,
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2015-08-11 16:38:06 +08:00
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enum exynos_drm_output_type out_type)
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2014-05-09 13:25:20 +08:00
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{
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struct drm_crtc *crtc;
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list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
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struct exynos_drm_crtc *exynos_crtc;
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exynos_crtc = to_exynos_crtc(crtc);
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2014-11-06 05:51:35 +08:00
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if (exynos_crtc->type == out_type)
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2014-11-05 04:44:47 +08:00
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return exynos_crtc->pipe;
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2014-05-09 13:25:20 +08:00
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}
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return -EPERM;
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}
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2014-07-17 17:01:19 +08:00
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void exynos_drm_crtc_te_handler(struct drm_crtc *crtc)
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{
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2015-01-18 17:16:23 +08:00
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struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
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2014-07-17 17:01:19 +08:00
|
|
|
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2015-01-18 17:16:23 +08:00
|
|
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if (exynos_crtc->ops->te_handler)
|
|
|
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exynos_crtc->ops->te_handler(exynos_crtc);
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2014-07-17 17:01:19 +08:00
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}
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