2019-06-04 16:11:33 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2011-05-12 01:59:58 +08:00
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#ifndef __LINUX_REGMAP_H
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#define __LINUX_REGMAP_H
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/*
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* Register map access API
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*
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* Copyright 2011 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*/
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#include <linux/list.h>
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2012-06-15 18:23:56 +08:00
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#include <linux/rbtree.h>
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2018-04-23 14:42:44 +08:00
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#include <linux/ktime.h>
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2016-10-13 18:07:54 +08:00
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#include <linux/delay.h>
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2013-08-07 00:34:40 +08:00
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#include <linux/err.h>
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2013-08-15 07:05:02 +08:00
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#include <linux/bug.h>
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2015-07-08 14:30:18 +08:00
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#include <linux/lockdep.h>
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2020-04-20 21:46:46 +08:00
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#include <linux/iopoll.h>
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2020-07-07 01:53:41 +08:00
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#include <linux/fwnode.h>
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2011-05-12 01:59:58 +08:00
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2011-05-27 01:46:22 +08:00
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struct module;
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2018-02-21 17:20:25 +08:00
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struct clk;
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2012-01-31 00:46:54 +08:00
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struct device;
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2020-04-03 04:36:44 +08:00
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struct device_node;
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2022-11-03 04:51:44 +08:00
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struct fsi_device;
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2011-06-21 02:02:29 +08:00
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struct i2c_client;
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2019-06-06 23:12:02 +08:00
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struct i3c_device;
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2012-08-21 04:45:05 +08:00
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struct irq_domain;
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2021-05-18 03:28:03 +08:00
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struct mdio_device;
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2017-12-12 07:43:02 +08:00
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struct slim_device;
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2011-05-12 17:42:10 +08:00
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struct spi_device;
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2013-10-29 02:12:35 +08:00
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struct spmi_device;
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2012-03-11 19:49:17 +08:00
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struct regmap;
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2012-06-15 18:23:56 +08:00
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struct regmap_range_cfg;
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2013-06-11 20:18:15 +08:00
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struct regmap_field;
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2014-11-19 02:45:51 +08:00
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struct snd_ac97;
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2018-01-08 18:20:59 +08:00
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struct sdw_slave;
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2011-06-21 02:02:29 +08:00
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2023-01-16 19:15:09 +08:00
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/*
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* regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a
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* device address and a register address.
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*/
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#define REGMAP_MDIO_C45_DEVAD_SHIFT 16
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#define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16)
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#define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0)
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2023-04-07 23:26:04 +08:00
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/*
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* regmap.reg_shift indicates by how much we must shift registers prior to
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* performing any operation. It's a signed value, positive numbers means
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* downshifting the register's address, while negative numbers means upshifting.
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*/
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#define REGMAP_UPSHIFT(s) (-(s))
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#define REGMAP_DOWNSHIFT(s) (s)
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2011-09-19 21:34:00 +08:00
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/* An enum of all the supported cache types */
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enum regcache_type {
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REGCACHE_NONE,
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2011-09-19 21:34:02 +08:00
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REGCACHE_RBTREE,
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2012-12-19 22:51:55 +08:00
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REGCACHE_FLAT,
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2023-03-30 08:10:24 +08:00
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REGCACHE_MAPLE,
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2011-09-19 21:34:00 +08:00
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};
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2011-08-19 17:09:38 +08:00
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/**
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2017-01-12 19:17:39 +08:00
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* struct reg_default - Default value for a register.
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2011-08-19 17:09:38 +08:00
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*
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* @reg: Register address.
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* @def: Register default value.
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2017-01-12 19:17:39 +08:00
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*
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* We use an array of structs rather than a simple array as many modern devices
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* have very sparse register maps.
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2011-08-19 17:09:38 +08:00
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*/
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struct reg_default {
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unsigned int reg;
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unsigned int def;
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};
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2015-07-16 23:36:21 +08:00
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/**
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2017-01-12 19:17:39 +08:00
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* struct reg_sequence - An individual write from a sequence of writes.
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2015-07-16 23:36:21 +08:00
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*
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* @reg: Register address.
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* @def: Register value.
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2015-07-16 23:36:22 +08:00
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* @delay_us: Delay to be applied after the register write in microseconds
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2017-01-12 19:17:39 +08:00
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*
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* Register/value pairs for sequences of writes with an optional delay in
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* microseconds to be applied after each write.
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2015-07-16 23:36:21 +08:00
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*/
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struct reg_sequence {
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unsigned int reg;
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unsigned int def;
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2015-07-16 23:36:22 +08:00
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unsigned int delay_us;
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2015-07-16 23:36:21 +08:00
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};
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2020-04-02 16:41:11 +08:00
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#define REG_SEQ(_reg, _def, _delay_us) { \
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.reg = _reg, \
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.def = _def, \
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.delay_us = _delay_us, \
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}
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#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
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2016-07-06 22:19:41 +08:00
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/**
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* regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
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2017-01-12 19:17:39 +08:00
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*
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2016-07-06 22:19:41 +08:00
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* @map: Regmap to read from
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* @addr: Address to poll
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* @val: Unsigned integer variable to read the value into
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* @cond: Break condition (usually involving @val)
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* @sleep_us: Maximum time to sleep between reads in us (0
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* tight-loops). Should be less than ~20ms since usleep_range
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2019-06-13 01:53:00 +08:00
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* is used (see Documentation/timers/timers-howto.rst).
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2016-07-06 22:19:41 +08:00
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* @timeout_us: Timeout in us, 0 means never timeout
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*
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* Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
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* error return value in case of a error read. In the two former cases,
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* the last read value at @addr is stored in @val. Must not be called
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* from atomic context if sleep_us or timeout_us are used.
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*
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* This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
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*/
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#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
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({ \
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2020-04-20 21:46:46 +08:00
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int __ret, __tmp; \
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__tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
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sleep_us, timeout_us, false, (map), (addr), &(val)); \
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__ret ?: __tmp; \
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2016-07-06 22:19:41 +08:00
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})
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2020-01-09 13:09:50 +08:00
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/**
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* regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
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*
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* @map: Regmap to read from
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* @addr: Address to poll
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* @val: Unsigned integer variable to read the value into
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* @cond: Break condition (usually involving @val)
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* @delay_us: Time to udelay between reads in us (0 tight-loops).
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* Should be less than ~10us since udelay is used
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* (see Documentation/timers/timers-howto.rst).
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* @timeout_us: Timeout in us, 0 means never timeout
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*
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* Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
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* error return value in case of a error read. In the two former cases,
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* the last read value at @addr is stored in @val.
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*
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* This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
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*
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* Note: In general regmap cannot be used in atomic context. If you want to use
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* this macro then first setup your regmap for atomic use (flat or no cache
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* and MMIO regmap).
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*/
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#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
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({ \
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u64 __timeout_us = (timeout_us); \
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unsigned long __delay_us = (delay_us); \
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ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
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int __ret; \
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for (;;) { \
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__ret = regmap_read((map), (addr), &(val)); \
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if (__ret) \
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break; \
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if (cond) \
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break; \
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if ((__timeout_us) && \
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ktime_compare(ktime_get(), __timeout) > 0) { \
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__ret = regmap_read((map), (addr), &(val)); \
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break; \
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} \
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if (__delay_us) \
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udelay(__delay_us); \
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} \
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__ret ?: ((cond) ? 0 : -ETIMEDOUT); \
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})
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2017-09-29 16:23:01 +08:00
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/**
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* regmap_field_read_poll_timeout - Poll until a condition is met or timeout
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*
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* @field: Regmap field to read from
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* @val: Unsigned integer variable to read the value into
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* @cond: Break condition (usually involving @val)
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* @sleep_us: Maximum time to sleep between reads in us (0
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* tight-loops). Should be less than ~20ms since usleep_range
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2019-06-13 01:53:00 +08:00
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* is used (see Documentation/timers/timers-howto.rst).
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2017-09-29 16:23:01 +08:00
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* @timeout_us: Timeout in us, 0 means never timeout
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*
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* Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
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* error return value in case of a error read. In the two former cases,
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* the last read value at @addr is stored in @val. Must not be called
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* from atomic context if sleep_us or timeout_us are used.
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*
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* This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
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*/
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#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
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({ \
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2020-04-20 21:46:47 +08:00
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int __ret, __tmp; \
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__tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
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sleep_us, timeout_us, false, (field), &(val)); \
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__ret ?: __tmp; \
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2017-09-29 16:23:01 +08:00
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})
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2012-03-11 19:49:17 +08:00
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#ifdef CONFIG_REGMAP
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2012-05-25 00:47:26 +08:00
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enum regmap_endian {
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/* Unspecified -> 0 -> Backwards compatible default */
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REGMAP_ENDIAN_DEFAULT = 0,
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REGMAP_ENDIAN_BIG,
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REGMAP_ENDIAN_LITTLE,
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REGMAP_ENDIAN_NATIVE,
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};
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2012-11-20 22:20:30 +08:00
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/**
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2017-01-12 19:17:39 +08:00
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* struct regmap_range - A register range, used for access related checks
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* (readable/writeable/volatile/precious checks)
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2012-11-20 22:20:30 +08:00
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*
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* @range_min: address of first register
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* @range_max: address of last register
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*/
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struct regmap_range {
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unsigned int range_min;
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unsigned int range_max;
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};
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2013-09-20 20:30:10 +08:00
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#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
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2017-01-12 19:17:39 +08:00
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/**
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* struct regmap_access_table - A table of register ranges for access checks
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2012-11-20 22:20:30 +08:00
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*
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* @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
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* @n_yes_ranges: size of the above array
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* @no_ranges: pointer to an array of regmap ranges used as "no ranges"
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* @n_no_ranges: size of the above array
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2017-01-12 19:17:39 +08:00
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*
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* A table of ranges including some yes ranges and some no ranges.
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* If a register belongs to a no_range, the corresponding check function
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* will return false. If a register belongs to a yes range, the corresponding
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* check function will return true. "no_ranges" are searched first.
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2012-11-20 22:20:30 +08:00
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*/
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struct regmap_access_table {
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const struct regmap_range *yes_ranges;
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unsigned int n_yes_ranges;
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const struct regmap_range *no_ranges;
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unsigned int n_no_ranges;
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};
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2012-10-16 21:56:59 +08:00
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typedef void (*regmap_lock)(void *);
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typedef void (*regmap_unlock)(void *);
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2011-07-21 05:28:58 +08:00
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/**
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2017-01-12 19:17:39 +08:00
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* struct regmap_config - Configuration for the register map of a device.
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2011-07-21 05:28:58 +08:00
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*
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2012-04-05 05:48:29 +08:00
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* @name: Optional name of the regmap. Useful when a device has multiple
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* register regions.
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*
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2011-07-21 05:28:58 +08:00
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* @reg_bits: Number of bits in a register address, mandatory.
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2012-04-10 03:40:24 +08:00
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* @reg_stride: The register address stride. Valid register addresses are a
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* multiple of this value. If set to 0, a value of 1 will be
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* used.
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2023-04-07 23:26:04 +08:00
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* @reg_shift: The number of bits to shift the register before performing any
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* operations. Any positive number will be downshifted, and negative
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* values will be upshifted
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2022-03-14 06:45:24 +08:00
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* @reg_base: Value to be added to every register address before performing any
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* operation.
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2012-01-18 18:52:25 +08:00
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* @pad_bits: Number of bits of padding between register and value.
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2011-07-21 05:28:58 +08:00
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* @val_bits: Number of bits in a register value, mandatory.
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2011-07-21 05:33:39 +08:00
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*
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2011-08-09 09:23:22 +08:00
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* @writeable_reg: Optional callback returning true if the register
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2012-11-20 22:20:30 +08:00
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* can be written to. If this field is NULL but wr_table
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* (see below) is not, the check is performed on such table
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* (a register is writeable if it belongs to one of the ranges
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* specified by wr_table).
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2011-08-09 09:23:22 +08:00
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* @readable_reg: Optional callback returning true if the register
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2012-11-20 22:20:30 +08:00
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* can be read from. If this field is NULL but rd_table
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* (see below) is not, the check is performed on such table
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* (a register is readable if it belongs to one of the ranges
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* specified by rd_table).
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2011-08-09 09:23:22 +08:00
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* @volatile_reg: Optional callback returning true if the register
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2012-11-20 22:20:30 +08:00
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* value can't be cached. If this field is NULL but
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* volatile_table (see below) is not, the check is performed on
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* such table (a register is volatile if it belongs to one of
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* the ranges specified by volatile_table).
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2014-01-09 22:13:41 +08:00
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* @precious_reg: Optional callback returning true if the register
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2012-11-20 22:20:30 +08:00
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* should not be read outside of a call from the driver
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2014-01-09 22:13:41 +08:00
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* (e.g., a clear on read interrupt status register). If this
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2012-11-20 22:20:30 +08:00
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* field is NULL but precious_table (see below) is not, the
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* check is performed on such table (a register is precious if
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* it belongs to one of the ranges specified by precious_table).
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2018-10-19 17:33:50 +08:00
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* @writeable_noinc_reg: Optional callback returning true if the register
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|
|
* supports multiple write operations without incrementing
|
|
|
|
* the register number. If this field is NULL but
|
|
|
|
* wr_noinc_table (see below) is not, the check is
|
|
|
|
* performed on such table (a register is no increment
|
|
|
|
* writeable if it belongs to one of the ranges specified
|
|
|
|
* by wr_noinc_table).
|
2018-08-07 22:52:17 +08:00
|
|
|
* @readable_noinc_reg: Optional callback returning true if the register
|
|
|
|
* supports multiple read operations without incrementing
|
|
|
|
* the register number. If this field is NULL but
|
|
|
|
* rd_noinc_table (see below) is not, the check is
|
|
|
|
* performed on such table (a register is no increment
|
|
|
|
* readable if it belongs to one of the ranges specified
|
|
|
|
* by rd_noinc_table).
|
2017-12-06 22:26:21 +08:00
|
|
|
* @disable_locking: This regmap is either protected by external means or
|
2020-07-16 09:30:12 +08:00
|
|
|
* is guaranteed not to be accessed from multiple threads.
|
2017-12-06 22:26:21 +08:00
|
|
|
* Don't use any locking mechanisms.
|
2012-11-20 22:20:30 +08:00
|
|
|
* @lock: Optional lock callback (overrides regmap's default lock
|
|
|
|
* function, based on spinlock or mutex).
|
|
|
|
* @unlock: As above for unlocking.
|
|
|
|
* @lock_arg: this field is passed as the only argument of lock/unlock
|
|
|
|
* functions (ignored in case regular lock/unlock functions
|
|
|
|
* are not overridden).
|
2013-01-28 02:49:05 +08:00
|
|
|
* @reg_read: Optional callback that if filled will be used to perform
|
|
|
|
* all the reads from the registers. Should only be provided for
|
2014-01-09 22:13:41 +08:00
|
|
|
* devices whose read operation cannot be represented as a simple
|
|
|
|
* read operation on a bus such as SPI, I2C, etc. Most of the
|
|
|
|
* devices do not need this.
|
2013-01-28 02:49:05 +08:00
|
|
|
* @reg_write: Same as above for writing.
|
2021-11-04 23:00:40 +08:00
|
|
|
* @reg_update_bits: Optional callback that if filled will be used to perform
|
|
|
|
* all the update_bits(rmw) operation. Should only be provided
|
|
|
|
* if the function require special handling with lock and reg
|
|
|
|
* handling and the operation cannot be represented as a simple
|
|
|
|
* update_bits operation on a bus such as SPI, I2C, etc.
|
2022-04-30 10:51:44 +08:00
|
|
|
* @read: Optional callback that if filled will be used to perform all the
|
|
|
|
* bulk reads from the registers. Data is returned in the buffer used
|
|
|
|
* to transmit data.
|
|
|
|
* @write: Same as above for writing.
|
|
|
|
* @max_raw_read: Max raw read size that can be used on the device.
|
|
|
|
* @max_raw_write: Max raw write size that can be used on the device.
|
2013-01-28 02:49:05 +08:00
|
|
|
* @fast_io: Register IO is fast. Use a spinlock instead of a mutex
|
|
|
|
* to perform locking. This field is ignored if custom lock/unlock
|
|
|
|
* functions are used (see fields lock/unlock of struct regmap_config).
|
|
|
|
* This field is a duplicate of a similar file in
|
|
|
|
* 'struct regmap_bus' and serves exact same purpose.
|
|
|
|
* Use it only for "no-bus" cases.
|
2022-08-09 04:33:59 +08:00
|
|
|
* @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port
|
|
|
|
* access can be distinguished.
|
2016-01-20 09:14:39 +08:00
|
|
|
* @max_register: Optional, specifies the maximum valid register address.
|
2012-11-20 22:20:30 +08:00
|
|
|
* @wr_table: Optional, points to a struct regmap_access_table specifying
|
|
|
|
* valid ranges for write access.
|
|
|
|
* @rd_table: As above, for read access.
|
|
|
|
* @volatile_table: As above, for volatile registers.
|
|
|
|
* @precious_table: As above, for precious registers.
|
2018-10-19 17:33:50 +08:00
|
|
|
* @wr_noinc_table: As above, for no increment writeable registers.
|
2018-08-07 22:52:17 +08:00
|
|
|
* @rd_noinc_table: As above, for no increment readable registers.
|
2011-08-19 17:09:38 +08:00
|
|
|
* @reg_defaults: Power on reset values for registers (for use with
|
|
|
|
* register cache support).
|
|
|
|
* @num_reg_defaults: Number of elements in reg_defaults.
|
2011-09-06 02:46:32 +08:00
|
|
|
*
|
2016-09-16 04:56:10 +08:00
|
|
|
* @read_flag_mask: Mask to be set in the top bytes of the register when doing
|
2011-09-06 02:46:32 +08:00
|
|
|
* a read.
|
2016-09-16 04:56:10 +08:00
|
|
|
* @write_flag_mask: Mask to be set in the top bytes of the register when doing
|
2011-09-06 02:46:32 +08:00
|
|
|
* a write. If both read_flag_mask and write_flag_mask are
|
2018-01-08 07:19:09 +08:00
|
|
|
* empty and zero_flag_mask is not set the regmap_bus default
|
|
|
|
* masks are used.
|
|
|
|
* @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
|
|
|
|
* if they are both empty.
|
2020-10-15 04:30:24 +08:00
|
|
|
* @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
|
|
|
|
* This can avoid load on devices which don't require strict
|
|
|
|
* orderings, but drivers should carefully add any explicit
|
|
|
|
* memory barriers when they may require them.
|
2018-09-02 00:50:41 +08:00
|
|
|
* @use_single_read: If set, converts the bulk read operation into a series of
|
|
|
|
* single read operations. This is useful for a device that
|
|
|
|
* does not support bulk read.
|
|
|
|
* @use_single_write: If set, converts the bulk write operation into a series of
|
|
|
|
* single write operations. This is useful for a device that
|
|
|
|
* does not support bulk write.
|
2014-03-04 21:54:02 +08:00
|
|
|
* @can_multi_write: If set, the device supports the multi write mode of bulk
|
|
|
|
* write operations, if clear multi write requests will be
|
|
|
|
* split into individual write operations
|
2011-09-19 21:34:00 +08:00
|
|
|
*
|
|
|
|
* @cache_type: The actual cache type.
|
|
|
|
* @reg_defaults_raw: Power on reset values for registers (for use with
|
|
|
|
* register cache support).
|
|
|
|
* @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
|
2012-05-25 00:47:26 +08:00
|
|
|
* @reg_format_endian: Endianness for formatted register addresses. If this is
|
|
|
|
* DEFAULT, the @reg_format_endian_default value from the
|
|
|
|
* regmap bus is used.
|
|
|
|
* @val_format_endian: Endianness for formatted register values. If this is
|
|
|
|
* DEFAULT, the @reg_format_endian_default value from the
|
|
|
|
* regmap bus is used.
|
2012-06-15 18:23:56 +08:00
|
|
|
*
|
|
|
|
* @ranges: Array of configuration entries for virtual address ranges.
|
|
|
|
* @num_ranges: Number of range configuration entries.
|
2017-12-25 14:37:09 +08:00
|
|
|
* @use_hwlock: Indicate if a hardware spinlock should be used.
|
2021-08-26 04:50:40 +08:00
|
|
|
* @use_raw_spinlock: Indicate if a raw spinlock should be used.
|
2017-11-01 10:11:55 +08:00
|
|
|
* @hwlock_id: Specify the hardware spinlock id.
|
|
|
|
* @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
|
|
|
|
* HWLOCK_IRQ or 0.
|
2020-09-02 22:18:43 +08:00
|
|
|
* @can_sleep: Optional, specifies whether regmap operations can sleep.
|
2011-07-21 05:28:58 +08:00
|
|
|
*/
|
2011-05-12 01:59:58 +08:00
|
|
|
struct regmap_config {
|
2012-04-05 05:48:29 +08:00
|
|
|
const char *name;
|
|
|
|
|
2011-05-12 01:59:58 +08:00
|
|
|
int reg_bits;
|
2012-04-10 03:40:24 +08:00
|
|
|
int reg_stride;
|
2023-04-07 23:26:04 +08:00
|
|
|
int reg_shift;
|
2022-03-14 06:45:24 +08:00
|
|
|
unsigned int reg_base;
|
2012-01-18 18:52:25 +08:00
|
|
|
int pad_bits;
|
2011-05-12 01:59:58 +08:00
|
|
|
int val_bits;
|
2011-07-21 05:33:39 +08:00
|
|
|
|
|
|
|
bool (*writeable_reg)(struct device *dev, unsigned int reg);
|
|
|
|
bool (*readable_reg)(struct device *dev, unsigned int reg);
|
|
|
|
bool (*volatile_reg)(struct device *dev, unsigned int reg);
|
2011-08-08 14:40:22 +08:00
|
|
|
bool (*precious_reg)(struct device *dev, unsigned int reg);
|
2018-10-19 17:33:50 +08:00
|
|
|
bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
|
2018-08-07 22:52:17 +08:00
|
|
|
bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
|
2017-12-06 22:26:21 +08:00
|
|
|
|
|
|
|
bool disable_locking;
|
2012-10-16 21:56:59 +08:00
|
|
|
regmap_lock lock;
|
|
|
|
regmap_unlock unlock;
|
|
|
|
void *lock_arg;
|
2011-08-19 17:09:38 +08:00
|
|
|
|
2013-01-28 02:49:05 +08:00
|
|
|
int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
|
|
|
|
int (*reg_write)(void *context, unsigned int reg, unsigned int val);
|
2021-11-04 23:00:40 +08:00
|
|
|
int (*reg_update_bits)(void *context, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val);
|
2022-04-30 10:51:44 +08:00
|
|
|
/* Bulk read/write */
|
|
|
|
int (*read)(void *context, const void *reg_buf, size_t reg_size,
|
|
|
|
void *val_buf, size_t val_size);
|
|
|
|
int (*write)(void *context, const void *data, size_t count);
|
|
|
|
size_t max_raw_read;
|
|
|
|
size_t max_raw_write;
|
2013-01-28 02:49:05 +08:00
|
|
|
|
|
|
|
bool fast_io;
|
2022-08-09 04:33:59 +08:00
|
|
|
bool io_port;
|
2013-01-28 02:49:05 +08:00
|
|
|
|
2011-08-19 17:09:38 +08:00
|
|
|
unsigned int max_register;
|
2012-11-20 22:20:30 +08:00
|
|
|
const struct regmap_access_table *wr_table;
|
|
|
|
const struct regmap_access_table *rd_table;
|
|
|
|
const struct regmap_access_table *volatile_table;
|
|
|
|
const struct regmap_access_table *precious_table;
|
2018-10-19 17:33:50 +08:00
|
|
|
const struct regmap_access_table *wr_noinc_table;
|
2018-08-07 22:52:17 +08:00
|
|
|
const struct regmap_access_table *rd_noinc_table;
|
2011-11-16 23:28:17 +08:00
|
|
|
const struct reg_default *reg_defaults;
|
2011-09-19 21:34:00 +08:00
|
|
|
unsigned int num_reg_defaults;
|
|
|
|
enum regcache_type cache_type;
|
|
|
|
const void *reg_defaults_raw;
|
|
|
|
unsigned int num_reg_defaults_raw;
|
2011-09-06 02:46:32 +08:00
|
|
|
|
2016-09-16 04:56:10 +08:00
|
|
|
unsigned long read_flag_mask;
|
|
|
|
unsigned long write_flag_mask;
|
2018-01-08 07:19:09 +08:00
|
|
|
bool zero_flag_mask;
|
2012-05-01 06:23:40 +08:00
|
|
|
|
2018-09-02 00:50:41 +08:00
|
|
|
bool use_single_read;
|
|
|
|
bool use_single_write;
|
2020-10-15 04:30:24 +08:00
|
|
|
bool use_relaxed_mmio;
|
2014-03-04 21:54:02 +08:00
|
|
|
bool can_multi_write;
|
2012-05-25 00:47:26 +08:00
|
|
|
|
|
|
|
enum regmap_endian reg_format_endian;
|
|
|
|
enum regmap_endian val_format_endian;
|
2012-07-23 02:26:07 +08:00
|
|
|
|
2012-06-15 18:23:56 +08:00
|
|
|
const struct regmap_range_cfg *ranges;
|
2012-10-03 03:17:15 +08:00
|
|
|
unsigned int num_ranges;
|
2017-11-01 10:11:55 +08:00
|
|
|
|
2017-12-25 14:37:09 +08:00
|
|
|
bool use_hwlock;
|
2021-08-26 04:50:40 +08:00
|
|
|
bool use_raw_spinlock;
|
2017-11-01 10:11:55 +08:00
|
|
|
unsigned int hwlock_id;
|
|
|
|
unsigned int hwlock_mode;
|
2020-09-02 22:18:43 +08:00
|
|
|
|
|
|
|
bool can_sleep;
|
2012-06-15 18:23:56 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* struct regmap_range_cfg - Configuration for indirectly accessed or paged
|
|
|
|
* registers.
|
2012-06-15 18:23:56 +08:00
|
|
|
*
|
2012-10-03 19:40:47 +08:00
|
|
|
* @name: Descriptive name for diagnostics
|
|
|
|
*
|
2012-06-15 18:23:56 +08:00
|
|
|
* @range_min: Address of the lowest register address in virtual range.
|
|
|
|
* @range_max: Address of the highest register in virtual range.
|
|
|
|
*
|
2017-01-12 19:17:39 +08:00
|
|
|
* @selector_reg: Register with selector field.
|
2020-02-19 22:09:06 +08:00
|
|
|
* @selector_mask: Bit mask for selector value.
|
|
|
|
* @selector_shift: Bit shift for selector value.
|
2012-06-15 18:23:56 +08:00
|
|
|
*
|
|
|
|
* @window_start: Address of first (lowest) register in data window.
|
|
|
|
* @window_len: Number of registers in data window.
|
2017-01-12 19:17:39 +08:00
|
|
|
*
|
|
|
|
* Registers, mapped to this virtual range, are accessed in two steps:
|
|
|
|
* 1. page selector register update;
|
|
|
|
* 2. access through data window registers.
|
2012-06-15 18:23:56 +08:00
|
|
|
*/
|
|
|
|
struct regmap_range_cfg {
|
2012-10-03 19:40:47 +08:00
|
|
|
const char *name;
|
|
|
|
|
2012-06-15 18:23:56 +08:00
|
|
|
/* Registers of virtual address range */
|
|
|
|
unsigned int range_min;
|
|
|
|
unsigned int range_max;
|
|
|
|
|
|
|
|
/* Page selector for indirect addressing */
|
|
|
|
unsigned int selector_reg;
|
|
|
|
unsigned int selector_mask;
|
|
|
|
int selector_shift;
|
|
|
|
|
|
|
|
/* Data window (per each page) */
|
|
|
|
unsigned int window_start;
|
|
|
|
unsigned int window_len;
|
2011-05-12 01:59:58 +08:00
|
|
|
};
|
|
|
|
|
2013-01-27 22:07:38 +08:00
|
|
|
struct regmap_async;
|
|
|
|
|
2012-04-05 05:48:30 +08:00
|
|
|
typedef int (*regmap_hw_write)(void *context, const void *data,
|
2011-05-12 01:59:58 +08:00
|
|
|
size_t count);
|
2012-04-05 05:48:30 +08:00
|
|
|
typedef int (*regmap_hw_gather_write)(void *context,
|
2011-05-12 01:59:58 +08:00
|
|
|
const void *reg, size_t reg_len,
|
|
|
|
const void *val, size_t val_len);
|
2013-01-27 22:07:38 +08:00
|
|
|
typedef int (*regmap_hw_async_write)(void *context,
|
|
|
|
const void *reg, size_t reg_len,
|
|
|
|
const void *val, size_t val_len,
|
|
|
|
struct regmap_async *async);
|
2012-04-05 05:48:30 +08:00
|
|
|
typedef int (*regmap_hw_read)(void *context,
|
2011-05-12 01:59:58 +08:00
|
|
|
const void *reg_buf, size_t reg_size,
|
|
|
|
void *val_buf, size_t val_size);
|
2014-04-17 17:40:11 +08:00
|
|
|
typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
|
|
|
|
unsigned int *val);
|
2022-08-17 04:48:31 +08:00
|
|
|
typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
|
|
|
|
void *val, size_t val_count);
|
2014-04-17 17:40:11 +08:00
|
|
|
typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
|
|
|
|
unsigned int val);
|
2022-08-17 04:48:31 +08:00
|
|
|
typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
|
|
|
|
const void *val, size_t val_count);
|
2015-10-02 00:38:07 +08:00
|
|
|
typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val);
|
2013-01-27 22:07:38 +08:00
|
|
|
typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
|
2012-04-05 05:48:30 +08:00
|
|
|
typedef void (*regmap_hw_free_context)(void *context);
|
2011-05-12 01:59:58 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* struct regmap_bus - Description of a hardware bus for the register map
|
|
|
|
* infrastructure.
|
2011-05-12 01:59:58 +08:00
|
|
|
*
|
2012-04-05 05:48:28 +08:00
|
|
|
* @fast_io: Register IO is fast. Use a spinlock instead of a mutex
|
2012-10-16 21:56:59 +08:00
|
|
|
* to perform locking. This field is ignored if custom lock/unlock
|
|
|
|
* functions are used (see fields lock/unlock of
|
|
|
|
* struct regmap_config).
|
2023-02-14 16:40:14 +08:00
|
|
|
* @free_on_exit: kfree this on exit of regmap
|
2011-05-12 01:59:58 +08:00
|
|
|
* @write: Write operation.
|
|
|
|
* @gather_write: Write operation with split register/value, return -ENOTSUPP
|
|
|
|
* if not implemented on a given device.
|
2013-01-27 22:07:38 +08:00
|
|
|
* @async_write: Write operation which completes asynchronously, optional and
|
|
|
|
* must serialise with respect to non-async I/O.
|
2015-08-21 16:26:40 +08:00
|
|
|
* @reg_write: Write a single register value to the given register address. This
|
|
|
|
* write operation has to complete when returning from the function.
|
2022-08-17 04:48:31 +08:00
|
|
|
* @reg_write_noinc: Write multiple register value to the same register. This
|
|
|
|
* write operation has to complete when returning from the function.
|
2017-01-12 19:17:39 +08:00
|
|
|
* @reg_update_bits: Update bits operation to be used against volatile
|
|
|
|
* registers, intended for devices supporting some mechanism
|
|
|
|
* for setting clearing bits without having to
|
|
|
|
* read/modify/write.
|
2011-05-12 01:59:58 +08:00
|
|
|
* @read: Read operation. Data is returned in the buffer used to transmit
|
|
|
|
* data.
|
2015-08-21 16:26:40 +08:00
|
|
|
* @reg_read: Read a single register value from a given register address.
|
|
|
|
* @free_context: Free context.
|
2013-01-27 22:07:38 +08:00
|
|
|
* @async_alloc: Allocate a regmap_async() structure.
|
2011-05-12 01:59:58 +08:00
|
|
|
* @read_flag_mask: Mask to be set in the top byte of the register when doing
|
|
|
|
* a read.
|
2012-05-25 00:47:26 +08:00
|
|
|
* @reg_format_endian_default: Default endianness for formatted register
|
|
|
|
* addresses. Used when the regmap_config specifies DEFAULT. If this is
|
|
|
|
* DEFAULT, BIG is assumed.
|
|
|
|
* @val_format_endian_default: Default endianness for formatted register
|
|
|
|
* values. Used when the regmap_config specifies DEFAULT. If this is
|
|
|
|
* DEFAULT, BIG is assumed.
|
2015-08-30 15:33:53 +08:00
|
|
|
* @max_raw_read: Max raw read size that can be used on the bus.
|
|
|
|
* @max_raw_write: Max raw write size that can be used on the bus.
|
2011-05-12 01:59:58 +08:00
|
|
|
*/
|
|
|
|
struct regmap_bus {
|
2012-04-05 05:48:28 +08:00
|
|
|
bool fast_io;
|
2023-02-14 16:40:14 +08:00
|
|
|
bool free_on_exit;
|
2011-05-12 01:59:58 +08:00
|
|
|
regmap_hw_write write;
|
|
|
|
regmap_hw_gather_write gather_write;
|
2013-01-27 22:07:38 +08:00
|
|
|
regmap_hw_async_write async_write;
|
2014-04-17 17:40:11 +08:00
|
|
|
regmap_hw_reg_write reg_write;
|
2022-08-17 04:48:31 +08:00
|
|
|
regmap_hw_reg_noinc_write reg_noinc_write;
|
2015-10-02 00:38:07 +08:00
|
|
|
regmap_hw_reg_update_bits reg_update_bits;
|
2011-05-12 01:59:58 +08:00
|
|
|
regmap_hw_read read;
|
2014-04-17 17:40:11 +08:00
|
|
|
regmap_hw_reg_read reg_read;
|
2022-08-17 04:48:31 +08:00
|
|
|
regmap_hw_reg_noinc_read reg_noinc_read;
|
2012-04-05 05:48:30 +08:00
|
|
|
regmap_hw_free_context free_context;
|
2013-01-27 22:07:38 +08:00
|
|
|
regmap_hw_async_alloc async_alloc;
|
2011-05-12 01:59:58 +08:00
|
|
|
u8 read_flag_mask;
|
2012-05-25 00:47:26 +08:00
|
|
|
enum regmap_endian reg_format_endian_default;
|
|
|
|
enum regmap_endian val_format_endian_default;
|
2015-08-30 15:33:53 +08:00
|
|
|
size_t max_raw_read;
|
|
|
|
size_t max_raw_write;
|
2011-05-12 01:59:58 +08:00
|
|
|
};
|
|
|
|
|
2015-07-08 14:30:18 +08:00
|
|
|
/*
|
|
|
|
* __regmap_init functions.
|
|
|
|
*
|
|
|
|
* These functions take a lock key and name parameter, and should not be called
|
|
|
|
* directly. Instead, use the regmap_init macros that generate a key and name
|
|
|
|
* for each call.
|
|
|
|
*/
|
|
|
|
struct regmap *__regmap_init(struct device *dev,
|
|
|
|
const struct regmap_bus *bus,
|
|
|
|
void *bus_context,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2021-05-18 03:28:03 +08:00
|
|
|
struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2018-07-16 23:47:48 +08:00
|
|
|
struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2017-12-12 07:43:02 +08:00
|
|
|
struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2015-07-08 14:30:18 +08:00
|
|
|
struct regmap *__regmap_init_spi(struct spi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2017-06-02 15:06:27 +08:00
|
|
|
struct regmap *__regmap_init_w1(struct device *w1_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2015-07-08 14:30:18 +08:00
|
|
|
struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
|
|
|
|
void __iomem *regs,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2018-01-08 18:20:59 +08:00
|
|
|
struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2020-11-04 01:22:23 +08:00
|
|
|
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2020-08-19 15:34:56 +08:00
|
|
|
struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2022-11-03 04:51:44 +08:00
|
|
|
struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2015-07-08 14:30:18 +08:00
|
|
|
|
|
|
|
struct regmap *__devm_regmap_init(struct device *dev,
|
|
|
|
const struct regmap_bus *bus,
|
|
|
|
void *bus_context,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2021-05-18 03:28:03 +08:00
|
|
|
struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2018-07-16 23:47:48 +08:00
|
|
|
struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2015-07-08 14:30:18 +08:00
|
|
|
struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2017-06-02 15:06:27 +08:00
|
|
|
struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2015-07-08 14:30:18 +08:00
|
|
|
struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
|
|
|
|
const char *clk_id,
|
|
|
|
void __iomem *regs,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2018-01-08 18:20:59 +08:00
|
|
|
struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2020-11-04 01:22:23 +08:00
|
|
|
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2018-05-25 21:50:36 +08:00
|
|
|
struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2019-06-06 23:12:02 +08:00
|
|
|
struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2020-08-19 15:34:56 +08:00
|
|
|
struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
2022-11-03 04:51:44 +08:00
|
|
|
struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev,
|
|
|
|
const struct regmap_config *config,
|
|
|
|
struct lock_class_key *lock_key,
|
|
|
|
const char *lock_name);
|
|
|
|
|
2015-07-08 14:30:18 +08:00
|
|
|
/*
|
|
|
|
* Wrapper for regmap_init macros to include a unique lockdep key and name
|
|
|
|
* for each call. No-op if CONFIG_LOCKDEP is not set.
|
|
|
|
*
|
|
|
|
* @fn: Real function to call (in the form __[*_]regmap_init[_*])
|
|
|
|
* @name: Config variable name (#config in the calling macro)
|
|
|
|
**/
|
|
|
|
#ifdef CONFIG_LOCKDEP
|
|
|
|
#define __regmap_lockdep_wrapper(fn, name, ...) \
|
|
|
|
( \
|
|
|
|
({ \
|
|
|
|
static struct lock_class_key _key; \
|
|
|
|
fn(__VA_ARGS__, &_key, \
|
|
|
|
KBUILD_BASENAME ":" \
|
|
|
|
__stringify(__LINE__) ":" \
|
|
|
|
"(" name ")->lock"); \
|
|
|
|
}) \
|
|
|
|
)
|
|
|
|
#else
|
|
|
|
#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
|
|
|
|
#endif
|
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init() - Initialise register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
|
|
|
* @bus: Bus-specific callbacks to use with device
|
|
|
|
* @bus_context: Data passed to bus-specific callbacks
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap. This function should generally not be called
|
|
|
|
* directly, it should be called by bus-specific init functions.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init(dev, bus, bus_context, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init, #config, \
|
|
|
|
dev, bus, bus_context, config)
|
2014-02-10 23:22:33 +08:00
|
|
|
int regmap_attach_dev(struct device *dev, struct regmap *map,
|
2015-07-08 14:30:18 +08:00
|
|
|
const struct regmap_config *config);
|
2014-11-19 02:45:51 +08:00
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_i2c() - Initialise register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @i2c: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_i2c(i2c, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
|
|
|
|
i2c, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
2021-05-18 03:28:03 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_mdio() - Initialise register map
|
|
|
|
*
|
|
|
|
* @mdio_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_mdio(mdio_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
|
|
|
|
mdio_dev, config)
|
|
|
|
|
2018-07-16 23:47:48 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_sccb() - Initialise register map
|
|
|
|
*
|
|
|
|
* @i2c: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_sccb(i2c, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
|
|
|
|
i2c, config)
|
|
|
|
|
2017-12-12 07:43:02 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_slimbus() - Initialise register map
|
|
|
|
*
|
|
|
|
* @slimbus: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_slimbus(slimbus, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
|
|
|
|
slimbus, config)
|
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_spi() - Initialise register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
2017-01-12 19:17:39 +08:00
|
|
|
* @dev: Device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_spi(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_spi, #config, \
|
|
|
|
dev, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_spmi_base() - Create regmap for the Base register space
|
|
|
|
*
|
|
|
|
* @dev: SPMI device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_spmi_base(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
|
|
|
|
dev, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_spmi_ext() - Create regmap for Ext register space
|
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_spmi_ext(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
|
|
|
|
dev, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
2017-06-02 15:06:27 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_w1() - Initialise register map
|
|
|
|
*
|
|
|
|
* @w1_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_w1(w1_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_w1, #config, \
|
|
|
|
w1_dev, config)
|
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_mmio_clk() - Initialise register map with register clock
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
|
|
|
* @clk_id: register clock consumer ID
|
|
|
|
* @regs: Pointer to memory-mapped IO region
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
|
|
|
|
dev, clk_id, regs, config)
|
2013-02-15 00:39:08 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_mmio() - Initialise register map
|
2013-02-15 00:39:08 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
|
|
|
* @regs: Pointer to memory-mapped IO region
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-08-11 18:04:21 +08:00
|
|
|
#define regmap_init_mmio(dev, regs, config) \
|
|
|
|
regmap_init_mmio_clk(dev, NULL, regs, config)
|
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* regmap_init_ac97() - Initialise AC'97 register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @ac97: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define regmap_init_ac97(ac97, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
|
|
|
|
ac97, config)
|
2014-11-19 02:45:51 +08:00
|
|
|
bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
|
2013-02-15 00:39:08 +08:00
|
|
|
|
2018-01-08 18:20:59 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_sdw() - Initialise register map
|
|
|
|
*
|
|
|
|
* @sdw: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_sdw(sdw, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
|
|
|
|
sdw, config)
|
|
|
|
|
2020-11-04 01:22:23 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_sdw_mbq() - Initialise register map
|
|
|
|
*
|
|
|
|
* @sdw: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_sdw_mbq(sdw, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
|
|
|
|
sdw, config)
|
|
|
|
|
2020-08-19 15:34:56 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
|
|
|
|
* to AVMM Bus Bridge
|
|
|
|
*
|
|
|
|
* @spi: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_spi_avmm(spi, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
|
|
|
|
spi, config)
|
2018-01-08 18:20:59 +08:00
|
|
|
|
2022-11-03 04:51:44 +08:00
|
|
|
/**
|
|
|
|
* regmap_init_fsi() - Initialise register map
|
|
|
|
*
|
|
|
|
* @fsi_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer to
|
|
|
|
* a struct regmap.
|
|
|
|
*/
|
|
|
|
#define regmap_init_fsi(fsi_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \
|
|
|
|
config)
|
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init() - Initialise managed register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
|
|
|
* @bus: Bus-specific callbacks to use with device
|
|
|
|
* @bus_context: Data passed to bus-specific callbacks
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. This function should generally not be called
|
|
|
|
* directly, it should be called by bus-specific init functions. The
|
|
|
|
* map will be automatically freed by the device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init(dev, bus, bus_context, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init, #config, \
|
|
|
|
dev, bus, bus_context, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_i2c() - Initialise managed register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @i2c: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init_i2c(i2c, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
|
|
|
|
i2c, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
2021-05-18 03:28:03 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_mdio() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @mdio_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_mdio(mdio_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
|
|
|
|
mdio_dev, config)
|
|
|
|
|
2018-07-16 23:47:48 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_sccb() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @i2c: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_sccb(i2c, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
|
|
|
|
i2c, config)
|
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_spi() - Initialise register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
2017-01-12 19:17:39 +08:00
|
|
|
* @dev: Device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The map will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init_spi(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
|
|
|
|
dev, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_spmi_base() - Create managed regmap for Base register space
|
|
|
|
*
|
|
|
|
* @dev: SPMI device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init_spmi_base(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
|
|
|
|
dev, config)
|
2015-08-11 18:04:21 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
|
|
|
|
*
|
|
|
|
* @dev: SPMI device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init_spmi_ext(dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
|
|
|
|
dev, config)
|
|
|
|
|
2017-06-02 15:06:27 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_w1() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @w1_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_w1(w1_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
|
|
|
|
w1_dev, config)
|
2013-02-15 00:39:08 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_mmio_clk() - Initialise managed register map with clock
|
2013-02-15 00:39:08 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
2015-08-11 18:04:21 +08:00
|
|
|
* @clk_id: register clock consumer ID
|
2013-02-15 00:39:08 +08:00
|
|
|
* @regs: Pointer to memory-mapped IO region
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
2015-08-11 18:04:21 +08:00
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
2013-02-15 00:39:08 +08:00
|
|
|
*/
|
2015-08-11 18:04:21 +08:00
|
|
|
#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
|
|
|
|
dev, clk_id, regs, config)
|
2013-02-15 00:39:08 +08:00
|
|
|
|
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_mmio() - Initialise managed register map
|
2013-02-15 00:39:08 +08:00
|
|
|
*
|
|
|
|
* @dev: Device that will be interacted with
|
|
|
|
* @regs: Pointer to memory-mapped IO region
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
2015-07-08 14:30:18 +08:00
|
|
|
#define devm_regmap_init_mmio(dev, regs, config) \
|
|
|
|
devm_regmap_init_mmio_clk(dev, NULL, regs, config)
|
2012-01-31 03:56:52 +08:00
|
|
|
|
2015-08-11 18:04:21 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* devm_regmap_init_ac97() - Initialise AC'97 register map
|
2015-08-11 18:04:21 +08:00
|
|
|
*
|
|
|
|
* @ac97: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_ac97(ac97, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
|
|
|
|
ac97, config)
|
2012-01-31 03:56:52 +08:00
|
|
|
|
2018-01-08 18:20:59 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_sdw() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @sdw: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_sdw(sdw, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
|
|
|
|
sdw, config)
|
|
|
|
|
2020-11-04 01:22:23 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_sdw_mbq() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @sdw: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_sdw_mbq(sdw, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
|
|
|
|
sdw, config)
|
|
|
|
|
2018-05-25 21:50:36 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_slimbus() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @slimbus: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_slimbus(slimbus, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
|
|
|
|
slimbus, config)
|
2019-06-06 23:12:02 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* devm_regmap_init_i3c() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @i3c: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_i3c(i3c, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
|
|
|
|
i3c, config)
|
|
|
|
|
2020-08-19 15:34:56 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
|
|
|
|
* to AVMM Bus Bridge
|
|
|
|
*
|
|
|
|
* @spi: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The map will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_spi_avmm(spi, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
|
|
|
|
spi, config)
|
|
|
|
|
2022-11-03 04:51:44 +08:00
|
|
|
/**
|
|
|
|
* devm_regmap_init_fsi() - Initialise managed register map
|
|
|
|
*
|
|
|
|
* @fsi_dev: Device that will be interacted with
|
|
|
|
* @config: Configuration for register map
|
|
|
|
*
|
|
|
|
* The return value will be an ERR_PTR() on error or a valid pointer
|
|
|
|
* to a struct regmap. The regmap will be automatically freed by the
|
|
|
|
* device management code.
|
|
|
|
*/
|
|
|
|
#define devm_regmap_init_fsi(fsi_dev, config) \
|
|
|
|
__regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \
|
|
|
|
fsi_dev, config)
|
|
|
|
|
2018-02-21 17:20:25 +08:00
|
|
|
int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
|
|
|
|
void regmap_mmio_detach_clk(struct regmap *map);
|
2011-05-12 01:59:58 +08:00
|
|
|
void regmap_exit(struct regmap *map);
|
2011-12-04 01:06:20 +08:00
|
|
|
int regmap_reinit_cache(struct regmap *map,
|
|
|
|
const struct regmap_config *config);
|
2012-05-09 00:44:40 +08:00
|
|
|
struct regmap *dev_get_regmap(struct device *dev, const char *name);
|
2014-07-21 23:38:47 +08:00
|
|
|
struct device *regmap_get_device(struct regmap *map);
|
2011-05-12 01:59:58 +08:00
|
|
|
int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
|
2013-10-09 20:30:10 +08:00
|
|
|
int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
|
2011-05-12 01:59:58 +08:00
|
|
|
int regmap_raw_write(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len);
|
2018-10-19 17:33:50 +08:00
|
|
|
int regmap_noinc_write(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len);
|
2012-02-12 22:19:43 +08:00
|
|
|
int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
|
|
|
|
size_t val_count);
|
2015-07-16 23:36:21 +08:00
|
|
|
int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
|
2013-10-11 22:31:11 +08:00
|
|
|
int num_regs);
|
2014-02-25 21:45:50 +08:00
|
|
|
int regmap_multi_reg_write_bypassed(struct regmap *map,
|
2015-07-16 23:36:21 +08:00
|
|
|
const struct reg_sequence *regs,
|
2014-02-25 21:45:50 +08:00
|
|
|
int num_regs);
|
2013-01-27 22:07:38 +08:00
|
|
|
int regmap_raw_write_async(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len);
|
2011-05-12 01:59:58 +08:00
|
|
|
int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
|
|
|
|
int regmap_raw_read(struct regmap *map, unsigned int reg,
|
|
|
|
void *val, size_t val_len);
|
2018-08-07 22:52:17 +08:00
|
|
|
int regmap_noinc_read(struct regmap *map, unsigned int reg,
|
|
|
|
void *val, size_t val_len);
|
2011-05-12 01:59:58 +08:00
|
|
|
int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
|
|
|
|
size_t val_count);
|
2016-02-15 13:22:18 +08:00
|
|
|
int regmap_update_bits_base(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force);
|
2020-06-15 15:23:13 +08:00
|
|
|
|
|
|
|
static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, mask, val,
|
|
|
|
change, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, mask, val,
|
|
|
|
change, true, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:20:14 +08:00
|
|
|
int regmap_get_val_bytes(struct regmap *map);
|
2015-05-22 00:42:43 +08:00
|
|
|
int regmap_get_max_register(struct regmap *map);
|
2015-05-22 00:42:54 +08:00
|
|
|
int regmap_get_reg_stride(struct regmap *map);
|
2022-11-21 23:08:42 +08:00
|
|
|
bool regmap_might_sleep(struct regmap *map);
|
2013-01-27 22:07:38 +08:00
|
|
|
int regmap_async_complete(struct regmap *map);
|
2013-03-27 05:24:20 +08:00
|
|
|
bool regmap_can_raw_write(struct regmap *map);
|
2015-08-30 15:33:54 +08:00
|
|
|
size_t regmap_get_raw_read_max(struct regmap *map);
|
|
|
|
size_t regmap_get_raw_write_max(struct regmap *map);
|
2011-05-12 01:59:58 +08:00
|
|
|
|
2011-09-20 01:21:49 +08:00
|
|
|
int regcache_sync(struct regmap *map);
|
2012-02-24 04:53:37 +08:00
|
|
|
int regcache_sync_region(struct regmap *map, unsigned int min,
|
|
|
|
unsigned int max);
|
2013-05-08 20:55:22 +08:00
|
|
|
int regcache_drop_region(struct regmap *map, unsigned int min,
|
|
|
|
unsigned int max);
|
2011-09-20 01:22:14 +08:00
|
|
|
void regcache_cache_only(struct regmap *map, bool enable);
|
2011-09-29 21:36:27 +08:00
|
|
|
void regcache_cache_bypass(struct regmap *map, bool enable);
|
2011-10-26 16:34:22 +08:00
|
|
|
void regcache_mark_dirty(struct regmap *map);
|
2011-09-20 01:22:14 +08:00
|
|
|
|
2013-05-08 20:55:23 +08:00
|
|
|
bool regmap_check_range_table(struct regmap *map, unsigned int reg,
|
|
|
|
const struct regmap_access_table *table);
|
|
|
|
|
2015-07-16 23:36:21 +08:00
|
|
|
int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
|
2012-01-21 20:01:14 +08:00
|
|
|
int num_regs);
|
2014-02-19 18:44:13 +08:00
|
|
|
int regmap_parse_val(struct regmap *map, const void *buf,
|
|
|
|
unsigned int *val);
|
2012-01-21 20:01:14 +08:00
|
|
|
|
2012-11-20 22:20:30 +08:00
|
|
|
static inline bool regmap_reg_in_range(unsigned int reg,
|
|
|
|
const struct regmap_range *range)
|
|
|
|
{
|
|
|
|
return reg >= range->range_min && reg <= range->range_max;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool regmap_reg_in_ranges(unsigned int reg,
|
|
|
|
const struct regmap_range *ranges,
|
|
|
|
unsigned int nranges);
|
|
|
|
|
2020-05-28 23:45:02 +08:00
|
|
|
static inline int regmap_set_bits(struct regmap *map,
|
|
|
|
unsigned int reg, unsigned int bits)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, bits, bits,
|
|
|
|
NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_clear_bits(struct regmap *map,
|
|
|
|
unsigned int reg, unsigned int bits)
|
|
|
|
{
|
|
|
|
return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
|
|
|
|
|
2013-06-11 20:18:15 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* struct reg_field - Description of an register field
|
2013-06-11 20:18:15 +08:00
|
|
|
*
|
|
|
|
* @reg: Offset of the register within the regmap bank
|
|
|
|
* @lsb: lsb of the register field.
|
2015-01-27 20:50:29 +08:00
|
|
|
* @msb: msb of the register field.
|
2013-09-02 11:30:50 +08:00
|
|
|
* @id_size: port size if it has some ports
|
|
|
|
* @id_offset: address offset for each ports
|
2013-06-11 20:18:15 +08:00
|
|
|
*/
|
|
|
|
struct reg_field {
|
|
|
|
unsigned int reg;
|
|
|
|
unsigned int lsb;
|
|
|
|
unsigned int msb;
|
2013-09-02 11:30:50 +08:00
|
|
|
unsigned int id_size;
|
|
|
|
unsigned int id_offset;
|
2013-06-11 20:18:15 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
#define REG_FIELD(_reg, _lsb, _msb) { \
|
|
|
|
.reg = _reg, \
|
|
|
|
.lsb = _lsb, \
|
|
|
|
.msb = _msb, \
|
|
|
|
}
|
|
|
|
|
2020-05-28 07:41:03 +08:00
|
|
|
#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
|
|
|
|
.reg = _reg, \
|
|
|
|
.lsb = _lsb, \
|
|
|
|
.msb = _msb, \
|
|
|
|
.id_size = _size, \
|
|
|
|
.id_offset = _offset, \
|
|
|
|
}
|
|
|
|
|
2013-06-11 20:18:15 +08:00
|
|
|
struct regmap_field *regmap_field_alloc(struct regmap *regmap,
|
|
|
|
struct reg_field reg_field);
|
|
|
|
void regmap_field_free(struct regmap_field *field);
|
|
|
|
|
|
|
|
struct regmap_field *devm_regmap_field_alloc(struct device *dev,
|
|
|
|
struct regmap *regmap, struct reg_field reg_field);
|
|
|
|
void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
|
|
|
|
|
2020-09-26 00:48:55 +08:00
|
|
|
int regmap_field_bulk_alloc(struct regmap *regmap,
|
|
|
|
struct regmap_field **rm_field,
|
2021-08-02 14:37:41 +08:00
|
|
|
const struct reg_field *reg_field,
|
2020-09-26 00:48:55 +08:00
|
|
|
int num_fields);
|
|
|
|
void regmap_field_bulk_free(struct regmap_field *field);
|
|
|
|
int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
|
|
|
|
struct regmap_field **field,
|
2021-08-02 14:37:41 +08:00
|
|
|
const struct reg_field *reg_field,
|
|
|
|
int num_fields);
|
2020-09-26 00:48:55 +08:00
|
|
|
void devm_regmap_field_bulk_free(struct device *dev,
|
|
|
|
struct regmap_field *field);
|
|
|
|
|
2013-06-11 20:18:15 +08:00
|
|
|
int regmap_field_read(struct regmap_field *field, unsigned int *val);
|
2016-02-15 13:23:55 +08:00
|
|
|
int regmap_field_update_bits_base(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force);
|
2013-09-02 11:30:50 +08:00
|
|
|
int regmap_fields_read(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int *val);
|
2016-02-15 13:24:51 +08:00
|
|
|
int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force);
|
2020-06-15 15:23:13 +08:00
|
|
|
|
|
|
|
static inline int regmap_field_write(struct regmap_field *field,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, ~0, val,
|
|
|
|
NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_force_write(struct regmap_field *field,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_update_bits(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, mask, val,
|
|
|
|
NULL, false, false);
|
|
|
|
}
|
|
|
|
|
2022-05-23 11:26:58 +08:00
|
|
|
static inline int regmap_field_set_bits(struct regmap_field *field,
|
|
|
|
unsigned int bits)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, bits, bits, NULL, false,
|
|
|
|
false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_clear_bits(struct regmap_field *field,
|
|
|
|
unsigned int bits)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, bits, 0, NULL, false,
|
|
|
|
false);
|
|
|
|
}
|
|
|
|
|
|
|
|
int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
|
|
|
|
|
2020-06-15 15:23:13 +08:00
|
|
|
static inline int
|
|
|
|
regmap_field_force_update_bits(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_field_update_bits_base(field, mask, val,
|
|
|
|
NULL, false, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_fields_write(struct regmap_field *field,
|
|
|
|
unsigned int id, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_fields_update_bits_base(field, id, ~0, val,
|
|
|
|
NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_fields_force_write(struct regmap_field *field,
|
|
|
|
unsigned int id, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_fields_update_bits_base(field, id, ~0, val,
|
|
|
|
NULL, false, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_fields_update_bits_base(field, id, mask, val,
|
|
|
|
NULL, false, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
return regmap_fields_update_bits_base(field, id, mask, val,
|
|
|
|
NULL, false, true);
|
|
|
|
}
|
|
|
|
|
2018-12-18 19:59:31 +08:00
|
|
|
/**
|
|
|
|
* struct regmap_irq_type - IRQ type definitions.
|
|
|
|
*
|
|
|
|
* @type_reg_offset: Offset register for the irq type setting.
|
|
|
|
* @type_rising_val: Register value to configure RISING type irq.
|
|
|
|
* @type_falling_val: Register value to configure FALLING type irq.
|
|
|
|
* @type_level_low_val: Register value to configure LEVEL_LOW type irq.
|
|
|
|
* @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
|
|
|
|
* @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
|
|
|
|
*/
|
|
|
|
struct regmap_irq_type {
|
|
|
|
unsigned int type_reg_offset;
|
|
|
|
unsigned int type_reg_mask;
|
|
|
|
unsigned int type_rising_val;
|
|
|
|
unsigned int type_falling_val;
|
|
|
|
unsigned int type_level_low_val;
|
|
|
|
unsigned int type_level_high_val;
|
|
|
|
unsigned int types_supported;
|
|
|
|
};
|
2012-11-20 22:20:30 +08:00
|
|
|
|
2011-10-29 05:50:49 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
|
2011-10-29 05:50:49 +08:00
|
|
|
*
|
|
|
|
* @reg_offset: Offset of the status/mask register within the bank
|
|
|
|
* @mask: Mask used to flag/control the register.
|
2018-12-18 19:59:31 +08:00
|
|
|
* @type: IRQ trigger type setting details if supported.
|
2011-10-29 05:50:49 +08:00
|
|
|
*/
|
|
|
|
struct regmap_irq {
|
|
|
|
unsigned int reg_offset;
|
|
|
|
unsigned int mask;
|
2018-12-18 19:59:31 +08:00
|
|
|
struct regmap_irq_type type;
|
2011-10-29 05:50:49 +08:00
|
|
|
};
|
|
|
|
|
2015-09-15 00:39:17 +08:00
|
|
|
#define REGMAP_IRQ_REG(_irq, _off, _mask) \
|
|
|
|
[_irq] = { .reg_offset = (_off), .mask = (_mask) }
|
|
|
|
|
2018-10-30 18:07:56 +08:00
|
|
|
#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
|
|
|
|
[_id] = { \
|
|
|
|
.mask = BIT((_id) % (_reg_bits)), \
|
|
|
|
.reg_offset = (_id) / (_reg_bits), \
|
|
|
|
}
|
|
|
|
|
2019-01-22 17:42:24 +08:00
|
|
|
#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
|
|
|
|
{ .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
|
|
|
|
|
|
|
|
struct regmap_irq_sub_irq_map {
|
|
|
|
unsigned int num_regs;
|
|
|
|
unsigned int *offset;
|
|
|
|
};
|
|
|
|
|
2022-06-24 05:14:19 +08:00
|
|
|
struct regmap_irq_chip_data;
|
|
|
|
|
2011-10-29 05:50:49 +08:00
|
|
|
/**
|
2017-01-12 19:17:39 +08:00
|
|
|
* struct regmap_irq_chip - Description of a generic regmap irq_chip.
|
2011-10-29 05:50:49 +08:00
|
|
|
*
|
|
|
|
* @name: Descriptive name for IRQ controller.
|
|
|
|
*
|
2019-01-22 17:42:24 +08:00
|
|
|
* @main_status: Base main status register address. For chips which have
|
|
|
|
* interrupts arranged in separate sub-irq blocks with own IRQ
|
|
|
|
* registers and which have a main IRQ registers indicating
|
|
|
|
* sub-irq blocks with unhandled interrupts. For such chips fill
|
|
|
|
* sub-irq register information in status_base, mask_base and
|
|
|
|
* ack_base.
|
|
|
|
* @num_main_status_bits: Should be given to chips where number of meaningfull
|
|
|
|
* main status bits differs from num_regs.
|
|
|
|
* @sub_reg_offsets: arrays of mappings from main register bits to sub irq
|
|
|
|
* registers. First item in array describes the registers
|
|
|
|
* for first main status bit. Second array for second bit etc.
|
|
|
|
* Offset is given as sub register status offset to
|
|
|
|
* status_base. Should contain num_regs arrays.
|
|
|
|
* Can be provided for chips with more complex mapping than
|
|
|
|
* 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
|
|
|
|
* @num_main_regs: Number of 'main status' irq registers for chips which have
|
|
|
|
* main_status set.
|
|
|
|
*
|
2011-10-29 05:50:49 +08:00
|
|
|
* @status_base: Base status register address.
|
2022-06-24 05:14:18 +08:00
|
|
|
* @mask_base: Base mask register address. Mask bits are set to 1 when an
|
|
|
|
* interrupt is masked, 0 when unmasked.
|
|
|
|
* @unmask_base: Base unmask register address. Unmask bits are set to 1 when
|
|
|
|
* an interrupt is unmasked and 0 when masked.
|
2013-12-15 17:36:51 +08:00
|
|
|
* @ack_base: Base ack address. If zero then the chip is clear on read.
|
|
|
|
* Using zero value is possible with @use_ack bit.
|
2012-06-05 21:34:03 +08:00
|
|
|
* @wake_base: Base address for wake enables. If zero unsupported.
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
* @config_base: Base address for IRQ type config regs. If null unsupported.
|
2012-05-14 21:40:43 +08:00
|
|
|
* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
|
2013-07-22 23:15:52 +08:00
|
|
|
* @init_ack_masked: Ack all masked interrupts once during initalization.
|
2022-06-24 05:14:18 +08:00
|
|
|
* @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
|
|
|
|
* both @mask_base and @unmask_base. If false, mask and unmask bits are
|
|
|
|
* inverted (which is deprecated behavior); if true, bits will not be
|
|
|
|
* inverted and the registers keep their normal behavior. Note that if
|
|
|
|
* you use only one of @mask_base or @unmask_base, this flag has no
|
|
|
|
* effect and is unnecessary. Any new drivers that set both @mask_base
|
|
|
|
* and @unmask_base should set this to true to avoid relying on the
|
|
|
|
* deprecated behavior.
|
2013-12-15 17:36:51 +08:00
|
|
|
* @use_ack: Use @ack register even if it is zero.
|
2015-09-17 13:23:21 +08:00
|
|
|
* @ack_invert: Inverted ack register: cleared bits for ack.
|
2020-10-05 22:17:19 +08:00
|
|
|
* @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
|
2023-02-20 23:33:34 +08:00
|
|
|
* @status_invert: Inverted status register: cleared bits are active interrupts.
|
2013-07-24 16:26:48 +08:00
|
|
|
* @wake_invert: Inverted wake register: cleared bits are wake enabled.
|
2022-06-24 05:14:12 +08:00
|
|
|
* @type_in_mask: Use the mask registers for controlling irq type. Use this if
|
|
|
|
* the hardware provides separate bits for rising/falling edge
|
|
|
|
* or low/high level interrupts and they should be combined into
|
|
|
|
* a single logical interrupt. Use &struct regmap_irq_type data
|
|
|
|
* to define the mask bit for each irq type.
|
2018-12-19 19:18:05 +08:00
|
|
|
* @clear_on_unmask: For chips with interrupts cleared on read: read the status
|
|
|
|
* registers before unmasking interrupts to clear any bits
|
|
|
|
* set when they were masked.
|
2023-02-20 23:33:34 +08:00
|
|
|
* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
|
2023-02-28 00:45:22 +08:00
|
|
|
* @no_status: No status register: all interrupts assumed generated by device.
|
2011-10-29 05:50:49 +08:00
|
|
|
*
|
|
|
|
* @num_regs: Number of registers in each control bank.
|
2023-02-20 23:33:34 +08:00
|
|
|
*
|
2011-10-29 05:50:49 +08:00
|
|
|
* @irqs: Descriptors for individual IRQs. Interrupt numbers are
|
|
|
|
* assigned based on the index in the array of the interrupt.
|
|
|
|
* @num_irqs: Number of descriptors.
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
* @num_config_bases: Number of config base registers.
|
|
|
|
* @num_config_regs: Number of config registers for each config base register.
|
2023-02-20 23:33:34 +08:00
|
|
|
*
|
2016-05-20 23:10:26 +08:00
|
|
|
* @handle_pre_irq: Driver specific callback to handle interrupt from device
|
|
|
|
* before regmap_irq_handler process the interrupts.
|
|
|
|
* @handle_post_irq: Driver specific callback to handle interrupt from device
|
|
|
|
* after handling the interrupts in regmap_irq_handler().
|
2022-11-22 15:10:59 +08:00
|
|
|
* @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be
|
|
|
|
* in the range [0, num_regs)
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
* @set_type_config: Callback used for configuring irq types.
|
2022-06-24 05:14:19 +08:00
|
|
|
* @get_irq_reg: Callback for mapping (base register, index) pairs to register
|
|
|
|
* addresses. The base register will be one of @status_base,
|
|
|
|
* @mask_base, etc., @main_status, or any of @config_base.
|
|
|
|
* The index will be in the range [0, num_main_regs[ for the
|
2023-05-09 19:00:55 +08:00
|
|
|
* main status base, [0, num_config_regs[ for any config
|
2022-06-24 05:14:19 +08:00
|
|
|
* register base, and [0, num_regs[ for any other base.
|
|
|
|
* If unspecified then regmap_irq_get_irq_reg_linear() is used.
|
2016-05-20 23:10:26 +08:00
|
|
|
* @irq_drv_data: Driver specific IRQ data which is passed as parameter when
|
|
|
|
* driver specific pre/post interrupt handler is called.
|
2017-01-12 19:17:39 +08:00
|
|
|
*
|
|
|
|
* This is not intended to handle every possible interrupt controller, but
|
|
|
|
* it should handle a substantial proportion of those that are found in the
|
|
|
|
* wild.
|
2011-10-29 05:50:49 +08:00
|
|
|
*/
|
|
|
|
struct regmap_irq_chip {
|
|
|
|
const char *name;
|
|
|
|
|
2019-01-22 17:42:24 +08:00
|
|
|
unsigned int main_status;
|
|
|
|
unsigned int num_main_status_bits;
|
|
|
|
struct regmap_irq_sub_irq_map *sub_reg_offsets;
|
|
|
|
int num_main_regs;
|
|
|
|
|
2011-10-29 05:50:49 +08:00
|
|
|
unsigned int status_base;
|
|
|
|
unsigned int mask_base;
|
2015-09-17 13:23:20 +08:00
|
|
|
unsigned int unmask_base;
|
2011-10-29 05:50:49 +08:00
|
|
|
unsigned int ack_base;
|
2012-06-05 21:34:03 +08:00
|
|
|
unsigned int wake_base;
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
const unsigned int *config_base;
|
2012-05-14 21:40:43 +08:00
|
|
|
unsigned int irq_reg_stride;
|
2022-06-24 05:14:09 +08:00
|
|
|
unsigned int init_ack_masked:1;
|
2022-06-24 05:14:18 +08:00
|
|
|
unsigned int mask_unmask_non_inverted:1;
|
2022-06-24 05:14:09 +08:00
|
|
|
unsigned int use_ack:1;
|
|
|
|
unsigned int ack_invert:1;
|
|
|
|
unsigned int clear_ack:1;
|
2023-02-20 23:33:34 +08:00
|
|
|
unsigned int status_invert:1;
|
2022-06-24 05:14:09 +08:00
|
|
|
unsigned int wake_invert:1;
|
|
|
|
unsigned int type_in_mask:1;
|
|
|
|
unsigned int clear_on_unmask:1;
|
2023-02-20 23:33:34 +08:00
|
|
|
unsigned int runtime_pm:1;
|
2023-02-28 00:45:22 +08:00
|
|
|
unsigned int no_status:1;
|
2011-10-29 05:50:49 +08:00
|
|
|
|
|
|
|
int num_regs;
|
|
|
|
|
|
|
|
const struct regmap_irq *irqs;
|
|
|
|
int num_irqs;
|
2015-12-22 20:55:26 +08:00
|
|
|
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
int num_config_bases;
|
|
|
|
int num_config_regs;
|
2016-05-20 23:10:26 +08:00
|
|
|
|
|
|
|
int (*handle_pre_irq)(void *irq_drv_data);
|
|
|
|
int (*handle_post_irq)(void *irq_drv_data);
|
2023-04-07 19:47:33 +08:00
|
|
|
int (*handle_mask_sync)(int index, unsigned int mask_buf_def,
|
2022-11-22 15:10:59 +08:00
|
|
|
unsigned int mask_buf, void *irq_drv_data);
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
int (*set_type_config)(unsigned int **buf, unsigned int type,
|
2023-04-05 23:45:42 +08:00
|
|
|
const struct regmap_irq *irq_data, int idx,
|
|
|
|
void *irq_drv_data);
|
2022-06-24 05:14:19 +08:00
|
|
|
unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
|
|
|
|
unsigned int base, int index);
|
2016-05-20 23:10:26 +08:00
|
|
|
void *irq_drv_data;
|
2011-10-29 05:50:49 +08:00
|
|
|
};
|
|
|
|
|
2022-06-24 05:14:19 +08:00
|
|
|
unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
|
|
|
|
unsigned int base, int index);
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
|
2023-04-05 23:45:42 +08:00
|
|
|
const struct regmap_irq *irq_data,
|
|
|
|
int idx, void *irq_drv_data);
|
regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.
Config registers can be represented as a 2D array:
config_base[0] reg0,0 reg0,1 reg0,2 reg0,3
config_base[1] reg1,0 reg1,1 reg1,2 reg1,3
config_base[2] reg2,0 reg2,1 reg2,2 reg2,3
There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.
The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.
Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-06-24 05:14:16 +08:00
|
|
|
|
2011-10-29 05:50:49 +08:00
|
|
|
int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
|
2012-06-01 04:01:46 +08:00
|
|
|
int irq_base, const struct regmap_irq_chip *chip,
|
2011-10-29 05:50:49 +08:00
|
|
|
struct regmap_irq_chip_data **data);
|
2020-07-07 01:53:41 +08:00
|
|
|
int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
|
|
|
|
struct regmap *map, int irq,
|
|
|
|
int irq_flags, int irq_base,
|
|
|
|
const struct regmap_irq_chip *chip,
|
|
|
|
struct regmap_irq_chip_data **data);
|
2011-10-29 05:50:49 +08:00
|
|
|
void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
|
2016-02-10 16:59:50 +08:00
|
|
|
|
|
|
|
int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
|
|
|
|
int irq_flags, int irq_base,
|
|
|
|
const struct regmap_irq_chip *chip,
|
|
|
|
struct regmap_irq_chip_data **data);
|
2020-07-07 01:53:41 +08:00
|
|
|
int devm_regmap_add_irq_chip_fwnode(struct device *dev,
|
|
|
|
struct fwnode_handle *fwnode,
|
|
|
|
struct regmap *map, int irq,
|
|
|
|
int irq_flags, int irq_base,
|
|
|
|
const struct regmap_irq_chip *chip,
|
|
|
|
struct regmap_irq_chip_data **data);
|
2016-02-10 16:59:50 +08:00
|
|
|
void devm_regmap_del_irq_chip(struct device *dev, int irq,
|
|
|
|
struct regmap_irq_chip_data *data);
|
|
|
|
|
2011-12-06 00:10:15 +08:00
|
|
|
int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
|
2012-05-13 17:59:56 +08:00
|
|
|
int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
|
2012-08-21 04:45:05 +08:00
|
|
|
struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
|
2011-09-20 01:22:14 +08:00
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
#else
|
|
|
|
|
|
|
|
/*
|
|
|
|
* These stubs should only ever be called by generic code which has
|
|
|
|
* regmap based facilities, if they ever get called at runtime
|
|
|
|
* something is going wrong and something probably needs to select
|
|
|
|
* REGMAP.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static inline int regmap_write(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-10-09 20:30:10 +08:00
|
|
|
static inline int regmap_write_async(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-01-27 22:07:38 +08:00
|
|
|
static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-10-19 17:33:50 +08:00
|
|
|
static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_len)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
|
|
|
|
const void *val, size_t val_count)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_read(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int *val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
|
|
|
|
void *val, size_t val_len)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-08-07 22:52:17 +08:00
|
|
|
static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
|
|
|
|
void *val, size_t val_len)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
|
|
|
|
void *val, size_t val_count)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-02-15 13:22:18 +08:00
|
|
|
static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force)
|
2015-06-16 16:52:39 +08:00
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2020-05-28 23:45:02 +08:00
|
|
|
static inline int regmap_set_bits(struct regmap *map,
|
|
|
|
unsigned int reg, unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_clear_bits(struct regmap *map,
|
|
|
|
unsigned int reg, unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_test_bits(struct regmap *map,
|
|
|
|
unsigned int reg, unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-02-15 13:23:55 +08:00
|
|
|
static inline int regmap_field_update_bits_base(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force)
|
2013-10-09 20:30:10 +08:00
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-02-15 13:24:51 +08:00
|
|
|
static inline int regmap_fields_update_bits_base(struct regmap_field *field,
|
|
|
|
unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change, bool async, bool force)
|
2013-10-09 20:30:10 +08:00
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2020-06-15 15:23:13 +08:00
|
|
|
static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val,
|
|
|
|
bool *change)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_write(struct regmap_field *field,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_force_write(struct regmap_field *field,
|
|
|
|
unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_update_bits(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_field_force_update_bits(struct regmap_field *field,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2022-05-23 11:26:58 +08:00
|
|
|
static inline int regmap_field_set_bits(struct regmap_field *field,
|
|
|
|
unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_clear_bits(struct regmap_field *field,
|
|
|
|
unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_field_test_bits(struct regmap_field *field,
|
|
|
|
unsigned int bits)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2020-06-15 15:23:13 +08:00
|
|
|
static inline int regmap_fields_write(struct regmap_field *field,
|
|
|
|
unsigned int id, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int regmap_fields_force_write(struct regmap_field *field,
|
|
|
|
unsigned int id, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
|
|
|
|
unsigned int mask, unsigned int val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regmap_get_val_bytes(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-22 00:42:43 +08:00
|
|
|
static inline int regmap_get_max_register(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-05-22 00:42:54 +08:00
|
|
|
static inline int regmap_get_reg_stride(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2022-11-21 23:08:42 +08:00
|
|
|
static inline bool regmap_might_sleep(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regcache_sync(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-24 03:49:43 +08:00
|
|
|
static inline int regcache_sync_region(struct regmap *map, unsigned int min,
|
|
|
|
unsigned int max)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-05-08 20:55:22 +08:00
|
|
|
static inline int regcache_drop_region(struct regmap *map, unsigned int min,
|
|
|
|
unsigned int max)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline void regcache_cache_only(struct regmap *map, bool enable)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void regcache_cache_bypass(struct regmap *map, bool enable)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void regcache_mark_dirty(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
}
|
|
|
|
|
2013-01-27 22:07:38 +08:00
|
|
|
static inline void regmap_async_complete(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
static inline int regmap_register_patch(struct regmap *map,
|
2015-11-30 23:20:15 +08:00
|
|
|
const struct reg_sequence *regs,
|
2012-02-18 06:49:51 +08:00
|
|
|
int num_regs)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-02-19 18:44:13 +08:00
|
|
|
static inline int regmap_parse_val(struct regmap *map, const void *buf,
|
|
|
|
unsigned int *val)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-05-09 00:44:40 +08:00
|
|
|
static inline struct regmap *dev_get_regmap(struct device *dev,
|
|
|
|
const char *name)
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2014-07-21 23:38:47 +08:00
|
|
|
static inline struct device *regmap_get_device(struct regmap *map)
|
|
|
|
{
|
|
|
|
WARN_ONCE(1, "regmap API is disabled");
|
2014-07-26 02:01:53 +08:00
|
|
|
return NULL;
|
2014-07-21 23:38:47 +08:00
|
|
|
}
|
|
|
|
|
2012-02-18 06:49:51 +08:00
|
|
|
#endif
|
|
|
|
|
2011-05-12 01:59:58 +08:00
|
|
|
#endif
|