drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2017-04-24 12:50:28 +08:00
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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2017-04-24 12:50:28 +08:00
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#include "mdp4_kms.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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struct mdp4_dtv_encoder {
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struct drm_encoder base;
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struct clk *hdmi_clk;
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struct clk *mdp_clk;
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unsigned long int pixclock;
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bool enabled;
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uint32_t bsc;
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};
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#define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base)
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static struct mdp4_kms *get_kms(struct drm_encoder *encoder)
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{
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struct msm_drm_private *priv = encoder->dev->dev_private;
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2013-12-01 06:24:22 +08:00
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return to_mdp4_kms(to_mdp_kms(priv->kms));
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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}
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2015-06-04 22:26:37 +08:00
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#ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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#include <mach/board.h>
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/* not ironically named at all.. no, really.. */
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static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
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{
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struct drm_device *dev = mdp4_dtv_encoder->base.dev;
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struct lcdc_platform_data *dtv_pdata = mdp4_find_pdata("dtv.0");
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if (!dtv_pdata) {
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2018-10-21 01:49:26 +08:00
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DRM_DEV_ERROR(dev->dev, "could not find dtv pdata\n");
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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return;
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}
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if (dtv_pdata->bus_scale_table) {
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mdp4_dtv_encoder->bsc = msm_bus_scale_register_client(
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dtv_pdata->bus_scale_table);
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DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc);
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DBG("lcdc_power_save: %p", dtv_pdata->lcdc_power_save);
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if (dtv_pdata->lcdc_power_save)
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dtv_pdata->lcdc_power_save(1);
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}
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}
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static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
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{
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if (mdp4_dtv_encoder->bsc) {
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msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc);
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mdp4_dtv_encoder->bsc = 0;
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}
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}
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static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx)
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{
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if (mdp4_dtv_encoder->bsc) {
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DBG("set bus scaling: %d", idx);
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msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx);
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}
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}
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#else
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static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
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static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
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static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) {}
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#endif
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static void mdp4_dtv_encoder_destroy(struct drm_encoder *encoder)
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{
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struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
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bs_fini(mdp4_dtv_encoder);
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drm_encoder_cleanup(encoder);
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kfree(mdp4_dtv_encoder);
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}
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static const struct drm_encoder_funcs mdp4_dtv_encoder_funcs = {
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.destroy = mdp4_dtv_encoder_destroy,
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};
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static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;
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uint32_t display_v_start, display_v_end;
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uint32_t hsync_start_x, hsync_end_x;
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mode = adjusted_mode;
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2019-01-11 02:13:01 +08:00
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DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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mdp4_dtv_encoder->pixclock = mode->clock * 1000;
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DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock);
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ctrl_pol = 0;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW;
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/* probably need to get DATA_EN polarity from panel.. */
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dtv_hsync_skew = 0; /* get this from panel? */
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hsync_start_x = (mode->htotal - mode->hsync_start);
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hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
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vsync_period = mode->vtotal * mode->htotal;
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vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
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display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
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display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
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mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_CTRL,
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MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) |
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MDP4_DTV_HSYNC_CTRL_PERIOD(mode->htotal));
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mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_PERIOD, vsync_period);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_LEN, vsync_len);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_HCTRL,
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MDP4_DTV_DISPLAY_HCTRL_START(hsync_start_x) |
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MDP4_DTV_DISPLAY_HCTRL_END(hsync_end_x));
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mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VSTART, display_v_start);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VEND, display_v_end);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_BORDER_CLR, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_UNDERFLOW_CLR,
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MDP4_DTV_UNDERFLOW_CLR_ENABLE_RECOVERY |
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MDP4_DTV_UNDERFLOW_CLR_COLOR(0xff));
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mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_SKEW, dtv_hsync_skew);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_HCTL,
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MDP4_DTV_ACTIVE_HCTL_START(0) |
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MDP4_DTV_ACTIVE_HCTL_END(0));
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mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VSTART, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VEND, 0);
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}
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2015-01-31 06:04:45 +08:00
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static void mdp4_dtv_encoder_disable(struct drm_encoder *encoder)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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{
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2015-01-31 06:04:45 +08:00
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struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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if (WARN_ON(!mdp4_dtv_encoder->enabled))
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return;
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mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
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/*
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* Wait for a vsync so we know the ENABLE=0 latched before
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* the (connector) source of the vsync's gets disabled,
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* otherwise we end up in a funny state if we re-enable
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* before the disable latches, which results that some of
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* the settings changes for the new modeset (like new
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* scanout buffer) don't latch properly..
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*/
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mdp_irq_wait(&mdp4_kms->base, MDP4_IRQ_EXTERNAL_VSYNC);
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clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk);
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clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk);
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bs_set(mdp4_dtv_encoder, 0);
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mdp4_dtv_encoder->enabled = false;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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}
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2015-01-31 06:04:45 +08:00
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static void mdp4_dtv_encoder_enable(struct drm_encoder *encoder)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
2015-01-31 06:04:45 +08:00
|
|
|
struct drm_device *dev = encoder->dev;
|
|
|
|
struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
|
|
|
|
struct mdp4_kms *mdp4_kms = get_kms(encoder);
|
|
|
|
unsigned long pc = mdp4_dtv_encoder->pixclock;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (WARN_ON(mdp4_dtv_encoder->enabled))
|
|
|
|
return;
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
mdp4_crtc_set_config(encoder->crtc,
|
|
|
|
MDP4_DMA_CONFIG_R_BPC(BPC8) |
|
|
|
|
MDP4_DMA_CONFIG_G_BPC(BPC8) |
|
|
|
|
MDP4_DMA_CONFIG_B_BPC(BPC8) |
|
|
|
|
MDP4_DMA_CONFIG_PACK(0x21));
|
2014-08-06 19:43:12 +08:00
|
|
|
mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 1);
|
2015-01-31 06:04:45 +08:00
|
|
|
|
|
|
|
bs_set(mdp4_dtv_encoder, 1);
|
|
|
|
|
2016-06-10 14:25:43 +08:00
|
|
|
DBG("setting mdp_clk=%lu", pc);
|
2015-01-31 06:04:45 +08:00
|
|
|
|
2016-06-10 14:25:43 +08:00
|
|
|
ret = clk_set_rate(mdp4_dtv_encoder->mdp_clk, pc);
|
2015-01-31 06:04:45 +08:00
|
|
|
if (ret)
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to set mdp_clk to %lu: %d\n",
|
2016-06-10 14:25:43 +08:00
|
|
|
pc, ret);
|
|
|
|
|
2015-01-31 06:04:45 +08:00
|
|
|
ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk);
|
|
|
|
if (ret)
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to enabled mdp_clk: %d\n", ret);
|
2015-01-31 06:04:45 +08:00
|
|
|
|
2016-06-10 14:25:43 +08:00
|
|
|
ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk);
|
|
|
|
if (ret)
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to enable hdmi_clk: %d\n", ret);
|
2016-06-10 14:25:43 +08:00
|
|
|
|
2015-01-31 06:04:45 +08:00
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 1);
|
|
|
|
|
|
|
|
mdp4_dtv_encoder->enabled = true;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct drm_encoder_helper_funcs mdp4_dtv_encoder_helper_funcs = {
|
|
|
|
.mode_set = mdp4_dtv_encoder_mode_set,
|
2015-01-31 06:04:45 +08:00
|
|
|
.enable = mdp4_dtv_encoder_enable,
|
|
|
|
.disable = mdp4_dtv_encoder_disable,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate)
|
|
|
|
{
|
|
|
|
struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
|
2016-06-10 14:25:43 +08:00
|
|
|
return clk_round_rate(mdp4_dtv_encoder->mdp_clk, rate);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* initialize encoder */
|
|
|
|
struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_encoder *encoder = NULL;
|
|
|
|
struct mdp4_dtv_encoder *mdp4_dtv_encoder;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
mdp4_dtv_encoder = kzalloc(sizeof(*mdp4_dtv_encoder), GFP_KERNEL);
|
|
|
|
if (!mdp4_dtv_encoder) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
encoder = &mdp4_dtv_encoder->base;
|
|
|
|
|
|
|
|
drm_encoder_init(dev, encoder, &mdp4_dtv_encoder_funcs,
|
drm: Pass 'name' to drm_encoder_init()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.
@@
identifier dev, encoder, funcs;
@@
int drm_encoder_init(struct drm_device *dev,
struct drm_encoder *encoder,
const struct drm_encoder_funcs *funcs,
int encoder_type
+ ,const char *name, int DOTDOTDOT
)
{ ... }
@@
identifier dev, encoder, funcs;
@@
int drm_encoder_init(struct drm_device *dev,
struct drm_encoder *encoder,
const struct drm_encoder_funcs *funcs,
int encoder_type
+ ,const char *name, int DOTDOTDOT
);
@@
expression E1, E2, E3, E4;
@@
drm_encoder_init(E1, E2, E3, E4
+ ,NULL
)
v2: Add ', or NULL...' to @name kernel doc (Jani)
Annotate the function with __printf() attribute (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-09 22:20:18 +08:00
|
|
|
DRM_MODE_ENCODER_TMDS, NULL);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
drm_encoder_helper_add(encoder, &mdp4_dtv_encoder_helper_funcs);
|
|
|
|
|
|
|
|
mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk");
|
|
|
|
if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) {
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get hdmi_clk\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
ret = PTR_ERR(mdp4_dtv_encoder->hdmi_clk);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-06-10 14:25:43 +08:00
|
|
|
mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "tv_clk");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) {
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get tv_clk\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
ret = PTR_ERR(mdp4_dtv_encoder->mdp_clk);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
bs_init(mdp4_dtv_encoder);
|
|
|
|
|
|
|
|
return encoder;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
if (encoder)
|
|
|
|
mdp4_dtv_encoder_destroy(encoder);
|
|
|
|
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|