2011-03-10 03:31:01 +08:00
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/*
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* wm8958-dsp2.c -- WM8958 DSP2 support
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*
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* Copyright 2011 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <trace/events/asoc.h>
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#include <linux/mfd/wm8994/core.h>
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#include <linux/mfd/wm8994/registers.h>
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#include <linux/mfd/wm8994/pdata.h>
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#include <linux/mfd/wm8994/gpio.h>
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#include "wm8994.h"
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2011-03-12 02:09:04 +08:00
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#define WM_FW_BLOCK_INFO 0xff
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#define WM_FW_BLOCK_PM 0x00
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#define WM_FW_BLOCK_X 0x01
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#define WM_FW_BLOCK_Y 0x02
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#define WM_FW_BLOCK_Z 0x03
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#define WM_FW_BLOCK_I 0x06
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#define WM_FW_BLOCK_A 0x08
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#define WM_FW_BLOCK_C 0x0c
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static int wm8958_dsp2_fw(struct snd_soc_codec *codec, const char *name,
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const struct firmware *fw, bool check)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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u64 data64;
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u32 data32;
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const u8 *data;
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char *str;
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size_t block_len, len;
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int ret = 0;
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/* Suppress unneeded downloads */
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if (wm8994->cur_fw == fw)
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return 0;
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if (fw->size < 32) {
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dev_err(codec->dev, "%s: firmware too short\n", name);
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goto err;
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}
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if (memcmp(fw->data, "WMFW", 4) != 0) {
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dev_err(codec->dev, "%s: firmware has bad file magic %08x\n",
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name, data32);
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goto err;
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}
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memcpy(&data32, fw->data + 4, sizeof(data32));
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len = be32_to_cpu(data32);
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memcpy(&data32, fw->data + 8, sizeof(data32));
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data32 = be32_to_cpu(data32);
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if ((data32 >> 24) & 0xff) {
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dev_err(codec->dev, "%s: unsupported firmware version %d\n",
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name, (data32 >> 24) & 0xff);
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goto err;
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}
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if ((data32 & 0xffff) != 8958) {
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dev_err(codec->dev, "%s: unsupported target device %d\n",
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name, data32 & 0xffff);
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goto err;
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}
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if (((data32 >> 16) & 0xff) != 0xc) {
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dev_err(codec->dev, "%s: unsupported target core %d\n",
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name, (data32 >> 16) & 0xff);
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goto err;
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}
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if (check) {
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memcpy(&data64, fw->data + 24, sizeof(u64));
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dev_info(codec->dev, "%s timestamp %llx\n",
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name, be64_to_cpu(data64));
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} else {
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snd_soc_write(codec, 0x102, 0x2);
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snd_soc_write(codec, 0x900, 0x2);
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}
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data = fw->data + len;
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len = fw->size - len;
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while (len) {
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if (len < 12) {
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dev_err(codec->dev, "%s short data block of %d\n",
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name, len);
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goto err;
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}
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memcpy(&data32, data + 4, sizeof(data32));
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block_len = be32_to_cpu(data32);
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if (block_len + 8 > len) {
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dev_err(codec->dev, "%d byte block longer than file\n",
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block_len);
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goto err;
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}
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if (block_len == 0) {
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dev_err(codec->dev, "Zero length block\n");
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goto err;
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}
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memcpy(&data32, data, sizeof(data32));
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data32 = be32_to_cpu(data32);
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switch ((data32 >> 24) & 0xff) {
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case WM_FW_BLOCK_INFO:
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/* Informational text */
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if (!check)
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break;
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str = kzalloc(block_len + 1, GFP_KERNEL);
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if (str) {
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memcpy(str, data + 8, block_len);
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dev_info(codec->dev, "%s: %s\n", name, str);
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kfree(str);
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} else {
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dev_err(codec->dev, "Out of memory\n");
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}
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break;
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case WM_FW_BLOCK_PM:
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case WM_FW_BLOCK_X:
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case WM_FW_BLOCK_Y:
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case WM_FW_BLOCK_Z:
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case WM_FW_BLOCK_I:
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case WM_FW_BLOCK_A:
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case WM_FW_BLOCK_C:
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dev_dbg(codec->dev, "%s: %d bytes of %x@%x\n", name,
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block_len, (data32 >> 24) & 0xff,
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data32 & 0xffffff);
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if (check)
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break;
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data32 &= 0xffffff;
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wm8994_bulk_write(codec->control_data,
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data32 & 0xffffff,
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block_len / 2,
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(void *)(data + 8));
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break;
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default:
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dev_warn(codec->dev, "%s: unknown block type %d\n",
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name, (data32 >> 24) & 0xff);
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break;
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}
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/* Round up to the next 32 bit word */
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block_len += block_len % 4;
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data += block_len + 8;
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len -= block_len + 8;
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}
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if (!check) {
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dev_dbg(codec->dev, "%s: download done\n", name);
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wm8994->cur_fw = fw;
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} else {
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dev_info(codec->dev, "%s: got firmware\n", name);
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}
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goto ok;
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err:
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ret = -EINVAL;
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ok:
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if (!check) {
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snd_soc_write(codec, 0x900, 0x0);
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snd_soc_write(codec, 0x102, 0x0);
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}
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return ret;
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}
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2011-03-17 04:55:37 +08:00
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static void wm8958_dsp_start_mbc(struct snd_soc_codec *codec, int path)
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2011-03-10 03:31:01 +08:00
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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struct wm8994_pdata *pdata = wm8994->pdata;
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2011-03-12 02:09:04 +08:00
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int i;
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/* If the DSP is already running then noop */
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if (snd_soc_read(codec, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
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return;
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/* If we have MBC firmware download it */
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if (wm8994->mbc)
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wm8958_dsp2_fw(codec, "MBC", wm8994->mbc, false);
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snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
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WM8958_DSP2_ENA, WM8958_DSP2_ENA);
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/* If we've got user supplied MBC settings use them */
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if (pdata && pdata->num_mbc_cfgs) {
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struct wm8958_mbc_cfg *cfg
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= &pdata->mbc_cfgs[wm8994->mbc_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
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snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
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cfg->coeff_regs[i]);
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for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
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snd_soc_write(codec,
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i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
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cfg->cutoff_regs[i]);
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}
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/* Run the DSP */
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snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
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WM8958_DSP2_RUNR);
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/* And we're off! */
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snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
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WM8958_MBC_ENA |
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WM8958_MBC_SEL_MASK,
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path << WM8958_MBC_SEL_SHIFT |
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WM8958_MBC_ENA);
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}
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2011-03-17 06:57:47 +08:00
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static void wm8958_dsp_start_vss(struct snd_soc_codec *codec, int path)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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struct wm8994_pdata *pdata = wm8994->pdata;
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int i, ena;
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if (wm8994->mbc_vss)
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wm8958_dsp2_fw(codec, "MBC+VSS", wm8994->mbc_vss, false);
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snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
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WM8958_DSP2_ENA, WM8958_DSP2_ENA);
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/* If we've got user supplied settings use them */
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if (pdata && pdata->num_mbc_cfgs) {
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struct wm8958_mbc_cfg *cfg
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= &pdata->mbc_cfgs[wm8994->mbc_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->combined_regs); i++)
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snd_soc_write(codec, i + 0x2800,
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cfg->combined_regs[i]);
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}
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if (pdata && pdata->num_vss_cfgs) {
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struct wm8958_vss_cfg *cfg
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= &pdata->vss_cfgs[wm8994->vss_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
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snd_soc_write(codec, i + 0x2600, cfg->regs[i]);
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}
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if (pdata && pdata->num_vss_hpf_cfgs) {
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struct wm8958_vss_hpf_cfg *cfg
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= &pdata->vss_hpf_cfgs[wm8994->vss_hpf_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
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snd_soc_write(codec, i + 0x2400, cfg->regs[i]);
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}
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/* Run the DSP */
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snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
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WM8958_DSP2_RUNR);
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/* Enable the algorithms we've selected */
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ena = 0;
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if (wm8994->mbc_ena[path])
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ena |= 0x8;
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if (wm8994->hpf2_ena[path])
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ena |= 0x4;
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if (wm8994->hpf1_ena[path])
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ena |= 0x2;
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if (wm8994->vss_ena[path])
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ena |= 0x1;
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snd_soc_write(codec, 0x2201, ena);
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/* Switch the DSP into the data path */
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snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
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WM8958_MBC_SEL_MASK | WM8958_MBC_ENA,
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path << WM8958_MBC_SEL_SHIFT | WM8958_MBC_ENA);
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}
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2011-03-18 04:23:43 +08:00
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static void wm8958_dsp_start_enh_eq(struct snd_soc_codec *codec, int path)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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struct wm8994_pdata *pdata = wm8994->pdata;
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int i;
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wm8958_dsp2_fw(codec, "ENH_EQ", wm8994->enh_eq, false);
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snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
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WM8958_DSP2_ENA, WM8958_DSP2_ENA);
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/* If we've got user supplied settings use them */
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if (pdata && pdata->num_enh_eq_cfgs) {
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struct wm8958_enh_eq_cfg *cfg
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= &pdata->enh_eq_cfgs[wm8994->enh_eq_cfg];
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for (i = 0; i < ARRAY_SIZE(cfg->regs); i++)
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snd_soc_write(codec, i + 0x2200,
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cfg->regs[i]);
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}
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/* Run the DSP */
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snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
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WM8958_DSP2_RUNR);
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/* Switch the DSP into the data path */
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snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
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WM8958_MBC_SEL_MASK | WM8958_MBC_ENA,
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path << WM8958_MBC_SEL_SHIFT | WM8958_MBC_ENA);
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}
|
2011-03-17 06:57:47 +08:00
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2011-03-12 02:09:04 +08:00
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static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start)
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{
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struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
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2011-03-10 03:31:01 +08:00
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int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
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2011-03-17 04:55:37 +08:00
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int ena, reg, aif;
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2011-03-10 03:31:01 +08:00
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2011-03-17 04:55:37 +08:00
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switch (path) {
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2011-03-10 03:31:01 +08:00
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case 0:
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pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
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aif = 0;
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break;
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case 1:
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pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
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aif = 0;
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break;
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case 2:
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pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
|
|
|
|
aif = 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
/* Do we have both an active AIF and an active algorithm? */
|
2011-03-17 06:57:47 +08:00
|
|
|
ena = wm8994->mbc_ena[path] || wm8994->vss_ena[path] ||
|
2011-03-18 04:23:43 +08:00
|
|
|
wm8994->hpf1_ena[path] || wm8994->hpf2_ena[path] ||
|
|
|
|
wm8994->enh_eq_ena[path];
|
2011-03-17 04:55:37 +08:00
|
|
|
if (!pwr_reg)
|
|
|
|
ena = 0;
|
2011-03-10 03:31:01 +08:00
|
|
|
|
|
|
|
reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
dev_dbg(codec->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
|
|
|
|
path, wm8994->dsp_active, start, pwr_reg, reg);
|
2011-03-10 03:31:01 +08:00
|
|
|
|
|
|
|
if (start && ena) {
|
2011-03-17 04:55:37 +08:00
|
|
|
/* If either AIFnCLK is not yet enabled postpone */
|
2011-03-12 02:13:12 +08:00
|
|
|
if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
|
|
|
|
& WM8994_AIF1CLK_ENA_MASK) &&
|
|
|
|
!(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
|
|
|
|
& WM8994_AIF2CLK_ENA_MASK))
|
|
|
|
return;
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
/* Switch the clock over to the appropriate AIF */
|
|
|
|
snd_soc_update_bits(codec, WM8994_CLOCKING_1,
|
|
|
|
WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
|
|
|
|
aif << WM8958_DSP2CLK_SRC_SHIFT |
|
|
|
|
WM8958_DSP2CLK_ENA);
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
if (wm8994->enh_eq_ena[path])
|
|
|
|
wm8958_dsp_start_enh_eq(codec, path);
|
|
|
|
else if (wm8994->vss_ena[path] || wm8994->hpf1_ena[path] ||
|
2011-03-17 06:57:47 +08:00
|
|
|
wm8994->hpf2_ena[path])
|
|
|
|
wm8958_dsp_start_vss(codec, path);
|
|
|
|
else if (wm8994->mbc_ena[path])
|
2011-03-17 04:55:37 +08:00
|
|
|
wm8958_dsp_start_mbc(codec, path);
|
2011-03-10 03:31:01 +08:00
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
wm8994->dsp_active = path;
|
|
|
|
|
|
|
|
dev_dbg(codec->dev, "DSP running in path %d\n", path);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!start && wm8994->dsp_active == path) {
|
2011-03-10 03:31:01 +08:00
|
|
|
/* If the DSP is already stopped then noop */
|
|
|
|
if (!(reg & WM8958_DSP2_ENA))
|
|
|
|
return;
|
|
|
|
|
|
|
|
snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
|
|
|
|
WM8958_MBC_ENA, 0);
|
2011-03-17 04:55:37 +08:00
|
|
|
snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
|
|
|
|
WM8958_DSP2_STOP);
|
2011-03-10 03:31:01 +08:00
|
|
|
snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
|
|
|
|
WM8958_DSP2_ENA, 0);
|
|
|
|
snd_soc_update_bits(codec, WM8994_CLOCKING_1,
|
|
|
|
WM8958_DSP2CLK_ENA, 0);
|
2011-03-17 04:55:37 +08:00
|
|
|
|
|
|
|
wm8994->dsp_active = -1;
|
|
|
|
|
|
|
|
dev_dbg(codec->dev, "DSP stopped\n");
|
2011-03-10 03:31:01 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
|
|
|
|
struct snd_kcontrol *kcontrol, int event)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = w->codec;
|
2011-03-12 02:13:12 +08:00
|
|
|
int i;
|
2011-03-10 03:31:01 +08:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case SND_SOC_DAPM_POST_PMU:
|
2011-03-12 02:13:12 +08:00
|
|
|
case SND_SOC_DAPM_PRE_PMU:
|
|
|
|
for (i = 0; i < 3; i++)
|
2011-03-17 04:55:37 +08:00
|
|
|
wm8958_dsp_apply(codec, i, 1);
|
2011-03-10 03:31:01 +08:00
|
|
|
break;
|
|
|
|
case SND_SOC_DAPM_POST_PMD:
|
2011-03-12 02:13:12 +08:00
|
|
|
case SND_SOC_DAPM_PRE_PMD:
|
|
|
|
for (i = 0; i < 3; i++)
|
2011-03-17 04:55:37 +08:00
|
|
|
wm8958_dsp_apply(codec, i, 0);
|
2011-03-10 03:31:01 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
/* Check if DSP2 is in use on another AIF */
|
|
|
|
static int wm8958_dsp2_busy(struct wm8994_priv *wm8994, int aif)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
|
|
|
|
if (i == aif)
|
|
|
|
continue;
|
2011-03-17 06:57:47 +08:00
|
|
|
if (wm8994->mbc_ena[i] || wm8994->vss_ena[i] ||
|
|
|
|
wm8994->hpf1_ena[i] || wm8994->hpf2_ena[i])
|
2011-03-17 04:55:37 +08:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
struct wm8994_pdata *pdata = wm8994->pdata;
|
|
|
|
int value = ucontrol->value.integer.value[0];
|
|
|
|
int reg;
|
|
|
|
|
|
|
|
/* Don't allow on the fly reconfiguration */
|
|
|
|
reg = snd_soc_read(codec, WM8994_CLOCKING_1);
|
|
|
|
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
if (value >= pdata->num_mbc_cfgs)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
wm8994->mbc_cfg = value;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_info *uinfo)
|
|
|
|
{
|
|
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
|
|
|
|
uinfo->count = 1;
|
|
|
|
uinfo->value.integer.min = 0;
|
|
|
|
uinfo->value.integer.max = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int mbc = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int mbc = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (ucontrol->value.integer.value[0] > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
if (wm8958_dsp2_busy(wm8994, mbc)) {
|
|
|
|
dev_dbg(codec->dev, "DSP2 active on %d already\n", mbc);
|
|
|
|
return -EBUSY;
|
2011-03-10 03:31:01 +08:00
|
|
|
}
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
if (wm8994->enh_eq_ena[mbc])
|
|
|
|
return -EBUSY;
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
wm8958_dsp_apply(codec, mbc, wm8994->mbc_ena[mbc]);
|
2011-03-10 03:31:01 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define WM8958_MBC_SWITCH(xname, xval) {\
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
|
|
|
|
.info = wm8958_mbc_info, \
|
|
|
|
.get = wm8958_mbc_get, .put = wm8958_mbc_put, \
|
|
|
|
.private_value = xval }
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
static int wm8958_put_vss_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
struct wm8994_pdata *pdata = wm8994->pdata;
|
|
|
|
int value = ucontrol->value.integer.value[0];
|
|
|
|
int reg;
|
|
|
|
|
|
|
|
/* Don't allow on the fly reconfiguration */
|
|
|
|
reg = snd_soc_read(codec, WM8994_CLOCKING_1);
|
|
|
|
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
if (value >= pdata->num_vss_cfgs)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
wm8994->vss_cfg = value;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_get_vss_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.enumerated.item[0] = wm8994->vss_cfg;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_put_vss_hpf_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
struct wm8994_pdata *pdata = wm8994->pdata;
|
|
|
|
int value = ucontrol->value.integer.value[0];
|
|
|
|
int reg;
|
|
|
|
|
|
|
|
/* Don't allow on the fly reconfiguration */
|
|
|
|
reg = snd_soc_read(codec, WM8994_CLOCKING_1);
|
|
|
|
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
if (value >= pdata->num_vss_hpf_cfgs)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
wm8994->vss_hpf_cfg = value;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_get_vss_hpf_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.enumerated.item[0] = wm8994->vss_hpf_cfg;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_vss_info(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_info *uinfo)
|
|
|
|
{
|
|
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
|
|
|
|
uinfo->count = 1;
|
|
|
|
uinfo->value.integer.min = 0;
|
|
|
|
uinfo->value.integer.max = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_vss_get(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int vss = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.integer.value[0] = wm8994->vss_ena[vss];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_vss_put(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int vss = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (ucontrol->value.integer.value[0] > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!wm8994->mbc_vss)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (wm8958_dsp2_busy(wm8994, vss)) {
|
|
|
|
dev_dbg(codec->dev, "DSP2 active on %d already\n", vss);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
if (wm8994->enh_eq_ena[vss])
|
|
|
|
return -EBUSY;
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
wm8994->vss_ena[vss] = ucontrol->value.integer.value[0];
|
|
|
|
|
|
|
|
wm8958_dsp_apply(codec, vss, wm8994->vss_ena[vss]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#define WM8958_VSS_SWITCH(xname, xval) {\
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
|
|
|
|
.info = wm8958_vss_info, \
|
|
|
|
.get = wm8958_vss_get, .put = wm8958_vss_put, \
|
|
|
|
.private_value = xval }
|
|
|
|
|
|
|
|
static int wm8958_hpf_info(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_info *uinfo)
|
|
|
|
{
|
|
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
|
|
|
|
uinfo->count = 1;
|
|
|
|
uinfo->value.integer.min = 0;
|
|
|
|
uinfo->value.integer.max = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_hpf_get(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int hpf = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (hpf < 3)
|
|
|
|
ucontrol->value.integer.value[0] = wm8994->hpf1_ena[hpf % 3];
|
|
|
|
else
|
|
|
|
ucontrol->value.integer.value[0] = wm8994->hpf2_ena[hpf % 3];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_hpf_put(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int hpf = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (ucontrol->value.integer.value[0] > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!wm8994->mbc_vss)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (wm8958_dsp2_busy(wm8994, hpf % 3)) {
|
|
|
|
dev_dbg(codec->dev, "DSP2 active on %d already\n", hpf);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
if (wm8994->enh_eq_ena[hpf % 3])
|
2011-03-17 06:57:47 +08:00
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
if (hpf < 3)
|
|
|
|
wm8994->hpf1_ena[hpf % 3] = ucontrol->value.integer.value[0];
|
|
|
|
else
|
|
|
|
wm8994->hpf2_ena[hpf % 3] = ucontrol->value.integer.value[0];
|
|
|
|
|
|
|
|
wm8958_dsp_apply(codec, hpf % 3, ucontrol->value.integer.value[0]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define WM8958_HPF_SWITCH(xname, xval) {\
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
|
|
|
|
.info = wm8958_hpf_info, \
|
|
|
|
.get = wm8958_hpf_get, .put = wm8958_hpf_put, \
|
|
|
|
.private_value = xval }
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
static int wm8958_put_enh_eq_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
struct wm8994_pdata *pdata = wm8994->pdata;
|
|
|
|
int value = ucontrol->value.integer.value[0];
|
|
|
|
int reg;
|
|
|
|
|
|
|
|
/* Don't allow on the fly reconfiguration */
|
|
|
|
reg = snd_soc_read(codec, WM8994_CLOCKING_1);
|
|
|
|
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
if (value >= pdata->num_enh_eq_cfgs)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
wm8994->enh_eq_cfg = value;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_get_enh_eq_enum(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.enumerated.item[0] = wm8994->enh_eq_cfg;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_enh_eq_info(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_info *uinfo)
|
|
|
|
{
|
|
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
|
|
|
|
uinfo->count = 1;
|
|
|
|
uinfo->value.integer.min = 0;
|
|
|
|
uinfo->value.integer.max = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_enh_eq_get(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int eq = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
ucontrol->value.integer.value[0] = wm8994->enh_eq_ena[eq];
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int wm8958_enh_eq_put(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
int eq = kcontrol->private_value;
|
|
|
|
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (ucontrol->value.integer.value[0] > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!wm8994->enh_eq)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (wm8958_dsp2_busy(wm8994, eq)) {
|
|
|
|
dev_dbg(codec->dev, "DSP2 active on %d already\n", eq);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wm8994->mbc_ena[eq] || wm8994->vss_ena[eq] ||
|
|
|
|
wm8994->hpf1_ena[eq] || wm8994->hpf2_ena[eq])
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
wm8994->enh_eq_ena[eq] = ucontrol->value.integer.value[0];
|
|
|
|
|
|
|
|
wm8958_dsp_apply(codec, eq, ucontrol->value.integer.value[0]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define WM8958_ENH_EQ_SWITCH(xname, xval) {\
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
|
|
|
|
.info = wm8958_enh_eq_info, \
|
|
|
|
.get = wm8958_enh_eq_get, .put = wm8958_enh_eq_put, \
|
|
|
|
.private_value = xval }
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
static const struct snd_kcontrol_new wm8958_mbc_snd_controls[] = {
|
|
|
|
WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
|
|
|
|
WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
|
|
|
|
WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
|
|
|
|
};
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
static const struct snd_kcontrol_new wm8958_vss_snd_controls[] = {
|
|
|
|
WM8958_VSS_SWITCH("AIF1DAC1 VSS Switch", 0),
|
|
|
|
WM8958_VSS_SWITCH("AIF1DAC2 VSS Switch", 1),
|
|
|
|
WM8958_VSS_SWITCH("AIF2DAC VSS Switch", 2),
|
|
|
|
WM8958_HPF_SWITCH("AIF1DAC1 HPF1 Switch", 0),
|
|
|
|
WM8958_HPF_SWITCH("AIF1DAC2 HPF1 Switch", 1),
|
|
|
|
WM8958_HPF_SWITCH("AIF2DAC HPF1 Switch", 2),
|
|
|
|
WM8958_HPF_SWITCH("AIF1DAC1 HPF2 Switch", 3),
|
|
|
|
WM8958_HPF_SWITCH("AIF1DAC2 HPF2 Switch", 4),
|
|
|
|
WM8958_HPF_SWITCH("AIF2DAC HPF2 Switch", 5),
|
|
|
|
};
|
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
static const struct snd_kcontrol_new wm8958_enh_eq_snd_controls[] = {
|
|
|
|
WM8958_ENH_EQ_SWITCH("AIF1DAC1 Enhanced EQ Switch", 0),
|
|
|
|
WM8958_ENH_EQ_SWITCH("AIF1DAC2 Enhanced EQ Switch", 1),
|
|
|
|
WM8958_ENH_EQ_SWITCH("AIF2DAC Enhanced EQ Switch", 2),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void wm8958_enh_eq_loaded(const struct firmware *fw, void *context)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = context;
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (fw && (wm8958_dsp2_fw(codec, "ENH_EQ", fw, true) == 0)) {
|
|
|
|
mutex_lock(&codec->mutex);
|
|
|
|
wm8994->enh_eq = fw;
|
|
|
|
mutex_unlock(&codec->mutex);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
static void wm8958_mbc_vss_loaded(const struct firmware *fw, void *context)
|
2011-03-12 02:09:04 +08:00
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = context;
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
if (fw && (wm8958_dsp2_fw(codec, "MBC+VSS", fw, true) == 0)) {
|
2011-03-12 02:09:04 +08:00
|
|
|
mutex_lock(&codec->mutex);
|
2011-03-17 06:57:47 +08:00
|
|
|
wm8994->mbc_vss = fw;
|
2011-03-12 02:09:04 +08:00
|
|
|
mutex_unlock(&codec->mutex);
|
|
|
|
}
|
2011-03-17 06:57:47 +08:00
|
|
|
|
2011-03-18 04:23:43 +08:00
|
|
|
/* We can't have more than one request outstanding at once so
|
|
|
|
* we daisy chain.
|
|
|
|
*/
|
|
|
|
request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
|
|
|
|
"wm8958_enh_eq.wfw", codec->dev, GFP_KERNEL,
|
|
|
|
codec, wm8958_enh_eq_loaded);
|
2011-03-17 06:57:47 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void wm8958_mbc_loaded(const struct firmware *fw, void *context)
|
|
|
|
{
|
|
|
|
struct snd_soc_codec *codec = context;
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
|
|
|
|
if (wm8958_dsp2_fw(codec, "MBC", fw, true) != 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
mutex_lock(&codec->mutex);
|
|
|
|
wm8994->mbc = fw;
|
|
|
|
mutex_unlock(&codec->mutex);
|
|
|
|
|
|
|
|
/* We can't have more than one request outstanding at once so
|
|
|
|
* we daisy chain.
|
|
|
|
*/
|
|
|
|
request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
|
|
|
|
"wm8958_mbc_vss.wfw", codec->dev, GFP_KERNEL,
|
|
|
|
codec, wm8958_mbc_vss_loaded);
|
2011-03-12 02:09:04 +08:00
|
|
|
}
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
void wm8958_dsp2_init(struct snd_soc_codec *codec)
|
|
|
|
{
|
|
|
|
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
|
|
|
|
struct wm8994_pdata *pdata = wm8994->pdata;
|
|
|
|
int ret, i;
|
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
wm8994->dsp_active = -1;
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
snd_soc_add_controls(codec, wm8958_mbc_snd_controls,
|
|
|
|
ARRAY_SIZE(wm8958_mbc_snd_controls));
|
2011-03-17 06:57:47 +08:00
|
|
|
snd_soc_add_controls(codec, wm8958_vss_snd_controls,
|
|
|
|
ARRAY_SIZE(wm8958_vss_snd_controls));
|
2011-03-18 04:23:43 +08:00
|
|
|
snd_soc_add_controls(codec, wm8958_enh_eq_snd_controls,
|
|
|
|
ARRAY_SIZE(wm8958_enh_eq_snd_controls));
|
2011-03-17 06:57:47 +08:00
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
|
2011-03-17 04:55:37 +08:00
|
|
|
/* We don't *require* firmware and don't want to delay boot */
|
2011-03-12 02:09:04 +08:00
|
|
|
request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
|
|
|
|
"wm8958_mbc.wfw", codec->dev, GFP_KERNEL,
|
|
|
|
codec, wm8958_mbc_loaded);
|
|
|
|
|
2011-03-10 03:31:01 +08:00
|
|
|
if (!pdata)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (pdata->num_mbc_cfgs) {
|
|
|
|
struct snd_kcontrol_new control[] = {
|
|
|
|
SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
|
|
|
|
wm8958_get_mbc_enum, wm8958_put_mbc_enum),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* We need an array of texts for the enum API */
|
|
|
|
wm8994->mbc_texts = kmalloc(sizeof(char *)
|
|
|
|
* pdata->num_mbc_cfgs, GFP_KERNEL);
|
|
|
|
if (!wm8994->mbc_texts) {
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to allocate %d MBC config texts\n",
|
|
|
|
pdata->num_mbc_cfgs);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < pdata->num_mbc_cfgs; i++)
|
|
|
|
wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
|
|
|
|
|
|
|
|
wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
|
|
|
|
wm8994->mbc_enum.texts = wm8994->mbc_texts;
|
|
|
|
|
|
|
|
ret = snd_soc_add_controls(wm8994->codec, control, 1);
|
|
|
|
if (ret != 0)
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to add MBC mode controls: %d\n", ret);
|
|
|
|
}
|
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
if (pdata->num_vss_cfgs) {
|
|
|
|
struct snd_kcontrol_new control[] = {
|
|
|
|
SOC_ENUM_EXT("VSS Mode", wm8994->vss_enum,
|
|
|
|
wm8958_get_vss_enum, wm8958_put_vss_enum),
|
|
|
|
};
|
2011-03-10 03:31:01 +08:00
|
|
|
|
2011-03-17 06:57:47 +08:00
|
|
|
/* We need an array of texts for the enum API */
|
|
|
|
wm8994->vss_texts = kmalloc(sizeof(char *)
|
|
|
|
* pdata->num_vss_cfgs, GFP_KERNEL);
|
|
|
|
if (!wm8994->vss_texts) {
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to allocate %d VSS config texts\n",
|
|
|
|
pdata->num_vss_cfgs);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < pdata->num_vss_cfgs; i++)
|
|
|
|
wm8994->vss_texts[i] = pdata->vss_cfgs[i].name;
|
|
|
|
|
|
|
|
wm8994->vss_enum.max = pdata->num_vss_cfgs;
|
|
|
|
wm8994->vss_enum.texts = wm8994->vss_texts;
|
|
|
|
|
|
|
|
ret = snd_soc_add_controls(wm8994->codec, control, 1);
|
|
|
|
if (ret != 0)
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to add VSS mode controls: %d\n", ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pdata->num_vss_hpf_cfgs) {
|
|
|
|
struct snd_kcontrol_new control[] = {
|
|
|
|
SOC_ENUM_EXT("VSS HPF Mode", wm8994->vss_hpf_enum,
|
|
|
|
wm8958_get_vss_hpf_enum,
|
|
|
|
wm8958_put_vss_hpf_enum),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* We need an array of texts for the enum API */
|
|
|
|
wm8994->vss_hpf_texts = kmalloc(sizeof(char *)
|
|
|
|
* pdata->num_vss_hpf_cfgs, GFP_KERNEL);
|
|
|
|
if (!wm8994->vss_hpf_texts) {
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to allocate %d VSS HPF config texts\n",
|
|
|
|
pdata->num_vss_hpf_cfgs);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < pdata->num_vss_hpf_cfgs; i++)
|
|
|
|
wm8994->vss_hpf_texts[i] = pdata->vss_hpf_cfgs[i].name;
|
|
|
|
|
|
|
|
wm8994->vss_hpf_enum.max = pdata->num_vss_hpf_cfgs;
|
|
|
|
wm8994->vss_hpf_enum.texts = wm8994->vss_hpf_texts;
|
|
|
|
|
|
|
|
ret = snd_soc_add_controls(wm8994->codec, control, 1);
|
|
|
|
if (ret != 0)
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to add VSS HPFmode controls: %d\n",
|
|
|
|
ret);
|
|
|
|
}
|
2011-03-18 04:23:43 +08:00
|
|
|
|
|
|
|
if (pdata->num_enh_eq_cfgs) {
|
|
|
|
struct snd_kcontrol_new control[] = {
|
|
|
|
SOC_ENUM_EXT("Enhanced EQ Mode", wm8994->enh_eq_enum,
|
|
|
|
wm8958_get_enh_eq_enum,
|
|
|
|
wm8958_put_enh_eq_enum),
|
|
|
|
};
|
|
|
|
|
|
|
|
/* We need an array of texts for the enum API */
|
|
|
|
wm8994->enh_eq_texts = kmalloc(sizeof(char *)
|
|
|
|
* pdata->num_enh_eq_cfgs, GFP_KERNEL);
|
|
|
|
if (!wm8994->enh_eq_texts) {
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to allocate %d enhanced EQ config texts\n",
|
|
|
|
pdata->num_enh_eq_cfgs);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < pdata->num_enh_eq_cfgs; i++)
|
|
|
|
wm8994->enh_eq_texts[i] = pdata->enh_eq_cfgs[i].name;
|
|
|
|
|
|
|
|
wm8994->enh_eq_enum.max = pdata->num_enh_eq_cfgs;
|
|
|
|
wm8994->enh_eq_enum.texts = wm8994->enh_eq_texts;
|
|
|
|
|
|
|
|
ret = snd_soc_add_controls(wm8994->codec, control, 1);
|
|
|
|
if (ret != 0)
|
|
|
|
dev_err(wm8994->codec->dev,
|
|
|
|
"Failed to add enhanced EQ controls: %d\n",
|
|
|
|
ret);
|
|
|
|
}
|
2011-03-10 03:31:01 +08:00
|
|
|
}
|