2019-06-04 16:11:33 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2014-05-01 20:29:27 +08:00
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/*
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2016-02-12 10:02:42 +08:00
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* MFD core driver for the X-Powers' Power Management ICs
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2014-05-01 20:29:27 +08:00
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*
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2014-10-07 12:17:14 +08:00
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* AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
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* converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
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* as well as configurable GPIOs.
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2014-05-01 20:29:27 +08:00
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*
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2016-02-12 10:02:42 +08:00
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* This file contains the interface independent core functions.
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*
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2016-02-12 10:02:41 +08:00
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* Copyright (C) 2014 Carlo Caione
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*
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2014-05-01 20:29:27 +08:00
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* Author: Carlo Caione <carlo@caione.org>
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*/
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2018-12-11 23:17:11 +08:00
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#include <linux/acpi.h>
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#include <linux/bitops.h>
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2016-06-05 21:50:48 +08:00
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#include <linux/delay.h>
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2018-12-11 23:17:11 +08:00
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#include <linux/err.h>
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2014-05-01 20:29:27 +08:00
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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2018-12-11 23:17:11 +08:00
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#include <linux/mfd/axp20x.h>
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#include <linux/mfd/core.h>
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2014-05-01 20:29:27 +08:00
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#include <linux/module.h>
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2018-12-11 23:17:11 +08:00
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#include <linux/of_device.h>
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2014-05-01 20:29:27 +08:00
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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2018-12-11 23:17:12 +08:00
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#define AXP20X_OFF BIT(7)
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2014-05-01 20:29:27 +08:00
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2017-02-23 03:42:02 +08:00
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#define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
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mfd: axp20x: Fix AXP806 access errors on cold boot
The AXP806 supports either master/standalone or slave mode.
Slave mode allows sharing the serial bus, even with multiple
AXP806 which all have the same hardware address.
This is done with extra "serial interface address extension",
or AXP806_BUS_ADDR_EXT, and "register address extension", or
AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1 bit customizable at the factory, and 1 bit depending on the
state of an external pin. The latter is writable. Only when
the these device addressing bits (in the upper 4 bits of the
registers) match, will the device respond to operations on
its other registers.
The AXP806_REG_ADDR_EXT was previously configured by Allwinner's
bootloader. Work on U-boot SPL support now allows us to switch
to mainline U-boot, which doesn't do this for us. There might
be other bare minimum bootloaders out there which don't to this
either. It's best to handle this in the kernel.
This patch sets AXP806_REG_ADDR_EXT to 0x10, which is what we
know to be the proper value for a standard AXP806 in slave mode.
Afterwards it will reinitialize the regmap cache, to purge any
invalid stale values.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-05 12:01:03 +08:00
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#define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
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2015-03-24 18:21:17 +08:00
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static const char * const axp20x_model_names[] = {
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2015-07-11 20:59:56 +08:00
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"AXP152",
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2014-10-07 12:17:14 +08:00
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"AXP202",
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"AXP209",
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2015-04-10 12:09:01 +08:00
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"AXP221",
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2016-02-12 10:02:44 +08:00
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"AXP223",
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2014-10-07 12:17:14 +08:00
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"AXP288",
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2017-04-17 19:57:40 +08:00
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"AXP803",
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2016-08-27 15:55:38 +08:00
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"AXP806",
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2016-03-29 17:22:26 +08:00
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"AXP809",
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mfd: axp20x: Add support for AXP813 PMIC
The X-Powers AXP813 PMIC is normally used with Allwinner's A83T SoC.
It has the same range of functions as other X-Powers PMICs, such as
DC-DC buck converter and linear regulator outputs, AC-IN and VBUS
power supplies, power button trigger, GPIOs, ADCs, and a battery
charger.
Note that the IRQ table given in the datasheet is incorrect: in IRQ
enable/status registers 1, there are separate IRQs for ACIN and VBUS,
instead of bits [7:5] being the same as bits [4:2]. So it shares the
same IRQs as the AXP803, rather than the AXP288.
This patch adds basic mfd support for it, with only the power button
enabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-07-26 16:28:26 +08:00
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"AXP813",
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2014-10-07 12:17:14 +08:00
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};
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2015-07-11 20:59:56 +08:00
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static const struct regmap_range axp152_writeable_ranges[] = {
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regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
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regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
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};
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static const struct regmap_range axp152_volatile_ranges[] = {
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regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
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regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
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regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
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};
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static const struct regmap_access_table axp152_writeable_table = {
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.yes_ranges = axp152_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
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};
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static const struct regmap_access_table axp152_volatile_table = {
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.yes_ranges = axp152_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
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};
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2014-05-01 20:29:27 +08:00
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static const struct regmap_range axp20x_writeable_ranges[] = {
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regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
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2017-03-20 16:16:53 +08:00
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regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
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2014-05-01 20:29:27 +08:00
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regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
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2015-08-08 23:58:40 +08:00
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regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
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2014-05-01 20:29:27 +08:00
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};
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static const struct regmap_range axp20x_volatile_ranges[] = {
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2015-08-08 23:58:40 +08:00
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regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
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regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
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2014-05-01 20:29:27 +08:00
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
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2015-08-08 23:58:40 +08:00
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regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
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regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
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regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
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2014-05-01 20:29:27 +08:00
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};
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static const struct regmap_access_table axp20x_writeable_table = {
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.yes_ranges = axp20x_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
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};
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static const struct regmap_access_table axp20x_volatile_table = {
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.yes_ranges = axp20x_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
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};
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2016-03-29 17:22:26 +08:00
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/* AXP22x ranges are shared with the AXP809, as they cover the same range */
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2015-04-10 12:09:01 +08:00
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static const struct regmap_range axp22x_writeable_ranges[] = {
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regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
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2017-03-20 16:16:53 +08:00
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regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
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2015-04-10 12:09:01 +08:00
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regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
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};
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static const struct regmap_range axp22x_volatile_ranges[] = {
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2016-05-15 01:51:28 +08:00
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regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
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2015-04-10 12:09:01 +08:00
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
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2016-05-15 01:51:28 +08:00
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regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
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2017-03-20 16:16:45 +08:00
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regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
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2016-05-15 01:51:28 +08:00
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regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
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2015-04-10 12:09:01 +08:00
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};
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static const struct regmap_access_table axp22x_writeable_table = {
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.yes_ranges = axp22x_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
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};
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static const struct regmap_access_table axp22x_volatile_table = {
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.yes_ranges = axp22x_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
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};
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2017-04-17 19:57:40 +08:00
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/* AXP288 ranges are shared with the AXP803, as they cover the same range */
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2014-10-07 12:17:14 +08:00
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static const struct regmap_range axp288_writeable_ranges[] = {
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regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
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regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
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};
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static const struct regmap_range axp288_volatile_ranges[] = {
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2016-12-17 04:09:06 +08:00
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regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
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2021-06-30 01:12:39 +08:00
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regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
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2016-12-17 04:09:06 +08:00
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regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
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2020-01-05 09:24:08 +08:00
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regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
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2017-12-22 20:35:09 +08:00
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regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
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2014-10-07 12:17:14 +08:00
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
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2016-12-17 04:09:06 +08:00
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regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
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2021-06-30 01:12:39 +08:00
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regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
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2016-12-17 04:09:06 +08:00
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regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
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regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
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2014-10-07 12:17:14 +08:00
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};
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static const struct regmap_access_table axp288_writeable_table = {
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.yes_ranges = axp288_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
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};
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static const struct regmap_access_table axp288_volatile_table = {
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.yes_ranges = axp288_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
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};
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2016-08-27 15:55:38 +08:00
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static const struct regmap_range axp806_writeable_ranges[] = {
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regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
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regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
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regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
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2016-11-11 11:29:52 +08:00
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regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
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2016-08-27 15:55:38 +08:00
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};
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static const struct regmap_range axp806_volatile_ranges[] = {
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regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
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};
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static const struct regmap_access_table axp806_writeable_table = {
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.yes_ranges = axp806_writeable_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
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};
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static const struct regmap_access_table axp806_volatile_table = {
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.yes_ranges = axp806_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp152_pek_resources[] = {
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2015-07-11 20:59:56 +08:00
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DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
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DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp20x_ac_power_supply_resources[] = {
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2016-05-06 13:19:49 +08:00
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp20x_pek_resources[] = {
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2018-03-29 12:31:14 +08:00
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
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2014-05-01 20:29:27 +08:00
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp20x_usb_power_supply_resources[] = {
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2015-08-08 23:58:41 +08:00
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
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DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp22x_usb_power_supply_resources[] = {
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2016-06-03 01:18:55 +08:00
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DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
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DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
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};
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2019-03-21 16:48:48 +08:00
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/* AXP803 and AXP813/AXP818 share the same interrupts */
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static const struct resource axp803_usb_power_supply_resources[] = {
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DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
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DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp22x_pek_resources[] = {
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2018-03-29 12:31:14 +08:00
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DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
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DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
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2015-04-10 12:09:01 +08:00
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp288_power_button_resources[] = {
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2018-03-29 12:31:14 +08:00
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DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
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DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
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2015-10-14 16:16:26 +08:00
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};
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2018-03-29 12:31:13 +08:00
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static const struct resource axp288_fuel_gauge_resources[] = {
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2018-03-29 12:31:14 +08:00
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DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
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|
DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_WL2),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_WL1),
|
2014-10-07 12:17:14 +08:00
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct resource axp803_pek_resources[] = {
|
2018-03-29 12:31:14 +08:00
|
|
|
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
|
|
|
|
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
|
2017-04-17 19:57:40 +08:00
|
|
|
};
|
|
|
|
|
2018-07-13 00:04:49 +08:00
|
|
|
static const struct resource axp806_pek_resources[] = {
|
|
|
|
DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
|
|
|
|
DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct resource axp809_pek_resources[] = {
|
2018-03-29 12:31:14 +08:00
|
|
|
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
|
|
|
|
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
|
2016-03-29 17:22:26 +08:00
|
|
|
};
|
|
|
|
|
2015-07-11 20:59:56 +08:00
|
|
|
static const struct regmap_config axp152_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.wr_table = &axp152_writeable_table,
|
|
|
|
.volatile_table = &axp152_volatile_table,
|
|
|
|
.max_register = AXP152_PWM1_DUTY_CYCLE,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
};
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
static const struct regmap_config axp20x_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.wr_table = &axp20x_writeable_table,
|
|
|
|
.volatile_table = &axp20x_volatile_table,
|
2015-08-08 23:58:40 +08:00
|
|
|
.max_register = AXP20X_OCV(AXP20X_OCV_MAX),
|
2014-05-01 20:29:27 +08:00
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
};
|
|
|
|
|
2015-04-10 12:09:01 +08:00
|
|
|
static const struct regmap_config axp22x_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.wr_table = &axp22x_writeable_table,
|
|
|
|
.volatile_table = &axp22x_volatile_table,
|
|
|
|
.max_register = AXP22X_BATLOW_THRES1,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
};
|
|
|
|
|
2014-10-07 12:17:14 +08:00
|
|
|
static const struct regmap_config axp288_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.wr_table = &axp288_writeable_table,
|
|
|
|
.volatile_table = &axp288_volatile_table,
|
|
|
|
.max_register = AXP288_FG_TUNE5,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
};
|
|
|
|
|
2016-08-27 15:55:38 +08:00
|
|
|
static const struct regmap_config axp806_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.wr_table = &axp806_writeable_table,
|
|
|
|
.volatile_table = &axp806_volatile_table,
|
2016-11-11 11:29:52 +08:00
|
|
|
.max_register = AXP806_REG_ADDR_EXT,
|
2016-08-27 15:55:38 +08:00
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
};
|
|
|
|
|
2014-10-07 12:17:14 +08:00
|
|
|
#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
|
|
|
|
[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
|
2014-05-01 20:29:27 +08:00
|
|
|
|
2015-07-11 20:59:56 +08:00
|
|
|
static const struct regmap_irq axp152_regmap_irqs[] = {
|
|
|
|
INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
|
|
|
|
};
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
static const struct regmap_irq axp20x_regmap_irqs[] = {
|
2014-10-07 12:17:14 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
|
|
|
|
};
|
|
|
|
|
2015-04-10 12:09:01 +08:00
|
|
|
static const struct regmap_irq axp22x_regmap_irqs[] = {
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
|
|
|
|
};
|
|
|
|
|
2014-10-07 12:17:14 +08:00
|
|
|
/* some IRQs are compatible with axp20x models */
|
|
|
|
static const struct regmap_irq axp288_regmap_irqs[] = {
|
2014-11-12 03:30:09 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
|
2016-12-14 21:52:06 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
|
2014-10-07 12:17:14 +08:00
|
|
|
|
2014-11-12 03:30:09 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
|
2014-10-07 12:17:14 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
|
2014-11-12 03:30:09 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
|
2014-10-07 12:17:14 +08:00
|
|
|
|
|
|
|
INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
|
2014-11-12 03:30:09 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
|
2014-10-07 12:17:14 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
|
|
|
|
|
|
|
|
INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
|
|
|
|
|
|
|
|
INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
|
2014-11-12 03:30:09 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
|
2014-10-07 12:17:14 +08:00
|
|
|
|
|
|
|
INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
|
2014-05-01 20:29:27 +08:00
|
|
|
};
|
|
|
|
|
2017-04-17 19:57:40 +08:00
|
|
|
static const struct regmap_irq axp803_regmap_irqs[] = {
|
|
|
|
INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
|
|
|
|
};
|
|
|
|
|
2016-08-27 15:55:38 +08:00
|
|
|
static const struct regmap_irq axp806_regmap_irqs[] = {
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
|
2018-03-29 12:31:15 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
|
2016-08-27 15:55:38 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
|
2018-03-29 12:31:15 +08:00
|
|
|
INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
|
2016-08-27 15:55:38 +08:00
|
|
|
};
|
|
|
|
|
2016-03-29 17:22:26 +08:00
|
|
|
static const struct regmap_irq axp809_regmap_irqs[] = {
|
|
|
|
INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
|
|
|
|
INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
|
|
|
|
};
|
|
|
|
|
2015-07-11 20:59:56 +08:00
|
|
|
static const struct regmap_irq_chip axp152_regmap_irq_chip = {
|
|
|
|
.name = "axp152_irq_chip",
|
|
|
|
.status_base = AXP152_IRQ1_STATE,
|
|
|
|
.ack_base = AXP152_IRQ1_STATE,
|
|
|
|
.mask_base = AXP152_IRQ1_EN,
|
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
|
|
|
.irqs = axp152_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
|
|
|
|
.num_regs = 3,
|
|
|
|
};
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
|
|
|
|
.name = "axp20x_irq_chip",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
2014-10-07 12:17:14 +08:00
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
2014-05-01 20:29:27 +08:00
|
|
|
.irqs = axp20x_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
|
2014-10-07 12:17:14 +08:00
|
|
|
.num_regs = 5,
|
|
|
|
|
|
|
|
};
|
|
|
|
|
2015-04-10 12:09:01 +08:00
|
|
|
static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
|
|
|
|
.name = "axp22x_irq_chip",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
|
|
|
.irqs = axp22x_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
|
|
|
|
.num_regs = 5,
|
|
|
|
};
|
|
|
|
|
2014-10-07 12:17:14 +08:00
|
|
|
static const struct regmap_irq_chip axp288_regmap_irq_chip = {
|
|
|
|
.name = "axp288_irq_chip",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
2014-05-01 20:29:27 +08:00
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
2014-10-07 12:17:14 +08:00
|
|
|
.irqs = axp288_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
|
|
|
|
.num_regs = 6,
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
};
|
|
|
|
|
2017-04-17 19:57:40 +08:00
|
|
|
static const struct regmap_irq_chip axp803_regmap_irq_chip = {
|
|
|
|
.name = "axp803",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
|
|
|
.irqs = axp803_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
|
|
|
|
.num_regs = 6,
|
|
|
|
};
|
|
|
|
|
2016-08-27 15:55:38 +08:00
|
|
|
static const struct regmap_irq_chip axp806_regmap_irq_chip = {
|
|
|
|
.name = "axp806",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
|
|
|
.irqs = axp806_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
|
|
|
|
.num_regs = 2,
|
|
|
|
};
|
|
|
|
|
2016-03-29 17:22:26 +08:00
|
|
|
static const struct regmap_irq_chip axp809_regmap_irq_chip = {
|
|
|
|
.name = "axp809",
|
|
|
|
.status_base = AXP20X_IRQ1_STATE,
|
|
|
|
.ack_base = AXP20X_IRQ1_STATE,
|
|
|
|
.mask_base = AXP20X_IRQ1_EN,
|
|
|
|
.mask_invert = true,
|
|
|
|
.init_ack_masked = true,
|
|
|
|
.irqs = axp809_regmap_irqs,
|
|
|
|
.num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
|
|
|
|
.num_regs = 5,
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp20x_cells[] = {
|
2014-05-01 20:29:27 +08:00
|
|
|
{
|
2016-07-20 22:11:37 +08:00
|
|
|
.name = "axp20x-gpio",
|
|
|
|
.of_compatible = "x-powers,axp209-gpio",
|
|
|
|
}, {
|
2015-08-08 23:58:41 +08:00
|
|
|
.name = "axp20x-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_pek_resources),
|
|
|
|
.resources = axp20x_pek_resources,
|
2014-05-01 20:29:27 +08:00
|
|
|
}, {
|
2015-08-08 23:58:41 +08:00
|
|
|
.name = "axp20x-regulator",
|
2017-03-20 16:16:47 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-adc",
|
2018-02-28 18:35:56 +08:00
|
|
|
.of_compatible = "x-powers,axp209-adc",
|
2017-04-05 16:10:55 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-battery-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp209-battery-power-supply",
|
2016-05-06 13:19:49 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-ac-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp202-ac-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
|
|
|
|
.resources = axp20x_ac_power_supply_resources,
|
2015-08-08 23:58:41 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-usb-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp202-usb-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
|
|
|
|
.resources = axp20x_usb_power_supply_resources,
|
2014-05-01 20:29:27 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp221_cells[] = {
|
2016-12-09 19:04:14 +08:00
|
|
|
{
|
2017-07-26 16:28:27 +08:00
|
|
|
.name = "axp221-pek",
|
2016-12-09 19:04:14 +08:00
|
|
|
.num_resources = ARRAY_SIZE(axp22x_pek_resources),
|
|
|
|
.resources = axp22x_pek_resources,
|
|
|
|
}, {
|
|
|
|
.name = "axp20x-regulator",
|
2017-03-20 16:16:47 +08:00
|
|
|
}, {
|
2018-02-28 18:35:56 +08:00
|
|
|
.name = "axp22x-adc",
|
|
|
|
.of_compatible = "x-powers,axp221-adc",
|
2017-03-20 16:16:48 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-ac-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp221-ac-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
|
|
|
|
.resources = axp20x_ac_power_supply_resources,
|
2017-04-05 16:10:55 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-battery-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp221-battery-power-supply",
|
2016-12-09 19:04:14 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-usb-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp221-usb-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
|
|
|
|
.resources = axp22x_usb_power_supply_resources,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp223_cells[] = {
|
2015-04-10 12:09:01 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp22x_pek_resources),
|
|
|
|
.resources = axp22x_pek_resources,
|
2017-03-20 16:16:47 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp22x-adc",
|
2018-02-28 18:35:56 +08:00
|
|
|
.of_compatible = "x-powers,axp221-adc",
|
2017-04-05 16:10:55 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-battery-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp221-battery-power-supply",
|
2015-04-10 12:09:06 +08:00
|
|
|
}, {
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp20x-regulator",
|
2017-03-20 16:16:48 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-ac-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp221-ac-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
|
|
|
|
.resources = axp20x_ac_power_supply_resources,
|
2016-06-03 01:18:55 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-usb-power-supply",
|
2016-12-09 19:04:14 +08:00
|
|
|
.of_compatible = "x-powers,axp223-usb-power-supply",
|
2016-06-03 01:18:55 +08:00
|
|
|
.num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
|
|
|
|
.resources = axp22x_usb_power_supply_resources,
|
2015-04-10 12:09:01 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp152_cells[] = {
|
2015-07-11 20:59:56 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp20x-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp152_pek_resources),
|
|
|
|
.resources = axp152_pek_resources,
|
2015-07-11 20:59:56 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct resource axp288_adc_resources[] = {
|
2018-03-29 12:31:14 +08:00
|
|
|
DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
|
2014-10-07 12:17:14 +08:00
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct resource axp288_extcon_resources[] = {
|
2018-03-29 12:31:14 +08:00
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
|
2015-04-03 03:19:47 +08:00
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct resource axp288_charger_resources[] = {
|
2018-03-29 12:31:14 +08:00
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_OV),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_DONE),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
|
|
|
|
DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
|
2014-10-07 12:17:14 +08:00
|
|
|
};
|
|
|
|
|
2021-07-18 00:25:28 +08:00
|
|
|
static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
|
|
|
|
|
|
|
|
static const struct property_entry axp288_fuel_gauge_properties[] = {
|
|
|
|
PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct software_node axp288_fuel_gauge_sw_node = {
|
|
|
|
.name = "axp288_fuel_gauge",
|
|
|
|
.properties = axp288_fuel_gauge_properties,
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp288_cells[] = {
|
2014-10-07 12:17:14 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp288_adc",
|
|
|
|
.num_resources = ARRAY_SIZE(axp288_adc_resources),
|
|
|
|
.resources = axp288_adc_resources,
|
|
|
|
}, {
|
|
|
|
.name = "axp288_extcon",
|
|
|
|
.num_resources = ARRAY_SIZE(axp288_extcon_resources),
|
|
|
|
.resources = axp288_extcon_resources,
|
|
|
|
}, {
|
|
|
|
.name = "axp288_charger",
|
|
|
|
.num_resources = ARRAY_SIZE(axp288_charger_resources),
|
|
|
|
.resources = axp288_charger_resources,
|
|
|
|
}, {
|
|
|
|
.name = "axp288_fuel_gauge",
|
|
|
|
.num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
|
|
|
|
.resources = axp288_fuel_gauge_resources,
|
2021-07-18 00:25:28 +08:00
|
|
|
.swnode = &axp288_fuel_gauge_sw_node,
|
2018-12-09 01:58:46 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp288_power_button_resources),
|
|
|
|
.resources = axp288_power_button_resources,
|
|
|
|
}, {
|
|
|
|
.name = "axp288_pmic_acpi",
|
2014-11-24 17:24:47 +08:00
|
|
|
},
|
2014-10-07 12:17:14 +08:00
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp803_cells[] = {
|
2017-04-17 19:57:40 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp803_pek_resources),
|
|
|
|
.resources = axp803_pek_resources,
|
2018-12-09 01:58:47 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-gpio",
|
|
|
|
.of_compatible = "x-powers,axp813-gpio",
|
|
|
|
}, {
|
|
|
|
.name = "axp813-adc",
|
|
|
|
.of_compatible = "x-powers,axp813-adc",
|
|
|
|
}, {
|
|
|
|
.name = "axp20x-battery-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp813-battery-power-supply",
|
|
|
|
}, {
|
|
|
|
.name = "axp20x-ac-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp813-ac-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
|
|
|
|
.resources = axp20x_ac_power_supply_resources,
|
2019-04-19 00:18:02 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-usb-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
|
|
|
|
.resources = axp803_usb_power_supply_resources,
|
|
|
|
.of_compatible = "x-powers,axp813-usb-power-supply",
|
2017-05-18 15:16:50 +08:00
|
|
|
},
|
2018-12-09 01:58:46 +08:00
|
|
|
{ .name = "axp20x-regulator" },
|
2017-04-17 19:57:40 +08:00
|
|
|
};
|
|
|
|
|
2018-07-13 00:04:49 +08:00
|
|
|
static const struct mfd_cell axp806_self_working_cells[] = {
|
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp806_pek_resources),
|
|
|
|
.resources = axp806_pek_resources,
|
2018-07-13 00:04:49 +08:00
|
|
|
},
|
2018-12-09 01:58:46 +08:00
|
|
|
{ .name = "axp20x-regulator" },
|
2018-07-13 00:04:49 +08:00
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp806_cells[] = {
|
2016-08-27 15:55:38 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.id = 2,
|
|
|
|
.name = "axp20x-regulator",
|
2016-08-27 15:55:38 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp809_cells[] = {
|
2016-03-29 17:22:26 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp809_pek_resources),
|
|
|
|
.resources = axp809_pek_resources,
|
2016-03-29 17:22:26 +08:00
|
|
|
}, {
|
2018-12-09 01:58:46 +08:00
|
|
|
.id = 1,
|
|
|
|
.name = "axp20x-regulator",
|
2016-03-29 17:22:26 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-03-29 12:31:13 +08:00
|
|
|
static const struct mfd_cell axp813_cells[] = {
|
mfd: axp20x: Add support for AXP813 PMIC
The X-Powers AXP813 PMIC is normally used with Allwinner's A83T SoC.
It has the same range of functions as other X-Powers PMICs, such as
DC-DC buck converter and linear regulator outputs, AC-IN and VBUS
power supplies, power button trigger, GPIOs, ADCs, and a battery
charger.
Note that the IRQ table given in the datasheet is incorrect: in IRQ
enable/status registers 1, there are separate IRQs for ACIN and VBUS,
instead of bits [7:5] being the same as bits [4:2]. So it shares the
same IRQs as the AXP803, rather than the AXP288.
This patch adds basic mfd support for it, with only the power button
enabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-07-26 16:28:26 +08:00
|
|
|
{
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp221-pek",
|
|
|
|
.num_resources = ARRAY_SIZE(axp803_pek_resources),
|
|
|
|
.resources = axp803_pek_resources,
|
2017-10-18 16:31:31 +08:00
|
|
|
}, {
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp20x-regulator",
|
2017-12-05 22:46:47 +08:00
|
|
|
}, {
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp20x-gpio",
|
|
|
|
.of_compatible = "x-powers,axp813-gpio",
|
2018-02-28 18:35:57 +08:00
|
|
|
}, {
|
2018-12-09 01:58:46 +08:00
|
|
|
.name = "axp813-adc",
|
|
|
|
.of_compatible = "x-powers,axp813-adc",
|
2018-02-28 18:36:01 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-battery-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp813-battery-power-supply",
|
2018-11-21 01:52:10 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-ac-power-supply",
|
|
|
|
.of_compatible = "x-powers,axp813-ac-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
|
|
|
|
.resources = axp20x_ac_power_supply_resources,
|
2019-03-21 16:48:48 +08:00
|
|
|
}, {
|
|
|
|
.name = "axp20x-usb-power-supply",
|
|
|
|
.num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
|
|
|
|
.resources = axp803_usb_power_supply_resources,
|
|
|
|
.of_compatible = "x-powers,axp813-usb-power-supply",
|
2018-02-28 18:35:57 +08:00
|
|
|
},
|
mfd: axp20x: Add support for AXP813 PMIC
The X-Powers AXP813 PMIC is normally used with Allwinner's A83T SoC.
It has the same range of functions as other X-Powers PMICs, such as
DC-DC buck converter and linear regulator outputs, AC-IN and VBUS
power supplies, power button trigger, GPIOs, ADCs, and a battery
charger.
Note that the IRQ table given in the datasheet is incorrect: in IRQ
enable/status registers 1, there are separate IRQs for ACIN and VBUS,
instead of bits [7:5] being the same as bits [4:2]. So it shares the
same IRQs as the AXP803, rather than the AXP288.
This patch adds basic mfd support for it, with only the power button
enabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-07-26 16:28:26 +08:00
|
|
|
};
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
static struct axp20x_dev *axp20x_pm_power_off;
|
|
|
|
static void axp20x_power_off(void)
|
|
|
|
{
|
2014-10-07 12:17:14 +08:00
|
|
|
if (axp20x_pm_power_off->variant == AXP288_ID)
|
|
|
|
return;
|
|
|
|
|
2014-05-01 20:29:27 +08:00
|
|
|
regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
|
|
|
|
AXP20X_OFF);
|
2016-06-05 21:50:48 +08:00
|
|
|
|
|
|
|
/* Give capacitors etc. time to drain to avoid kernel panic msg. */
|
|
|
|
msleep(500);
|
2014-05-01 20:29:27 +08:00
|
|
|
}
|
|
|
|
|
2016-02-12 10:02:42 +08:00
|
|
|
int axp20x_match_device(struct axp20x_dev *axp20x)
|
2014-10-07 12:17:14 +08:00
|
|
|
{
|
2016-02-12 10:02:39 +08:00
|
|
|
struct device *dev = axp20x->dev;
|
2014-10-07 12:17:14 +08:00
|
|
|
const struct acpi_device_id *acpi_id;
|
|
|
|
const struct of_device_id *of_id;
|
|
|
|
|
|
|
|
if (dev->of_node) {
|
2016-02-12 10:02:40 +08:00
|
|
|
of_id = of_match_device(dev->driver->of_match_table, dev);
|
2014-10-07 12:17:14 +08:00
|
|
|
if (!of_id) {
|
|
|
|
dev_err(dev, "Unable to match OF ID\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
2016-02-12 10:02:43 +08:00
|
|
|
axp20x->variant = (long)of_id->data;
|
2014-10-07 12:17:14 +08:00
|
|
|
} else {
|
|
|
|
acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
|
|
|
|
if (!acpi_id || !acpi_id->driver_data) {
|
|
|
|
dev_err(dev, "Unable to match ACPI ID and data\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
2016-02-12 10:02:43 +08:00
|
|
|
axp20x->variant = (long)acpi_id->driver_data;
|
2014-10-07 12:17:14 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (axp20x->variant) {
|
2015-07-11 20:59:56 +08:00
|
|
|
case AXP152_ID:
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
|
|
|
|
axp20x->cells = axp152_cells;
|
|
|
|
axp20x->regmap_cfg = &axp152_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
|
|
|
|
break;
|
2014-10-07 12:17:14 +08:00
|
|
|
case AXP202_ID:
|
|
|
|
case AXP209_ID:
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
|
|
|
|
axp20x->cells = axp20x_cells;
|
|
|
|
axp20x->regmap_cfg = &axp20x_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
|
|
|
|
break;
|
2015-04-10 12:09:01 +08:00
|
|
|
case AXP221_ID:
|
2016-12-09 19:04:14 +08:00
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
|
|
|
|
axp20x->cells = axp221_cells;
|
|
|
|
axp20x->regmap_cfg = &axp22x_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
|
|
|
|
break;
|
2016-02-12 10:02:44 +08:00
|
|
|
case AXP223_ID:
|
2016-12-09 19:04:14 +08:00
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
|
|
|
|
axp20x->cells = axp223_cells;
|
2015-04-10 12:09:01 +08:00
|
|
|
axp20x->regmap_cfg = &axp22x_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
|
|
|
|
break;
|
2014-10-07 12:17:14 +08:00
|
|
|
case AXP288_ID:
|
|
|
|
axp20x->cells = axp288_cells;
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
|
|
|
|
axp20x->regmap_cfg = &axp288_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
|
2016-12-14 21:52:05 +08:00
|
|
|
axp20x->irq_flags = IRQF_TRIGGER_LOW;
|
2014-10-07 12:17:14 +08:00
|
|
|
break;
|
2017-04-17 19:57:40 +08:00
|
|
|
case AXP803_ID:
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
|
|
|
|
axp20x->cells = axp803_cells;
|
|
|
|
axp20x->regmap_cfg = &axp288_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
|
|
|
|
break;
|
2016-08-27 15:55:38 +08:00
|
|
|
case AXP806_ID:
|
2021-05-19 18:41:37 +08:00
|
|
|
/*
|
|
|
|
* Don't register the power key part if in slave mode or
|
|
|
|
* if there is no interrupt line.
|
|
|
|
*/
|
2018-07-13 00:04:49 +08:00
|
|
|
if (of_property_read_bool(axp20x->dev->of_node,
|
2021-05-19 18:41:37 +08:00
|
|
|
"x-powers,self-working-mode") &&
|
|
|
|
axp20x->irq > 0) {
|
2018-07-13 00:04:49 +08:00
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
|
|
|
|
axp20x->cells = axp806_self_working_cells;
|
|
|
|
} else {
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
|
|
|
|
axp20x->cells = axp806_cells;
|
|
|
|
}
|
2016-08-27 15:55:38 +08:00
|
|
|
axp20x->regmap_cfg = &axp806_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
|
|
|
|
break;
|
2016-03-29 17:22:26 +08:00
|
|
|
case AXP809_ID:
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
|
|
|
|
axp20x->cells = axp809_cells;
|
|
|
|
axp20x->regmap_cfg = &axp22x_regmap_config;
|
|
|
|
axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
|
|
|
|
break;
|
mfd: axp20x: Add support for AXP813 PMIC
The X-Powers AXP813 PMIC is normally used with Allwinner's A83T SoC.
It has the same range of functions as other X-Powers PMICs, such as
DC-DC buck converter and linear regulator outputs, AC-IN and VBUS
power supplies, power button trigger, GPIOs, ADCs, and a battery
charger.
Note that the IRQ table given in the datasheet is incorrect: in IRQ
enable/status registers 1, there are separate IRQs for ACIN and VBUS,
instead of bits [7:5] being the same as bits [4:2]. So it shares the
same IRQs as the AXP803, rather than the AXP288.
This patch adds basic mfd support for it, with only the power button
enabled.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-07-26 16:28:26 +08:00
|
|
|
case AXP813_ID:
|
|
|
|
axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
|
|
|
|
axp20x->cells = axp813_cells;
|
|
|
|
axp20x->regmap_cfg = &axp288_regmap_config;
|
|
|
|
/*
|
|
|
|
* The IRQ table given in the datasheet is incorrect.
|
|
|
|
* In IRQ enable/status registers 1, there are separate
|
|
|
|
* IRQs for ACIN and VBUS, instead of bits [7:5] being
|
|
|
|
* the same as bits [4:2]. So it shares the same IRQs
|
|
|
|
* as the AXP803, rather than the AXP288.
|
|
|
|
*/
|
|
|
|
axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
|
|
|
|
break;
|
2014-10-07 12:17:14 +08:00
|
|
|
default:
|
|
|
|
dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
dev_info(dev, "AXP20x variant %s found\n",
|
2016-02-12 10:02:43 +08:00
|
|
|
axp20x_model_names[axp20x->variant]);
|
2014-10-07 12:17:14 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2016-02-12 10:02:42 +08:00
|
|
|
EXPORT_SYMBOL(axp20x_match_device);
|
2014-10-07 12:17:14 +08:00
|
|
|
|
2016-02-12 10:02:42 +08:00
|
|
|
int axp20x_device_probe(struct axp20x_dev *axp20x)
|
2014-05-01 20:29:27 +08:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
mfd: axp20x: Fix AXP806 access errors on cold boot
The AXP806 supports either master/standalone or slave mode.
Slave mode allows sharing the serial bus, even with multiple
AXP806 which all have the same hardware address.
This is done with extra "serial interface address extension",
or AXP806_BUS_ADDR_EXT, and "register address extension", or
AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1 bit customizable at the factory, and 1 bit depending on the
state of an external pin. The latter is writable. Only when
the these device addressing bits (in the upper 4 bits of the
registers) match, will the device respond to operations on
its other registers.
The AXP806_REG_ADDR_EXT was previously configured by Allwinner's
bootloader. Work on U-boot SPL support now allows us to switch
to mainline U-boot, which doesn't do this for us. There might
be other bare minimum bootloaders out there which don't to this
either. It's best to handle this in the kernel.
This patch sets AXP806_REG_ADDR_EXT to 0x10, which is what we
know to be the proper value for a standard AXP806 in slave mode.
Afterwards it will reinitialize the regmap cache, to purge any
invalid stale values.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-05 12:01:03 +08:00
|
|
|
/*
|
|
|
|
* The AXP806 supports either master/standalone or slave mode.
|
|
|
|
* Slave mode allows sharing the serial bus, even with multiple
|
|
|
|
* AXP806 which all have the same hardware address.
|
|
|
|
*
|
|
|
|
* This is done with extra "serial interface address extension",
|
|
|
|
* or AXP806_BUS_ADDR_EXT, and "register address extension", or
|
|
|
|
* AXP806_REG_ADDR_EXT, registers. The former is read-only, with
|
|
|
|
* 1 bit customizable at the factory, and 1 bit depending on the
|
|
|
|
* state of an external pin. The latter is writable. The device
|
|
|
|
* will only respond to operations to its other registers when
|
|
|
|
* the these device addressing bits (in the upper 4 bits of the
|
|
|
|
* registers) match.
|
|
|
|
*
|
2017-02-23 03:42:02 +08:00
|
|
|
* By default we support an AXP806 chained to an AXP809 in slave
|
|
|
|
* mode. Boards which use an AXP806 in master mode can set the
|
|
|
|
* property "x-powers,master-mode" to override the default.
|
mfd: axp20x: Fix AXP806 access errors on cold boot
The AXP806 supports either master/standalone or slave mode.
Slave mode allows sharing the serial bus, even with multiple
AXP806 which all have the same hardware address.
This is done with extra "serial interface address extension",
or AXP806_BUS_ADDR_EXT, and "register address extension", or
AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1 bit customizable at the factory, and 1 bit depending on the
state of an external pin. The latter is writable. Only when
the these device addressing bits (in the upper 4 bits of the
registers) match, will the device respond to operations on
its other registers.
The AXP806_REG_ADDR_EXT was previously configured by Allwinner's
bootloader. Work on U-boot SPL support now allows us to switch
to mainline U-boot, which doesn't do this for us. There might
be other bare minimum bootloaders out there which don't to this
either. It's best to handle this in the kernel.
This patch sets AXP806_REG_ADDR_EXT to 0x10, which is what we
know to be the proper value for a standard AXP806 in slave mode.
Afterwards it will reinitialize the regmap cache, to purge any
invalid stale values.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-05 12:01:03 +08:00
|
|
|
*/
|
2017-02-23 03:42:02 +08:00
|
|
|
if (axp20x->variant == AXP806_ID) {
|
|
|
|
if (of_property_read_bool(axp20x->dev->of_node,
|
2018-07-13 00:04:49 +08:00
|
|
|
"x-powers,master-mode") ||
|
|
|
|
of_property_read_bool(axp20x->dev->of_node,
|
|
|
|
"x-powers,self-working-mode"))
|
2017-02-23 03:42:02 +08:00
|
|
|
regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
|
|
|
|
AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
|
|
|
|
else
|
|
|
|
regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
|
|
|
|
AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
|
|
|
|
}
|
mfd: axp20x: Fix AXP806 access errors on cold boot
The AXP806 supports either master/standalone or slave mode.
Slave mode allows sharing the serial bus, even with multiple
AXP806 which all have the same hardware address.
This is done with extra "serial interface address extension",
or AXP806_BUS_ADDR_EXT, and "register address extension", or
AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1 bit customizable at the factory, and 1 bit depending on the
state of an external pin. The latter is writable. Only when
the these device addressing bits (in the upper 4 bits of the
registers) match, will the device respond to operations on
its other registers.
The AXP806_REG_ADDR_EXT was previously configured by Allwinner's
bootloader. Work on U-boot SPL support now allows us to switch
to mainline U-boot, which doesn't do this for us. There might
be other bare minimum bootloaders out there which don't to this
either. It's best to handle this in the kernel.
This patch sets AXP806_REG_ADDR_EXT to 0x10, which is what we
know to be the proper value for a standard AXP806 in slave mode.
Afterwards it will reinitialize the regmap cache, to purge any
invalid stale values.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-01-05 12:01:03 +08:00
|
|
|
|
2021-05-19 18:41:37 +08:00
|
|
|
/* Only if there is an interrupt line connected towards the CPU. */
|
|
|
|
if (axp20x->irq > 0) {
|
|
|
|
ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
|
|
|
|
IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
|
|
|
|
-1, axp20x->regmap_irq_chip,
|
|
|
|
&axp20x->regmap_irqc);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(axp20x->dev, "failed to add irq chip: %d\n",
|
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
2014-05-01 20:29:27 +08:00
|
|
|
}
|
|
|
|
|
2014-10-07 12:17:14 +08:00
|
|
|
ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
|
2016-02-12 10:02:43 +08:00
|
|
|
axp20x->nr_cells, NULL, 0, NULL);
|
2014-05-01 20:29:27 +08:00
|
|
|
|
|
|
|
if (ret) {
|
2016-02-12 10:02:42 +08:00
|
|
|
dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
|
|
|
|
regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
|
2014-05-01 20:29:27 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!pm_power_off) {
|
|
|
|
axp20x_pm_power_off = axp20x;
|
|
|
|
pm_power_off = axp20x_power_off;
|
|
|
|
}
|
|
|
|
|
2016-02-12 10:02:42 +08:00
|
|
|
dev_info(axp20x->dev, "AXP20X driver loaded\n");
|
2014-05-01 20:29:27 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2016-02-12 10:02:42 +08:00
|
|
|
EXPORT_SYMBOL(axp20x_device_probe);
|
2014-05-01 20:29:27 +08:00
|
|
|
|
2020-11-26 18:41:42 +08:00
|
|
|
void axp20x_device_remove(struct axp20x_dev *axp20x)
|
2014-05-01 20:29:27 +08:00
|
|
|
{
|
|
|
|
if (axp20x == axp20x_pm_power_off) {
|
|
|
|
axp20x_pm_power_off = NULL;
|
|
|
|
pm_power_off = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
mfd_remove_devices(axp20x->dev);
|
2016-02-12 10:02:42 +08:00
|
|
|
regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
|
2014-05-01 20:29:27 +08:00
|
|
|
}
|
2016-02-12 10:02:42 +08:00
|
|
|
EXPORT_SYMBOL(axp20x_device_remove);
|
2014-05-01 20:29:27 +08:00
|
|
|
|
|
|
|
MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
|
|
|
|
MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
|
|
|
|
MODULE_LICENSE("GPL");
|