License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2008-02-03 21:06:26 +08:00
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#ifndef _LINUX_DMA_MAPPING_H
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#define _LINUX_DMA_MAPPING_H
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2005-04-17 06:20:36 +08:00
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2015-11-07 08:32:51 +08:00
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#include <linux/sizes.h>
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2011-11-03 04:39:33 +08:00
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#include <linux/string.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/device.h>
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#include <linux/err.h>
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2016-01-21 07:02:05 +08:00
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#include <linux/dma-debug.h>
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2011-06-16 19:01:34 +08:00
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#include <linux/dma-direction.h>
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2009-01-05 22:59:01 +08:00
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#include <linux/scatterlist.h>
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2016-01-21 07:02:05 +08:00
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#include <linux/bug.h>
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2017-07-18 05:10:22 +08:00
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#include <linux/mem_encrypt.h>
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2024-06-11 20:26:44 +08:00
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#include <linux/kabi.h>
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2005-04-17 06:20:36 +08:00
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2016-08-04 04:46:00 +08:00
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/**
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* List of possible attributes associated with a DMA mapping. The semantics
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* of each attribute should be defined in Documentation/DMA-attributes.txt.
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*
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* DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
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* forces all pending DMA writes to complete.
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*/
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#define DMA_ATTR_WRITE_BARRIER (1UL << 0)
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/*
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* DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
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* may be weakly ordered, that is that reads and writes may pass each other.
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*/
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#define DMA_ATTR_WEAK_ORDERING (1UL << 1)
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/*
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* DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
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* buffered to improve performance.
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*/
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#define DMA_ATTR_WRITE_COMBINE (1UL << 2)
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/*
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* DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
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* consistent or non-consistent memory as it sees fit.
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*/
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#define DMA_ATTR_NON_CONSISTENT (1UL << 3)
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/*
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* DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
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* virtual mapping for the allocated buffer.
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*/
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#define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
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/*
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* DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
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* the CPU cache for the given buffer assuming that it has been already
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* transferred to 'device' domain.
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*/
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#define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
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/*
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* DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
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* in physical memory.
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*/
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#define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
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/*
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* DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
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* that it's probably not worth the time to try to allocate memory to in a way
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* that gives better TLB efficiency.
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*/
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#define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
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2016-10-12 04:54:14 +08:00
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/*
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* DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
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* allocation failure reports (similarly to __GFP_NOWARN).
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*/
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#define DMA_ATTR_NO_WARN (1UL << 8)
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2016-08-04 04:46:00 +08:00
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2017-01-06 21:28:11 +08:00
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/*
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* DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
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* accessible at an elevated privilege level (and ideally inaccessible or
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* at least read-only at lesser-privileged levels).
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*/
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#define DMA_ATTR_PRIVILEGED (1UL << 9)
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2014-05-01 01:20:53 +08:00
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/*
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* A dma_addr_t can hold any valid DMA or bus address for the platform.
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* It can be given to a device to use as a DMA source or target. A CPU cannot
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* reference a dma_addr_t directly because there may be translation between
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* its physical address space and the bus address space.
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*/
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2009-01-05 22:59:01 +08:00
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struct dma_map_ops {
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2012-03-28 22:36:27 +08:00
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void* (*alloc)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2012-03-28 22:36:27 +08:00
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void (*free)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2011-12-21 23:55:33 +08:00
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int (*mmap)(struct device *, struct vm_area_struct *,
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2016-08-04 04:46:00 +08:00
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void *, dma_addr_t, size_t,
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unsigned long attrs);
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2011-12-21 23:55:33 +08:00
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2012-06-13 16:05:52 +08:00
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int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
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2016-08-04 04:46:00 +08:00
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dma_addr_t, size_t, unsigned long attrs);
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2012-06-13 16:05:52 +08:00
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2009-01-05 22:59:01 +08:00
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2009-01-05 22:59:01 +08:00
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void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2015-02-11 20:53:15 +08:00
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/*
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* map_sg returns 0 on error and a value > 0 on success.
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* It should never return a value < 0.
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*/
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2009-01-05 22:59:01 +08:00
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int (*map_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2009-01-05 22:59:01 +08:00
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void (*unmap_sg)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs);
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2016-08-10 19:22:14 +08:00
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dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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2009-01-05 22:59:01 +08:00
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void (*sync_single_for_cpu)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_single_for_device)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_sg_for_cpu)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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void (*sync_sg_for_device)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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2017-08-27 16:37:15 +08:00
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void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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2009-01-05 22:59:01 +08:00
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int (*dma_supported)(struct device *dev, u64 mask);
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2011-06-24 17:05:23 +08:00
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u64 (*get_required_mask)(struct device *dev);
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2019-02-07 19:59:15 +08:00
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size_t (*max_mapping_size)(struct device *dev);
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2019-08-28 20:35:40 +08:00
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unsigned long (*get_merge_boundary)(struct device *dev);
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2024-06-11 20:26:44 +08:00
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KABI_RESERVE(1);
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KABI_RESERVE(2);
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KABI_RESERVE(3);
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KABI_RESERVE(4);
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2009-01-05 22:59:01 +08:00
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};
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2018-11-22 01:52:35 +08:00
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#define DMA_MAPPING_ERROR (~(dma_addr_t)0)
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2017-01-21 05:04:07 +08:00
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extern const struct dma_map_ops dma_virt_ops;
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2018-12-07 05:14:44 +08:00
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extern const struct dma_map_ops dma_dummy_ops;
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2016-02-03 13:46:32 +08:00
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2007-10-18 18:05:07 +08:00
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#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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2007-10-18 18:05:06 +08:00
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2007-10-16 16:23:55 +08:00
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#define DMA_MASK_NONE 0x0ULL
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2006-09-29 16:59:48 +08:00
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static inline int valid_dma_direction(int dma_direction)
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{
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return ((dma_direction == DMA_BIDIRECTIONAL) ||
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(dma_direction == DMA_TO_DEVICE) ||
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(dma_direction == DMA_FROM_DEVICE));
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}
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2019-02-04 03:12:02 +08:00
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#ifdef CONFIG_DMA_DECLARE_COHERENT
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2016-01-21 07:02:09 +08:00
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/*
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* These three functions are only for dma allocator.
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* Don't use them in device drivers.
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*/
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2017-07-20 18:19:58 +08:00
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int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
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2016-01-21 07:02:09 +08:00
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dma_addr_t *dma_handle, void **ret);
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2017-07-20 18:19:58 +08:00
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int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
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2016-01-21 07:02:09 +08:00
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2017-07-20 18:19:58 +08:00
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int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
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2016-01-21 07:02:09 +08:00
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void *cpu_addr, size_t size, int *ret);
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2017-07-20 18:19:58 +08:00
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2024-06-11 20:08:33 +08:00
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void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size, dma_addr_t *dma_handle);
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2017-07-20 18:19:58 +08:00
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int dma_release_from_global_coherent(int order, void *vaddr);
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int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
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size_t size, int *ret);
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2016-01-21 07:02:09 +08:00
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#else
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2017-07-20 18:19:58 +08:00
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#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
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#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
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#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
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2024-06-11 20:08:33 +08:00
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static inline void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
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2017-07-20 18:19:58 +08:00
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dma_addr_t *dma_handle)
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{
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return NULL;
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}
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static inline int dma_release_from_global_coherent(int order, void *vaddr)
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{
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return 0;
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}
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static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
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void *cpu_addr, size_t size,
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int *ret)
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{
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return 0;
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}
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2019-02-04 03:12:02 +08:00
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#endif /* CONFIG_DMA_DECLARE_COHERENT */
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2016-01-21 07:02:09 +08:00
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2018-12-07 05:39:32 +08:00
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static inline bool dma_is_direct(const struct dma_map_ops *ops)
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|
|
|
|
{
|
|
|
|
|
return likely(!ops);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* All the dma_direct_* declarations are here just for the indirect call bypass,
|
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|
|
|
* and must not be used directly drivers!
|
|
|
|
|
*/
|
|
|
|
|
dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
|
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|
|
|
unsigned long offset, size_t size, enum dma_data_direction dir,
|
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|
|
|
unsigned long attrs);
|
|
|
|
|
int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
|
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|
|
|
enum dma_data_direction dir, unsigned long attrs);
|
2019-01-05 01:20:05 +08:00
|
|
|
dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
|
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|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs);
|
2018-12-07 05:39:32 +08:00
|
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|
|
|
|
|
#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
|
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|
|
|
defined(CONFIG_SWIOTLB)
|
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|
|
void dma_direct_sync_single_for_device(struct device *dev,
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|
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir);
|
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|
|
|
void dma_direct_sync_sg_for_device(struct device *dev,
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|
|
|
struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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|
|
|
#else
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|
|
|
|
static inline void dma_direct_sync_single_for_device(struct device *dev,
|
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|
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_direct_sync_sg_for_device(struct device *dev,
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|
|
struct scatterlist *sgl, int nents, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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|
|
|
defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
|
|
|
|
|
defined(CONFIG_SWIOTLB)
|
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|
|
|
void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
|
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|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs);
|
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|
|
|
void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
|
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|
|
|
int nents, enum dma_data_direction dir, unsigned long attrs);
|
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|
|
|
void dma_direct_sync_single_for_cpu(struct device *dev,
|
|
|
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir);
|
|
|
|
|
void dma_direct_sync_sg_for_cpu(struct device *dev,
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|
|
|
struct scatterlist *sgl, int nents, enum dma_data_direction dir);
|
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|
|
|
#else
|
|
|
|
|
static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
|
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|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_direct_unmap_sg(struct device *dev,
|
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|
|
|
struct scatterlist *sgl, int nents, enum dma_data_direction dir,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_direct_sync_single_for_cpu(struct device *dev,
|
|
|
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
|
|
|
|
|
struct scatterlist *sgl, int nents, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2019-02-07 19:59:15 +08:00
|
|
|
size_t dma_direct_max_mapping_size(struct device *dev);
|
|
|
|
|
|
2018-12-26 14:52:13 +08:00
|
|
|
#ifdef CONFIG_HAS_DMA
|
|
|
|
|
#include <asm/dma-mapping.h>
|
|
|
|
|
|
|
|
|
|
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
|
|
|
|
|
{
|
2019-03-14 01:45:21 +08:00
|
|
|
if (dev->dma_ops)
|
2018-12-26 14:52:13 +08:00
|
|
|
return dev->dma_ops;
|
2019-03-14 01:45:21 +08:00
|
|
|
return get_arch_dma_ops(dev->bus);
|
2018-12-26 14:52:13 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void set_dma_ops(struct device *dev,
|
|
|
|
|
const struct dma_map_ops *dma_ops)
|
|
|
|
|
{
|
|
|
|
|
dev->dma_ops = dma_ops;
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-25 15:50:35 +08:00
|
|
|
static inline dma_addr_t dma_map_page_attrs(struct device *dev,
|
|
|
|
|
struct page *page, size_t offset, size_t size,
|
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
2016-01-21 07:02:05 +08:00
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
dma_addr_t addr;
|
|
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
2018-12-25 15:50:35 +08:00
|
|
|
addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
|
2018-12-07 05:39:32 +08:00
|
|
|
else
|
2018-12-25 15:50:35 +08:00
|
|
|
addr = ops->map_page(dev, page, offset, size, dir, attrs);
|
|
|
|
|
debug_dma_map_page(dev, page, offset, size, dir, addr);
|
|
|
|
|
|
2016-01-21 07:02:05 +08:00
|
|
|
return addr;
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-25 15:50:35 +08:00
|
|
|
static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
2016-01-21 07:02:05 +08:00
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_unmap_page(dev, addr, size, dir, attrs);
|
|
|
|
|
else if (ops->unmap_page)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->unmap_page(dev, addr, size, dir, attrs);
|
2018-12-25 15:50:35 +08:00
|
|
|
debug_dma_unmap_page(dev, addr, size, dir);
|
2018-12-07 04:24:27 +08:00
|
|
|
}
|
|
|
|
|
|
2016-01-21 07:02:05 +08:00
|
|
|
/*
|
|
|
|
|
* dma_maps_sg_attrs returns 0 on error and > 0 on success.
|
|
|
|
|
* It should never return a value < 0.
|
|
|
|
|
*/
|
|
|
|
|
static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
|
|
|
int nents, enum dma_data_direction dir,
|
2016-08-04 04:46:00 +08:00
|
|
|
unsigned long attrs)
|
2016-01-21 07:02:05 +08:00
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2017-11-16 09:35:51 +08:00
|
|
|
int ents;
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
|
|
|
|
|
else
|
|
|
|
|
ents = ops->map_sg(dev, sg, nents, dir, attrs);
|
2016-01-21 07:02:05 +08:00
|
|
|
BUG_ON(ents < 0);
|
|
|
|
|
debug_dma_map_sg(dev, sg, nents, ents, dir);
|
|
|
|
|
|
|
|
|
|
return ents;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
|
|
|
int nents, enum dma_data_direction dir,
|
2016-08-04 04:46:00 +08:00
|
|
|
unsigned long attrs)
|
2016-01-21 07:02:05 +08:00
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
|
|
|
|
debug_dma_unmap_sg(dev, sg, nents, dir);
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
|
|
|
|
|
else if (ops->unmap_sg)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->unmap_sg(dev, sg, nents, dir, attrs);
|
|
|
|
|
}
|
|
|
|
|
|
2016-08-10 19:22:16 +08:00
|
|
|
static inline dma_addr_t dma_map_resource(struct device *dev,
|
|
|
|
|
phys_addr_t phys_addr,
|
|
|
|
|
size_t size,
|
|
|
|
|
enum dma_data_direction dir,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2019-01-05 01:20:05 +08:00
|
|
|
dma_addr_t addr = DMA_MAPPING_ERROR;
|
2016-08-10 19:22:16 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
|
|
|
|
|
|
|
|
|
/* Don't allow RAM to be mapped */
|
2019-01-05 00:17:53 +08:00
|
|
|
if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
|
|
|
|
|
return DMA_MAPPING_ERROR;
|
2016-08-10 19:22:16 +08:00
|
|
|
|
2019-01-05 01:20:05 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
|
|
|
|
|
else if (ops->map_resource)
|
2016-08-10 19:22:16 +08:00
|
|
|
addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
|
|
|
|
|
|
|
|
|
|
debug_dma_map_resource(dev, phys_addr, size, dir, addr);
|
|
|
|
|
return addr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-08-10 19:22:16 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2019-01-05 01:20:05 +08:00
|
|
|
if (!dma_is_direct(ops) && ops->unmap_resource)
|
2016-08-10 19:22:16 +08:00
|
|
|
ops->unmap_resource(dev, addr, size, dir, attrs);
|
|
|
|
|
debug_dma_unmap_resource(dev, addr, size, dir);
|
|
|
|
|
}
|
|
|
|
|
|
2016-01-21 07:02:05 +08:00
|
|
|
static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
|
else if (ops->sync_single_for_cpu)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
|
debug_dma_sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_sync_single_for_device(struct device *dev,
|
|
|
|
|
dma_addr_t addr, size_t size,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_sync_single_for_device(dev, addr, size, dir);
|
|
|
|
|
else if (ops->sync_single_for_device)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->sync_single_for_device(dev, addr, size, dir);
|
|
|
|
|
debug_dma_sync_single_for_device(dev, addr, size, dir);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
|
|
|
int nelems, enum dma_data_direction dir)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
|
else if (ops->sync_sg_for_cpu)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
|
debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
|
|
|
int nelems, enum dma_data_direction dir)
|
|
|
|
|
{
|
2017-01-21 05:04:01 +08:00
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2018-12-07 05:39:32 +08:00
|
|
|
if (dma_is_direct(ops))
|
|
|
|
|
dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
|
else if (ops->sync_sg_for_device)
|
2016-01-21 07:02:05 +08:00
|
|
|
ops->sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
|
debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-26 14:52:13 +08:00
|
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
|
|
|
{
|
|
|
|
|
debug_dma_mapping_error(dev, dma_addr);
|
|
|
|
|
|
|
|
|
|
if (dma_addr == DMA_MAPPING_ERROR)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
|
|
|
gfp_t flag, unsigned long attrs);
|
|
|
|
|
void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
|
|
|
|
|
dma_addr_t dma_handle, unsigned long attrs);
|
|
|
|
|
void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
|
|
|
gfp_t gfp, unsigned long attrs);
|
|
|
|
|
void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
|
|
|
|
|
dma_addr_t dma_handle);
|
|
|
|
|
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
|
|
|
enum dma_data_direction dir);
|
|
|
|
|
int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
|
unsigned long attrs);
|
|
|
|
|
int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
|
unsigned long attrs);
|
2019-08-03 18:31:25 +08:00
|
|
|
bool dma_can_mmap(struct device *dev);
|
2018-12-26 14:52:13 +08:00
|
|
|
int dma_supported(struct device *dev, u64 mask);
|
|
|
|
|
int dma_set_mask(struct device *dev, u64 mask);
|
|
|
|
|
int dma_set_coherent_mask(struct device *dev, u64 mask);
|
|
|
|
|
u64 dma_get_required_mask(struct device *dev);
|
2019-02-07 19:59:15 +08:00
|
|
|
size_t dma_max_mapping_size(struct device *dev);
|
2019-08-28 20:35:40 +08:00
|
|
|
unsigned long dma_get_merge_boundary(struct device *dev);
|
2018-12-26 14:52:13 +08:00
|
|
|
#else /* CONFIG_HAS_DMA */
|
|
|
|
|
static inline dma_addr_t dma_map_page_attrs(struct device *dev,
|
|
|
|
|
struct page *page, size_t offset, size_t size,
|
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
|
|
|
int nents, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_unmap_sg_attrs(struct device *dev,
|
|
|
|
|
struct scatterlist *sg, int nents, enum dma_data_direction dir,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline dma_addr_t dma_map_resource(struct device *dev,
|
|
|
|
|
phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_sync_single_for_device(struct device *dev,
|
|
|
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_sync_sg_for_cpu(struct device *dev,
|
|
|
|
|
struct scatterlist *sg, int nelems, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_sync_sg_for_device(struct device *dev,
|
|
|
|
|
struct scatterlist *sg, int nelems, enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
|
|
|
{
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
}
|
|
|
|
|
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
|
|
|
|
|
dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
|
|
|
|
|
dma_addr_t dma_handle, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
|
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
static inline void dmam_free_coherent(struct device *dev, size_t size,
|
|
|
|
|
void *vaddr, dma_addr_t dma_handle)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_get_sgtable_attrs(struct device *dev,
|
|
|
|
|
struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
|
|
|
|
|
size_t size, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return -ENXIO;
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
|
unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return -ENXIO;
|
|
|
|
|
}
|
2019-08-03 18:31:25 +08:00
|
|
|
static inline bool dma_can_mmap(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2018-12-26 14:52:13 +08:00
|
|
|
static inline int dma_supported(struct device *dev, u64 mask)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_set_mask(struct device *dev, u64 mask)
|
|
|
|
|
{
|
|
|
|
|
return -EIO;
|
|
|
|
|
}
|
|
|
|
|
static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
|
|
|
|
|
{
|
|
|
|
|
return -EIO;
|
|
|
|
|
}
|
|
|
|
|
static inline u64 dma_get_required_mask(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2019-02-07 19:59:15 +08:00
|
|
|
static inline size_t dma_max_mapping_size(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2019-08-28 20:35:40 +08:00
|
|
|
static inline unsigned long dma_get_merge_boundary(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2018-12-26 14:52:13 +08:00
|
|
|
#endif /* CONFIG_HAS_DMA */
|
|
|
|
|
|
2018-12-25 15:50:35 +08:00
|
|
|
static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
|
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
2024-06-11 20:08:33 +08:00
|
|
|
/* DMA must never operate on areas that might be remapped. */
|
|
|
|
|
if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr),
|
|
|
|
|
"rejecting DMA map of vmalloc memory\n"))
|
|
|
|
|
return DMA_MAPPING_ERROR;
|
2018-12-25 15:50:35 +08:00
|
|
|
debug_dma_map_single(dev, ptr, size);
|
|
|
|
|
return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
|
|
|
|
|
size, dir, attrs);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
|
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
|
{
|
|
|
|
|
return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-26 14:52:13 +08:00
|
|
|
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
|
|
|
|
dma_addr_t addr, unsigned long offset, size_t size,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_sync_single_range_for_device(struct device *dev,
|
|
|
|
|
dma_addr_t addr, unsigned long offset, size_t size,
|
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
|
{
|
|
|
|
|
return dma_sync_single_for_device(dev, addr + offset, size, dir);
|
|
|
|
|
}
|
|
|
|
|
|
2016-08-04 04:46:00 +08:00
|
|
|
#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
|
|
|
|
|
#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
|
|
|
|
|
#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
|
|
|
|
|
#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
|
2016-12-15 07:05:23 +08:00
|
|
|
#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
|
|
|
|
|
#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
|
2018-12-26 14:52:13 +08:00
|
|
|
#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
|
|
|
|
|
#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
|
2017-08-27 16:37:15 +08:00
|
|
|
|
2016-01-21 07:02:05 +08:00
|
|
|
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
|
2018-09-11 14:55:28 +08:00
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
|
unsigned long attrs);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
2019-06-03 15:14:31 +08:00
|
|
|
struct page **dma_common_find_pages(void *cpu_addr);
|
2016-01-21 07:02:05 +08:00
|
|
|
void *dma_common_contiguous_remap(struct page *page, size_t size,
|
|
|
|
|
pgprot_t prot, const void *caller);
|
|
|
|
|
|
|
|
|
|
void *dma_common_pages_remap(struct page **pages, size_t size,
|
2019-08-30 14:51:01 +08:00
|
|
|
pgprot_t prot, const void *caller);
|
|
|
|
|
void dma_common_free_remap(void *cpu_addr, size_t size);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
2018-11-05 03:29:28 +08:00
|
|
|
bool dma_in_atomic_pool(void *start, size_t size);
|
|
|
|
|
void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
|
|
|
|
|
bool dma_free_from_pool(void *start, size_t size);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
int
|
2018-08-23 15:39:38 +08:00
|
|
|
dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
|
|
|
|
|
dma_addr_t dma_addr, size_t size, unsigned long attrs);
|
2016-01-21 07:02:05 +08:00
|
|
|
|
|
|
|
|
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
2018-09-24 19:06:58 +08:00
|
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
2016-01-21 07:02:05 +08:00
|
|
|
{
|
2018-09-24 19:06:58 +08:00
|
|
|
|
|
|
|
|
return dma_alloc_attrs(dev, size, dma_handle, gfp,
|
|
|
|
|
(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
|
2016-01-21 07:02:05 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void dma_free_coherent(struct device *dev, size_t size,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle)
|
|
|
|
|
{
|
2016-08-04 04:46:00 +08:00
|
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
|
2016-01-21 07:02:05 +08:00
|
|
|
}
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2008-09-12 18:42:34 +08:00
|
|
|
static inline u64 dma_get_mask(struct device *dev)
|
|
|
|
|
{
|
2019-03-14 01:45:21 +08:00
|
|
|
if (dev->dma_mask && *dev->dma_mask)
|
2008-09-12 18:42:34 +08:00
|
|
|
return *dev->dma_mask;
|
2009-04-07 10:01:15 +08:00
|
|
|
return DMA_BIT_MASK(32);
|
2008-09-12 18:42:34 +08:00
|
|
|
}
|
|
|
|
|
|
2013-06-26 20:49:44 +08:00
|
|
|
/*
|
|
|
|
|
* Set both the DMA mask and the coherent DMA mask to the same thing.
|
|
|
|
|
* Note that we don't check the return value from dma_set_coherent_mask()
|
|
|
|
|
* as the DMA API guarantees that the coherent DMA mask can be set to
|
|
|
|
|
* the same or smaller than the streaming DMA mask.
|
|
|
|
|
*/
|
|
|
|
|
static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
|
|
|
|
|
{
|
|
|
|
|
int rc = dma_set_mask(dev, mask);
|
|
|
|
|
if (rc == 0)
|
|
|
|
|
dma_set_coherent_mask(dev, mask);
|
|
|
|
|
return rc;
|
|
|
|
|
}
|
|
|
|
|
|
2013-06-27 19:21:45 +08:00
|
|
|
/*
|
|
|
|
|
* Similar to the above, except it deals with the case where the device
|
|
|
|
|
* does not have dev->dma_mask appropriately setup.
|
|
|
|
|
*/
|
|
|
|
|
static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
|
|
|
|
|
{
|
|
|
|
|
dev->dma_mask = &dev->coherent_dma_mask;
|
|
|
|
|
return dma_set_mask_and_coherent(dev, mask);
|
|
|
|
|
}
|
|
|
|
|
|
2019-07-17 03:59:11 +08:00
|
|
|
/**
|
|
|
|
|
* dma_addressing_limited - return if the device is addressing limited
|
|
|
|
|
* @dev: device to check
|
|
|
|
|
*
|
|
|
|
|
* Return %true if the devices DMA mask is too small to address all memory in
|
|
|
|
|
* the system, else %false. Lack of addressing bits is the prime reason for
|
|
|
|
|
* bounce buffering, but might not be the only one.
|
|
|
|
|
*/
|
|
|
|
|
static inline bool dma_addressing_limited(struct device *dev)
|
|
|
|
|
{
|
2019-07-23 00:51:49 +08:00
|
|
|
return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) <
|
|
|
|
|
dma_get_required_mask(dev);
|
2019-07-17 03:59:11 +08:00
|
|
|
}
|
|
|
|
|
|
2019-01-08 02:36:20 +08:00
|
|
|
#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
|
|
|
|
|
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|
|
|
|
const struct iommu_ops *iommu, bool coherent);
|
|
|
|
|
#else
|
2014-08-27 23:24:20 +08:00
|
|
|
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
|
2019-01-08 02:36:20 +08:00
|
|
|
u64 size, const struct iommu_ops *iommu, bool coherent)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
|
2014-08-27 23:24:20 +08:00
|
|
|
|
2018-12-22 05:14:44 +08:00
|
|
|
#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
|
|
|
|
|
void arch_teardown_dma_ops(struct device *dev);
|
|
|
|
|
#else
|
|
|
|
|
static inline void arch_teardown_dma_ops(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
|
2014-04-24 23:30:04 +08:00
|
|
|
|
2008-02-05 14:27:55 +08:00
|
|
|
static inline unsigned int dma_get_max_seg_size(struct device *dev)
|
|
|
|
|
{
|
2015-11-07 08:32:51 +08:00
|
|
|
if (dev->dma_parms && dev->dma_parms->max_segment_size)
|
|
|
|
|
return dev->dma_parms->max_segment_size;
|
|
|
|
|
return SZ_64K;
|
2008-02-05 14:27:55 +08:00
|
|
|
}
|
|
|
|
|
|
2018-08-30 05:29:21 +08:00
|
|
|
static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
|
2008-02-05 14:27:55 +08:00
|
|
|
{
|
|
|
|
|
if (dev->dma_parms) {
|
|
|
|
|
dev->dma_parms->max_segment_size = size;
|
|
|
|
|
return 0;
|
2015-11-07 08:32:51 +08:00
|
|
|
}
|
|
|
|
|
return -EIO;
|
2008-02-05 14:27:55 +08:00
|
|
|
}
|
|
|
|
|
|
2008-02-05 14:28:13 +08:00
|
|
|
static inline unsigned long dma_get_seg_boundary(struct device *dev)
|
|
|
|
|
{
|
2015-11-07 08:32:51 +08:00
|
|
|
if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
|
|
|
|
|
return dev->dma_parms->segment_boundary_mask;
|
|
|
|
|
return DMA_BIT_MASK(32);
|
2008-02-05 14:28:13 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
|
|
|
|
|
{
|
|
|
|
|
if (dev->dma_parms) {
|
|
|
|
|
dev->dma_parms->segment_boundary_mask = mask;
|
|
|
|
|
return 0;
|
2015-11-07 08:32:51 +08:00
|
|
|
}
|
|
|
|
|
return -EIO;
|
2008-02-05 14:28:13 +08:00
|
|
|
}
|
|
|
|
|
|
2010-08-11 09:03:22 +08:00
|
|
|
static inline int dma_get_cache_alignment(void)
|
|
|
|
|
{
|
|
|
|
|
#ifdef ARCH_DMA_MINALIGN
|
|
|
|
|
return ARCH_DMA_MINALIGN;
|
|
|
|
|
#endif
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-04 03:12:02 +08:00
|
|
|
#ifdef CONFIG_DMA_DECLARE_COHERENT
|
2016-01-21 07:02:09 +08:00
|
|
|
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
2018-12-25 20:29:54 +08:00
|
|
|
dma_addr_t device_addr, size_t size);
|
2016-01-21 07:02:09 +08:00
|
|
|
#else
|
2005-04-17 06:20:36 +08:00
|
|
|
static inline int
|
2014-05-21 06:54:22 +08:00
|
|
|
dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
2018-12-25 20:29:54 +08:00
|
|
|
dma_addr_t device_addr, size_t size)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2017-08-25 23:13:09 +08:00
|
|
|
return -ENOSYS;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2019-02-04 03:12:02 +08:00
|
|
|
#endif /* CONFIG_DMA_DECLARE_COHERENT */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2018-12-26 00:44:19 +08:00
|
|
|
static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
|
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
|
|
|
|
{
|
|
|
|
|
return dmam_alloc_attrs(dev, size, dma_handle, gfp,
|
|
|
|
|
(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
|
|
|
|
|
}
|
|
|
|
|
|
dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.
Build tested successfully with allmodconfig.
The following Coccinelle SmPL patch was used for this simple
transformation:
@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@
-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)
@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@
-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)
@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@
-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.
Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-01-23 10:34:22 +08:00
|
|
|
static inline void *dma_alloc_wc(struct device *dev, size_t size,
|
|
|
|
|
dma_addr_t *dma_addr, gfp_t gfp)
|
2014-06-27 17:56:58 +08:00
|
|
|
{
|
2018-12-22 16:21:08 +08:00
|
|
|
unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
|
2018-09-24 19:06:58 +08:00
|
|
|
|
|
|
|
|
if (gfp & __GFP_NOWARN)
|
|
|
|
|
attrs |= DMA_ATTR_NO_WARN;
|
|
|
|
|
|
|
|
|
|
return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
|
2014-06-27 17:56:58 +08:00
|
|
|
}
|
|
|
|
|
|
dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.
Build tested successfully with allmodconfig.
The following Coccinelle SmPL patch was used for this simple
transformation:
@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@
-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)
@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@
-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)
@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@
-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.
Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-01-23 10:34:22 +08:00
|
|
|
static inline void dma_free_wc(struct device *dev, size_t size,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr)
|
2014-06-27 17:56:58 +08:00
|
|
|
{
|
2016-08-04 04:46:00 +08:00
|
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_addr,
|
|
|
|
|
DMA_ATTR_WRITE_COMBINE);
|
2014-06-27 17:56:58 +08:00
|
|
|
}
|
|
|
|
|
|
dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.
Build tested successfully with allmodconfig.
The following Coccinelle SmPL patch was used for this simple
transformation:
@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@
-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)
@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@
-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)
@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@
-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.
Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-01-23 10:34:22 +08:00
|
|
|
static inline int dma_mmap_wc(struct device *dev,
|
|
|
|
|
struct vm_area_struct *vma,
|
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr,
|
|
|
|
|
size_t size)
|
2014-06-27 17:56:58 +08:00
|
|
|
{
|
2016-08-04 04:46:00 +08:00
|
|
|
return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
|
|
|
|
|
DMA_ATTR_WRITE_COMBINE);
|
2014-06-27 17:56:58 +08:00
|
|
|
}
|
2008-04-29 16:00:30 +08:00
|
|
|
|
2018-05-09 12:53:49 +08:00
|
|
|
#ifdef CONFIG_NEED_DMA_MAP_STATE
|
2010-03-11 07:23:31 +08:00
|
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
|
|
|
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
|
|
|
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
|
|
|
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
|
|
|
|
|
#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
|
|
|
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
|
|
|
|
|
#else
|
|
|
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
|
|
|
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
|
|
|
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) (0)
|
|
|
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
|
|
|
|
|
#define dma_unmap_len(PTR, LEN_NAME) (0)
|
|
|
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
|
|
|
|
|
#endif
|
|
|
|
|
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
#endif
|