2013-09-09 22:29:21 +08:00
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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compatible = "gpio-leds";
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led@2 {
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label = "beaglebone:green:heartbeat";
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led@3 {
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label = "beaglebone:green:mmc0";
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gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@4 {
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label = "beaglebone:green:usr2";
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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2013-09-13 02:35:35 +08:00
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linux,default-trigger = "cpu0";
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2013-09-09 22:29:21 +08:00
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default-state = "off";
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};
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led@5 {
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label = "beaglebone:green:usr3";
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gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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2013-09-13 02:35:35 +08:00
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linux,default-trigger = "mmc1";
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2013-09-09 22:29:21 +08:00
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default-state = "off";
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};
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};
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2013-09-30 22:40:16 +08:00
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vmmcsd_fixed: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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2013-09-09 22:29:21 +08:00
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};
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2013-09-20 23:00:00 +08:00
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&clkout2_pin>;
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user_leds_s0: user_leds_s0 {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
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AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
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AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
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AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
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2013-09-20 23:00:00 +08:00
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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2013-09-20 23:00:00 +08:00
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>;
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};
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2015-05-13 16:04:34 +08:00
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
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AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
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2015-05-13 16:04:34 +08:00
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>;
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};
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2013-09-20 23:00:00 +08:00
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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2013-09-20 23:00:00 +08:00
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>;
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};
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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2013-09-20 23:00:00 +08:00
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
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AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
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AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
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AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
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AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
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AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
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AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
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AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
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AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
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AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
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AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
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AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
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AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
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2013-09-20 23:00:00 +08:00
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
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2013-09-20 23:00:00 +08:00
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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2013-09-20 23:00:00 +08:00
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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2013-09-20 23:00:00 +08:00
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
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2013-09-20 23:00:00 +08:00
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>;
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};
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emmc_pins: pinmux_emmc_pins {
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pinctrl-single,pins = <
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2015-11-13 12:53:42 +08:00
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AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
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AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
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AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
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AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
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AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
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AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
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AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
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AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
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AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
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AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
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2013-09-20 23:00:00 +08:00
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>;
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};
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};
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2013-09-20 23:42:19 +08:00
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&usb {
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status = "okay";
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2014-04-29 04:54:32 +08:00
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&usb_ctrl_mod {
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status = "okay";
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&usb0_phy {
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status = "okay";
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&usb1_phy {
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status = "okay";
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&usb0 {
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status = "okay";
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2015-02-25 00:10:43 +08:00
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dr_mode = "peripheral";
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2014-04-29 04:54:32 +08:00
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&usb1 {
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status = "okay";
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dr_mode = "host";
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};
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2013-09-20 23:42:19 +08:00
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2014-04-29 04:54:32 +08:00
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&cppi41dma {
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status = "okay";
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2013-09-20 23:42:19 +08:00
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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tps: tps@24 {
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reg = <0x24>;
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};
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2015-05-13 16:04:34 +08:00
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baseboard_eeprom: baseboard_eeprom@50 {
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compatible = "at,24c256";
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reg = <0x50>;
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#address-cells = <1>;
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#size-cells = <1>;
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baseboard_data: baseboard_data@0 {
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reg = <0 0x100>;
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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status = "okay";
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clock-frequency = <100000>;
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cape_eeprom0: cape_eeprom0@54 {
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compatible = "at,24c256";
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reg = <0x54>;
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#address-cells = <1>;
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#size-cells = <1>;
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cape0_data: cape_data@0 {
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reg = <0 0x100>;
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};
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};
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cape_eeprom1: cape_eeprom1@55 {
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compatible = "at,24c256";
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reg = <0x55>;
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#address-cells = <1>;
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#size-cells = <1>;
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cape1_data: cape_data@0 {
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reg = <0 0x100>;
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};
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};
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cape_eeprom2: cape_eeprom2@56 {
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compatible = "at,24c256";
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reg = <0x56>;
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#address-cells = <1>;
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#size-cells = <1>;
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cape2_data: cape_data@0 {
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reg = <0 0x100>;
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};
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};
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cape_eeprom3: cape_eeprom3@57 {
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compatible = "at,24c256";
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reg = <0x57>;
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#address-cells = <1>;
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#size-cells = <1>;
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cape3_data: cape_data@0 {
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reg = <0 0x100>;
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};
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};
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2013-09-20 23:42:19 +08:00
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};
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2016-02-19 22:12:19 +08:00
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/include/ "tps65217.dtsi"
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2013-09-09 22:29:21 +08:00
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&tps {
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2015-06-02 03:33:28 +08:00
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/*
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* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
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* mode") at poweroff. Most BeagleBone versions do not support RTC-only
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* mode and risk hardware damage if this mode is entered.
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*
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* For details, see linux-omap mailing list May 2015 thread
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* [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
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* In particular, messages:
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* http://www.spinics.net/lists/linux-omap/msg118585.html
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* http://www.spinics.net/lists/linux-omap/msg118615.html
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*
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* You can override this later with
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* &tps { /delete-property/ ti,pmic-shutdown-controller; }
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* if you want to use RTC-only mode and made sure you are not affected
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* by the hardware problems. (Tip: double-check by performing a current
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* measurement after shutdown: it should be less than 1 mA.)
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*/
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ti,pmic-shutdown-controller;
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2013-09-09 22:29:21 +08:00
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regulators {
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dcdc1_reg: regulator@0 {
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2014-09-06 05:12:05 +08:00
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regulator-name = "vdds_dpr";
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2013-09-09 22:29:21 +08:00
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regulator-always-on;
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};
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dcdc2_reg: regulator@1 {
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1325000>;
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regulator-boot-on;
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regulator-always-on;
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};
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dcdc3_reg: regulator@2 {
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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regulator-name = "vdd_core";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: regulator@3 {
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2014-09-06 05:12:05 +08:00
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regulator-name = "vio,vrtc,vdds";
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2013-09-09 22:29:21 +08:00
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regulator-always-on;
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};
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ldo2_reg: regulator@4 {
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2014-09-06 05:12:05 +08:00
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regulator-name = "vdd_3v3aux";
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2013-09-09 22:29:21 +08:00
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regulator-always-on;
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};
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ldo3_reg: regulator@5 {
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2014-09-06 05:12:05 +08:00
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regulator-name = "vdd_1v8";
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2013-09-09 22:29:21 +08:00
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regulator-always-on;
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};
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ldo4_reg: regulator@6 {
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2014-09-06 05:12:05 +08:00
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regulator-name = "vdd_3v3a";
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2013-09-09 22:29:21 +08:00
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regulator-always-on;
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};
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};
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "mii";
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
|
2014-05-08 16:57:36 +08:00
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status = "okay";
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2013-09-09 22:29:21 +08:00
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
|
2014-05-08 16:57:36 +08:00
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status = "okay";
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2013-09-09 22:29:21 +08:00
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};
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2013-09-13 02:35:32 +08:00
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&mmc1 {
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status = "okay";
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2013-09-13 02:35:34 +08:00
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bus-width = <0x4>;
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2013-09-13 02:35:32 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
|
2015-10-12 17:07:10 +08:00
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
2013-09-13 02:35:32 +08:00
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};
|
2015-02-26 02:52:41 +08:00
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&aes {
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status = "okay";
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};
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&sham {
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status = "okay";
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};
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