[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*
|
|
|
|
* arch/arm/mach-kirkwood/common.c
|
|
|
|
*
|
|
|
|
* Core functions for Marvell Kirkwood SoCs
|
|
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|
*
|
|
|
|
* This file is licensed under the terms of the GNU General Public
|
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|
|
* License version 2. This program is licensed "as is" without any
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|
|
* warranty of any kind, whether express or implied.
|
|
|
|
*/
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|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/serial_8250.h>
|
|
|
|
#include <linux/mbus.h>
|
|
|
|
#include <linux/mv643xx_eth.h>
|
2009-03-24 02:13:21 +08:00
|
|
|
#include <linux/mv643xx_i2c.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
#include <linux/ata_platform.h>
|
2009-06-02 03:36:36 +08:00
|
|
|
#include <linux/mtd/nand.h>
|
2008-08-09 21:38:18 +08:00
|
|
|
#include <linux/spi/orion_spi.h>
|
2008-09-25 22:23:48 +08:00
|
|
|
#include <net/dsa.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
#include <asm/page.h>
|
|
|
|
#include <asm/timex.h>
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|
|
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#include <asm/mach/map.h>
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|
|
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#include <asm/mach/time.h>
|
2008-08-05 23:14:15 +08:00
|
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|
#include <mach/kirkwood.h>
|
2009-04-23 03:08:17 +08:00
|
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|
#include <mach/bridge-regs.h>
|
2008-08-09 19:44:58 +08:00
|
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|
#include <plat/cache-feroceon-l2.h>
|
|
|
|
#include <plat/ehci-orion.h>
|
2009-02-14 16:15:55 +08:00
|
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|
#include <plat/mvsdio.h>
|
2008-06-23 23:26:07 +08:00
|
|
|
#include <plat/mv_xor.h>
|
2008-08-09 19:44:58 +08:00
|
|
|
#include <plat/orion_nand.h>
|
2009-06-02 01:56:02 +08:00
|
|
|
#include <plat/orion_wdt.h>
|
2008-08-09 19:44:58 +08:00
|
|
|
#include <plat/time.h>
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
#include "common.h"
|
|
|
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|
|
/*****************************************************************************
|
|
|
|
* I/O Address Mapping
|
|
|
|
****************************************************************************/
|
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static struct map_desc kirkwood_io_desc[] __initdata = {
|
|
|
|
{
|
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|
|
.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
|
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|
|
.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
|
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|
|
.length = KIRKWOOD_PCIE_IO_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
}, {
|
|
|
|
.virtual = KIRKWOOD_REGS_VIRT_BASE,
|
|
|
|
.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
|
|
|
|
.length = KIRKWOOD_REGS_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_map_io(void)
|
|
|
|
{
|
|
|
|
iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
|
|
|
|
}
|
|
|
|
|
2009-03-22 23:30:32 +08:00
|
|
|
/*
|
|
|
|
* Default clock control bits. Any bit _not_ set in this variable
|
|
|
|
* will be cleared from the hardware after platform devices have been
|
|
|
|
* registered. Some reserved bits must be set to 1.
|
|
|
|
*/
|
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|
|
unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
|
|
|
|
/*****************************************************************************
|
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|
|
* EHCI
|
|
|
|
****************************************************************************/
|
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|
|
static struct orion_ehci_data kirkwood_ehci_data = {
|
|
|
|
.dram = &kirkwood_mbus_dram_info,
|
2008-09-17 15:08:05 +08:00
|
|
|
.phy_version = EHCI_PHY_NA,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
};
|
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|
|
|
|
|
|
static u64 ehci_dmamask = 0xffffffffUL;
|
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|
|
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|
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|
|
/*****************************************************************************
|
|
|
|
* EHCI0
|
|
|
|
****************************************************************************/
|
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|
static struct resource kirkwood_ehci_resources[] = {
|
|
|
|
{
|
|
|
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.start = USB_PHYS_BASE,
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|
|
.end = USB_PHYS_BASE + 0x0fff,
|
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|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
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|
|
.start = IRQ_KIRKWOOD_USB,
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|
|
.end = IRQ_KIRKWOOD_USB,
|
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|
|
.flags = IORESOURCE_IRQ,
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|
|
},
|
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|
|
};
|
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|
|
static struct platform_device kirkwood_ehci = {
|
|
|
|
.name = "orion-ehci",
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &ehci_dmamask,
|
|
|
|
.coherent_dma_mask = 0xffffffff,
|
|
|
|
.platform_data = &kirkwood_ehci_data,
|
|
|
|
},
|
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|
|
.resource = kirkwood_ehci_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_ehci_init(void)
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_USB0;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
platform_device_register(&kirkwood_ehci);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* GE00
|
|
|
|
****************************************************************************/
|
|
|
|
struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
|
|
|
|
.dram = &kirkwood_mbus_dram_info,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_ge00_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "ge00 base",
|
|
|
|
.start = GE00_PHYS_BASE + 0x2000,
|
|
|
|
.end = GE00_PHYS_BASE + 0x3fff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
2008-08-26 22:04:05 +08:00
|
|
|
}, {
|
|
|
|
.name = "ge00 err irq",
|
|
|
|
.start = IRQ_KIRKWOOD_GE00_ERR,
|
|
|
|
.end = IRQ_KIRKWOOD_GE00_ERR,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_ge00_shared = {
|
|
|
|
.name = MV643XX_ETH_SHARED_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_ge00_shared_data,
|
|
|
|
},
|
2008-08-26 22:04:05 +08:00
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
.resource = kirkwood_ge00_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_ge00_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "ge00 irq",
|
|
|
|
.start = IRQ_KIRKWOOD_GE00_SUM,
|
|
|
|
.end = IRQ_KIRKWOOD_GE00_SUM,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_ge00 = {
|
|
|
|
.name = MV643XX_ETH_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = 1,
|
|
|
|
.resource = kirkwood_ge00_resources,
|
2009-05-23 04:53:40 +08:00
|
|
|
.dev = {
|
|
|
|
.coherent_dma_mask = 0xffffffff,
|
|
|
|
},
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_GE0;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
eth_data->shared = &kirkwood_ge00_shared;
|
|
|
|
kirkwood_ge00.dev.platform_data = eth_data;
|
|
|
|
|
|
|
|
platform_device_register(&kirkwood_ge00_shared);
|
|
|
|
platform_device_register(&kirkwood_ge00);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-10-20 05:10:14 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* GE01
|
|
|
|
****************************************************************************/
|
|
|
|
struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
|
|
|
|
.dram = &kirkwood_mbus_dram_info,
|
|
|
|
.shared_smi = &kirkwood_ge00_shared,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_ge01_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "ge01 base",
|
|
|
|
.start = GE01_PHYS_BASE + 0x2000,
|
|
|
|
.end = GE01_PHYS_BASE + 0x3fff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "ge01 err irq",
|
|
|
|
.start = IRQ_KIRKWOOD_GE01_ERR,
|
|
|
|
.end = IRQ_KIRKWOOD_GE01_ERR,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_ge01_shared = {
|
|
|
|
.name = MV643XX_ETH_SHARED_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_ge01_shared_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
|
|
|
|
.resource = kirkwood_ge01_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_ge01_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "ge01 irq",
|
|
|
|
.start = IRQ_KIRKWOOD_GE01_SUM,
|
|
|
|
.end = IRQ_KIRKWOOD_GE01_SUM,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_ge01 = {
|
|
|
|
.name = MV643XX_ETH_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.num_resources = 1,
|
|
|
|
.resource = kirkwood_ge01_resources,
|
2009-05-23 04:53:40 +08:00
|
|
|
.dev = {
|
|
|
|
.coherent_dma_mask = 0xffffffff,
|
|
|
|
},
|
2008-10-20 05:10:14 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_GE1;
|
2008-10-20 05:10:14 +08:00
|
|
|
eth_data->shared = &kirkwood_ge01_shared;
|
|
|
|
kirkwood_ge01.dev.platform_data = eth_data;
|
|
|
|
|
|
|
|
platform_device_register(&kirkwood_ge01_shared);
|
|
|
|
platform_device_register(&kirkwood_ge01);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-09-25 22:23:48 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* Ethernet switch
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_switch_resources[] = {
|
|
|
|
{
|
|
|
|
.start = 0,
|
|
|
|
.end = 0,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_switch_device = {
|
|
|
|
.name = "dsa",
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = 0,
|
|
|
|
.resource = kirkwood_switch_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
|
|
|
|
{
|
dsa: add switch chip cascading support
The initial version of the DSA driver only supported a single switch
chip per network interface, while DSA-capable switch chips can be
interconnected to form a tree of switch chips. This patch adds support
for multiple switch chips on a network interface.
An example topology for a 16-port device with an embedded CPU is as
follows:
+-----+ +--------+ +--------+
| |eth0 10| switch |9 10| switch |
| CPU +----------+ +-------+ |
| | | chip 0 | | chip 1 |
+-----+ +---++---+ +---++---+
|| ||
|| ||
||1000baseT ||1000baseT
||ports 1-8 ||ports 9-16
This requires a couple of interdependent changes in the DSA layer:
- The dsa platform driver data needs to be extended: there is still
only one netdevice per DSA driver instance (eth0 in the example
above), but each of the switch chips in the tree needs its own
mii_bus device pointer, MII management bus address, and port name
array. (include/net/dsa.h) The existing in-tree dsa users need
some small changes to deal with this. (arch/arm)
- The DSA and Ethertype DSA tagging modules need to be extended to
use the DSA device ID field on receive and demultiplex the packet
accordingly, and fill in the DSA device ID field on transmit
according to which switch chip the packet is heading to.
(net/dsa/tag_{dsa,edsa}.c)
- The concept of "CPU port", which is the switch chip port that the
CPU is connected to (port 10 on switch chip 0 in the example), needs
to be extended with the concept of "upstream port", which is the
port on the switch chip that will bring us one hop closer to the CPU
(port 10 for both switch chips in the example above).
- The dsa platform data needs to specify which ports on which switch
chips are links to other switch chips, so that we can enable DSA
tagging mode on them. (For inter-switch links, we always use
non-EtherType DSA tagging, since it has lower overhead. The CPU
link uses dsa or edsa tagging depending on what the 'root' switch
chip supports.) This is done by specifying "dsa" for the given
port in the port array.
- The dsa platform data needs to be extended with information on via
which port to reach any given switch chip from any given switch chip.
This info is specified via the per-switch chip data struct ->rtable[]
array, which gives the nexthop ports for each of the other switches
in the tree.
For the example topology above, the dsa platform data would look
something like this:
static struct dsa_chip_data sw[2] = {
{
.mii_bus = &foo,
.sw_addr = 1,
.port_names[0] = "p1",
.port_names[1] = "p2",
.port_names[2] = "p3",
.port_names[3] = "p4",
.port_names[4] = "p5",
.port_names[5] = "p6",
.port_names[6] = "p7",
.port_names[7] = "p8",
.port_names[9] = "dsa",
.port_names[10] = "cpu",
.rtable = (s8 []){ -1, 9, },
}, {
.mii_bus = &foo,
.sw_addr = 2,
.port_names[0] = "p9",
.port_names[1] = "p10",
.port_names[2] = "p11",
.port_names[3] = "p12",
.port_names[4] = "p13",
.port_names[5] = "p14",
.port_names[6] = "p15",
.port_names[7] = "p16",
.port_names[10] = "dsa",
.rtable = (s8 []){ 10, -1, },
},
},
static struct dsa_platform_data pd = {
.netdev = &foo,
.nr_switches = 2,
.sw = sw,
};
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Gary Thomas <gary@mlbassoc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-03-20 17:52:09 +08:00
|
|
|
int i;
|
|
|
|
|
2008-09-25 22:23:48 +08:00
|
|
|
if (irq != NO_IRQ) {
|
|
|
|
kirkwood_switch_resources[0].start = irq;
|
|
|
|
kirkwood_switch_resources[0].end = irq;
|
|
|
|
kirkwood_switch_device.num_resources = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
d->netdev = &kirkwood_ge00.dev;
|
dsa: add switch chip cascading support
The initial version of the DSA driver only supported a single switch
chip per network interface, while DSA-capable switch chips can be
interconnected to form a tree of switch chips. This patch adds support
for multiple switch chips on a network interface.
An example topology for a 16-port device with an embedded CPU is as
follows:
+-----+ +--------+ +--------+
| |eth0 10| switch |9 10| switch |
| CPU +----------+ +-------+ |
| | | chip 0 | | chip 1 |
+-----+ +---++---+ +---++---+
|| ||
|| ||
||1000baseT ||1000baseT
||ports 1-8 ||ports 9-16
This requires a couple of interdependent changes in the DSA layer:
- The dsa platform driver data needs to be extended: there is still
only one netdevice per DSA driver instance (eth0 in the example
above), but each of the switch chips in the tree needs its own
mii_bus device pointer, MII management bus address, and port name
array. (include/net/dsa.h) The existing in-tree dsa users need
some small changes to deal with this. (arch/arm)
- The DSA and Ethertype DSA tagging modules need to be extended to
use the DSA device ID field on receive and demultiplex the packet
accordingly, and fill in the DSA device ID field on transmit
according to which switch chip the packet is heading to.
(net/dsa/tag_{dsa,edsa}.c)
- The concept of "CPU port", which is the switch chip port that the
CPU is connected to (port 10 on switch chip 0 in the example), needs
to be extended with the concept of "upstream port", which is the
port on the switch chip that will bring us one hop closer to the CPU
(port 10 for both switch chips in the example above).
- The dsa platform data needs to specify which ports on which switch
chips are links to other switch chips, so that we can enable DSA
tagging mode on them. (For inter-switch links, we always use
non-EtherType DSA tagging, since it has lower overhead. The CPU
link uses dsa or edsa tagging depending on what the 'root' switch
chip supports.) This is done by specifying "dsa" for the given
port in the port array.
- The dsa platform data needs to be extended with information on via
which port to reach any given switch chip from any given switch chip.
This info is specified via the per-switch chip data struct ->rtable[]
array, which gives the nexthop ports for each of the other switches
in the tree.
For the example topology above, the dsa platform data would look
something like this:
static struct dsa_chip_data sw[2] = {
{
.mii_bus = &foo,
.sw_addr = 1,
.port_names[0] = "p1",
.port_names[1] = "p2",
.port_names[2] = "p3",
.port_names[3] = "p4",
.port_names[4] = "p5",
.port_names[5] = "p6",
.port_names[6] = "p7",
.port_names[7] = "p8",
.port_names[9] = "dsa",
.port_names[10] = "cpu",
.rtable = (s8 []){ -1, 9, },
}, {
.mii_bus = &foo,
.sw_addr = 2,
.port_names[0] = "p9",
.port_names[1] = "p10",
.port_names[2] = "p11",
.port_names[3] = "p12",
.port_names[4] = "p13",
.port_names[5] = "p14",
.port_names[6] = "p15",
.port_names[7] = "p16",
.port_names[10] = "dsa",
.rtable = (s8 []){ 10, -1, },
},
},
static struct dsa_platform_data pd = {
.netdev = &foo,
.nr_switches = 2,
.sw = sw,
};
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Gary Thomas <gary@mlbassoc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-03-20 17:52:09 +08:00
|
|
|
for (i = 0; i < d->nr_chips; i++)
|
|
|
|
d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
|
2008-09-25 22:23:48 +08:00
|
|
|
kirkwood_switch_device.dev.platform_data = d;
|
|
|
|
|
|
|
|
platform_device_register(&kirkwood_switch_device);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-02 03:36:36 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* NAND flash
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_nand_resource = {
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
.start = KIRKWOOD_NAND_MEM_PHYS_BASE,
|
|
|
|
.end = KIRKWOOD_NAND_MEM_PHYS_BASE +
|
|
|
|
KIRKWOOD_NAND_MEM_SIZE - 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct orion_nand_data kirkwood_nand_data = {
|
|
|
|
.cle = 0,
|
|
|
|
.ale = 1,
|
|
|
|
.width = 8,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_nand_flash = {
|
|
|
|
.name = "orion_nand",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_nand_data,
|
|
|
|
},
|
|
|
|
.resource = &kirkwood_nand_resource,
|
|
|
|
.num_resources = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
|
|
|
|
int chip_delay)
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_RUNIT;
|
2009-06-02 03:36:36 +08:00
|
|
|
kirkwood_nand_data.parts = parts;
|
|
|
|
kirkwood_nand_data.nr_parts = nr_parts;
|
|
|
|
kirkwood_nand_data.chip_delay = chip_delay;
|
|
|
|
platform_device_register(&kirkwood_nand_flash);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* SoC RTC
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_rtc_resource = {
|
|
|
|
.start = RTC_PHYS_BASE,
|
|
|
|
.end = RTC_PHYS_BASE + SZ_16 - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
};
|
|
|
|
|
2009-02-27 11:55:59 +08:00
|
|
|
static void __init kirkwood_rtc_init(void)
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
{
|
|
|
|
platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* SATA
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_sata_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "sata base",
|
|
|
|
.start = SATA_PHYS_BASE,
|
|
|
|
.end = SATA_PHYS_BASE + 0x5000 - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "sata irq",
|
|
|
|
.start = IRQ_KIRKWOOD_SATA,
|
|
|
|
.end = IRQ_KIRKWOOD_SATA,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_sata = {
|
|
|
|
.name = "sata_mv",
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.coherent_dma_mask = 0xffffffff,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_sata_resources),
|
|
|
|
.resource = kirkwood_sata_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_SATA0;
|
|
|
|
if (sata_data->n_ports > 1)
|
|
|
|
kirkwood_clk_ctrl |= CGC_SATA1;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
sata_data->dram = &kirkwood_mbus_dram_info;
|
|
|
|
kirkwood_sata.dev.platform_data = sata_data;
|
|
|
|
platform_device_register(&kirkwood_sata);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-02-14 16:15:55 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* SD/SDIO/MMC
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource mvsdio_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = SDIO_PHYS_BASE,
|
|
|
|
.end = SDIO_PHYS_BASE + SZ_1K - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
[1] = {
|
|
|
|
.start = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.end = IRQ_KIRKWOOD_SDIO,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static u64 mvsdio_dmamask = 0xffffffffUL;
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_sdio = {
|
|
|
|
.name = "mvsdio",
|
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &mvsdio_dmamask,
|
|
|
|
.coherent_dma_mask = 0xffffffff,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(mvsdio_resources),
|
|
|
|
.resource = mvsdio_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
|
|
|
|
{
|
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
if (rev == 0) /* catch all Kirkwood Z0's */
|
|
|
|
mvsdio_data->clock = 100000000;
|
|
|
|
else
|
|
|
|
mvsdio_data->clock = 200000000;
|
|
|
|
mvsdio_data->dram = &kirkwood_mbus_dram_info;
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_SDIO;
|
2009-02-14 16:15:55 +08:00
|
|
|
kirkwood_sdio.dev.platform_data = mvsdio_data;
|
|
|
|
platform_device_register(&kirkwood_sdio);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-08-09 21:38:18 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* SPI
|
|
|
|
****************************************************************************/
|
|
|
|
static struct orion_spi_info kirkwood_spi_plat_data = {
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_spi_resources[] = {
|
|
|
|
{
|
|
|
|
.start = SPI_PHYS_BASE,
|
|
|
|
.end = SPI_PHYS_BASE + SZ_512 - 1,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_spi = {
|
|
|
|
.name = "orion_spi",
|
|
|
|
.id = 0,
|
|
|
|
.resource = kirkwood_spi_resources,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_spi_plat_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_spi_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_spi_init()
|
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_RUNIT;
|
2008-08-09 21:38:18 +08:00
|
|
|
platform_device_register(&kirkwood_spi);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-03-24 02:13:21 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* I2C
|
|
|
|
****************************************************************************/
|
|
|
|
static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
|
|
|
|
.freq_m = 8, /* assumes 166 MHz TCLK */
|
|
|
|
.freq_n = 3,
|
|
|
|
.timeout = 1000, /* Default timeout of 1 second */
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_i2c_resources[] = {
|
|
|
|
{
|
|
|
|
.start = I2C_PHYS_BASE,
|
|
|
|
.end = I2C_PHYS_BASE + 0x1f,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.start = IRQ_KIRKWOOD_TWSI,
|
|
|
|
.end = IRQ_KIRKWOOD_TWSI,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_i2c = {
|
|
|
|
.name = MV64XXX_I2C_CTLR_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
|
|
|
|
.resource = kirkwood_i2c_resources,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_i2c_pdata,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_i2c_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_i2c);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* UART0
|
|
|
|
****************************************************************************/
|
|
|
|
static struct plat_serial8250_port kirkwood_uart0_data[] = {
|
|
|
|
{
|
|
|
|
.mapbase = UART0_PHYS_BASE,
|
|
|
|
.membase = (char *)UART0_VIRT_BASE,
|
|
|
|
.irq = IRQ_KIRKWOOD_UART_0,
|
|
|
|
.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
|
|
|
|
.iotype = UPIO_MEM,
|
|
|
|
.regshift = 2,
|
2008-09-15 06:56:38 +08:00
|
|
|
.uartclk = 0,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}, {
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_uart0_resources[] = {
|
|
|
|
{
|
|
|
|
.start = UART0_PHYS_BASE,
|
|
|
|
.end = UART0_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.start = IRQ_KIRKWOOD_UART_0,
|
|
|
|
.end = IRQ_KIRKWOOD_UART_0,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_uart0 = {
|
|
|
|
.name = "serial8250",
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = kirkwood_uart0_data,
|
|
|
|
},
|
|
|
|
.resource = kirkwood_uart0_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_uart0_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_uart0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* UART1
|
|
|
|
****************************************************************************/
|
|
|
|
static struct plat_serial8250_port kirkwood_uart1_data[] = {
|
|
|
|
{
|
|
|
|
.mapbase = UART1_PHYS_BASE,
|
|
|
|
.membase = (char *)UART1_VIRT_BASE,
|
|
|
|
.irq = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
|
|
|
|
.iotype = UPIO_MEM,
|
|
|
|
.regshift = 2,
|
2008-09-15 06:56:38 +08:00
|
|
|
.uartclk = 0,
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}, {
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_uart1_resources[] = {
|
|
|
|
{
|
|
|
|
.start = UART1_PHYS_BASE,
|
|
|
|
.end = UART1_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.start = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.end = IRQ_KIRKWOOD_UART_1,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_uart1 = {
|
|
|
|
.name = "serial8250",
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = kirkwood_uart1_data,
|
|
|
|
},
|
|
|
|
.resource = kirkwood_uart1_resources,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init kirkwood_uart1_init(void)
|
|
|
|
{
|
|
|
|
platform_device_register(&kirkwood_uart1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-23 23:26:07 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* XOR
|
|
|
|
****************************************************************************/
|
|
|
|
static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
|
|
|
|
.dram = &kirkwood_mbus_dram_info,
|
|
|
|
};
|
|
|
|
|
2009-04-07 10:01:15 +08:00
|
|
|
static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
|
2008-06-23 23:26:07 +08:00
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR0
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_xor0_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "xor 0 low",
|
|
|
|
.start = XOR0_PHYS_BASE,
|
|
|
|
.end = XOR0_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "xor 0 high",
|
|
|
|
.start = XOR0_HIGH_PHYS_BASE,
|
|
|
|
.end = XOR0_HIGH_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor0_shared = {
|
|
|
|
.name = MV_XOR_SHARED_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_xor_shared_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
|
|
|
|
.resource = kirkwood_xor0_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor00_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_00,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_00,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor00_data = {
|
|
|
|
.shared = &kirkwood_xor0_shared,
|
|
|
|
.hw_id = 0,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor00_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 0,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
|
|
|
|
.resource = kirkwood_xor00_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
2009-04-07 10:01:13 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(64),
|
2008-06-23 23:26:07 +08:00
|
|
|
.platform_data = (void *)&kirkwood_xor00_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor01_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_01,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_01,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor01_data = {
|
|
|
|
.shared = &kirkwood_xor0_shared,
|
|
|
|
.hw_id = 1,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor01_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
|
|
|
|
.resource = kirkwood_xor01_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
2009-04-07 10:01:13 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(64),
|
2008-06-23 23:26:07 +08:00
|
|
|
.platform_data = (void *)&kirkwood_xor01_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2009-02-27 11:55:59 +08:00
|
|
|
static void __init kirkwood_xor0_init(void)
|
2008-06-23 23:26:07 +08:00
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_XOR0;
|
2008-06-23 23:26:07 +08:00
|
|
|
platform_device_register(&kirkwood_xor0_shared);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* two engines can't do memset simultaneously, this limitation
|
|
|
|
* satisfied by removing memset support from one of the engines.
|
|
|
|
*/
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor00_channel);
|
|
|
|
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor01_channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* XOR1
|
|
|
|
****************************************************************************/
|
|
|
|
static struct resource kirkwood_xor1_shared_resources[] = {
|
|
|
|
{
|
|
|
|
.name = "xor 1 low",
|
|
|
|
.start = XOR1_PHYS_BASE,
|
|
|
|
.end = XOR1_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
}, {
|
|
|
|
.name = "xor 1 high",
|
|
|
|
.start = XOR1_HIGH_PHYS_BASE,
|
|
|
|
.end = XOR1_HIGH_PHYS_BASE + 0xff,
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor1_shared = {
|
|
|
|
.name = MV_XOR_SHARED_NAME,
|
|
|
|
.id = 1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_xor_shared_data,
|
|
|
|
},
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
|
|
|
|
.resource = kirkwood_xor1_shared_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor10_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_10,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_10,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor10_data = {
|
|
|
|
.shared = &kirkwood_xor1_shared,
|
|
|
|
.hw_id = 0,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor10_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 2,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
|
|
|
|
.resource = kirkwood_xor10_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
2009-04-07 10:01:13 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(64),
|
2008-06-23 23:26:07 +08:00
|
|
|
.platform_data = (void *)&kirkwood_xor10_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct resource kirkwood_xor11_resources[] = {
|
|
|
|
[0] = {
|
|
|
|
.start = IRQ_KIRKWOOD_XOR_11,
|
|
|
|
.end = IRQ_KIRKWOOD_XOR_11,
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mv_xor_platform_data kirkwood_xor11_data = {
|
|
|
|
.shared = &kirkwood_xor1_shared,
|
|
|
|
.hw_id = 1,
|
|
|
|
.pool_size = PAGE_SIZE,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_xor11_channel = {
|
|
|
|
.name = MV_XOR_NAME,
|
|
|
|
.id = 3,
|
|
|
|
.num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
|
|
|
|
.resource = kirkwood_xor11_resources,
|
|
|
|
.dev = {
|
|
|
|
.dma_mask = &kirkwood_xor_dmamask,
|
2009-04-07 10:01:13 +08:00
|
|
|
.coherent_dma_mask = DMA_BIT_MASK(64),
|
2008-06-23 23:26:07 +08:00
|
|
|
.platform_data = (void *)&kirkwood_xor11_data,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2009-02-27 11:55:59 +08:00
|
|
|
static void __init kirkwood_xor1_init(void)
|
2008-06-23 23:26:07 +08:00
|
|
|
{
|
2009-03-22 23:30:32 +08:00
|
|
|
kirkwood_clk_ctrl |= CGC_XOR1;
|
2008-06-23 23:26:07 +08:00
|
|
|
platform_device_register(&kirkwood_xor1_shared);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* two engines can't do memset simultaneously, this limitation
|
|
|
|
* satisfied by removing memset support from one of the engines.
|
|
|
|
*/
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor10_channel);
|
|
|
|
|
|
|
|
dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
|
|
|
|
dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
|
|
|
|
platform_device_register(&kirkwood_xor11_channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-06-01 19:38:34 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* Watchdog
|
|
|
|
****************************************************************************/
|
2009-06-02 01:56:02 +08:00
|
|
|
static struct orion_wdt_platform_data kirkwood_wdt_data = {
|
2009-06-01 19:38:34 +08:00
|
|
|
.tclk = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device kirkwood_wdt_device = {
|
2009-06-02 01:56:02 +08:00
|
|
|
.name = "orion_wdt",
|
2009-06-01 19:38:34 +08:00
|
|
|
.id = -1,
|
|
|
|
.dev = {
|
|
|
|
.platform_data = &kirkwood_wdt_data,
|
|
|
|
},
|
|
|
|
.num_resources = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void __init kirkwood_wdt_init(void)
|
|
|
|
{
|
|
|
|
kirkwood_wdt_data.tclk = kirkwood_tclk;
|
|
|
|
platform_device_register(&kirkwood_wdt_device);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
/*****************************************************************************
|
|
|
|
* Time handling
|
|
|
|
****************************************************************************/
|
2008-09-15 06:56:38 +08:00
|
|
|
int kirkwood_tclk;
|
|
|
|
|
|
|
|
int __init kirkwood_find_tclk(void)
|
|
|
|
{
|
2008-09-15 15:40:35 +08:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
|
|
|
|
return 200000000;
|
|
|
|
|
2008-09-15 06:56:38 +08:00
|
|
|
return 166666667;
|
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
static void kirkwood_timer_init(void)
|
|
|
|
{
|
2008-09-15 06:56:38 +08:00
|
|
|
kirkwood_tclk = kirkwood_find_tclk();
|
|
|
|
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
struct sys_timer kirkwood_timer = {
|
|
|
|
.init = kirkwood_timer_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*****************************************************************************
|
|
|
|
* General
|
|
|
|
****************************************************************************/
|
2008-09-15 15:40:35 +08:00
|
|
|
/*
|
|
|
|
* Identify device ID and revision.
|
|
|
|
*/
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
static char * __init kirkwood_id(void)
|
|
|
|
{
|
2008-09-15 15:40:35 +08:00
|
|
|
u32 dev, rev;
|
|
|
|
|
|
|
|
kirkwood_pcie_id(&dev, &rev);
|
|
|
|
|
|
|
|
if (dev == MV88F6281_DEV_ID) {
|
|
|
|
if (rev == MV88F6281_REV_Z0)
|
|
|
|
return "MV88F6281-Z0";
|
|
|
|
else if (rev == MV88F6281_REV_A0)
|
|
|
|
return "MV88F6281-A0";
|
|
|
|
else
|
|
|
|
return "MV88F6281-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6192_DEV_ID) {
|
|
|
|
if (rev == MV88F6192_REV_Z0)
|
|
|
|
return "MV88F6192-Z0";
|
|
|
|
else if (rev == MV88F6192_REV_A0)
|
|
|
|
return "MV88F6192-A0";
|
|
|
|
else
|
|
|
|
return "MV88F6192-Rev-Unsupported";
|
|
|
|
} else if (dev == MV88F6180_DEV_ID) {
|
|
|
|
if (rev == MV88F6180_REV_A0)
|
|
|
|
return "MV88F6180-Rev-A0";
|
|
|
|
else
|
|
|
|
return "MV88F6180-Rev-Unsupported";
|
|
|
|
} else {
|
|
|
|
return "Device-Unknown";
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-09-23 20:28:10 +08:00
|
|
|
static void __init kirkwood_l2_init(void)
|
2008-06-23 20:05:08 +08:00
|
|
|
{
|
2008-09-23 20:28:10 +08:00
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
|
|
|
|
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(1);
|
|
|
|
#else
|
|
|
|
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
|
|
|
|
feroceon_l2_init(0);
|
|
|
|
#endif
|
2008-06-23 20:05:08 +08:00
|
|
|
}
|
|
|
|
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
void __init kirkwood_init(void)
|
|
|
|
{
|
|
|
|
printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
|
2008-09-15 06:56:38 +08:00
|
|
|
kirkwood_id(), kirkwood_tclk);
|
|
|
|
kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
|
2009-01-07 06:02:08 +08:00
|
|
|
kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
|
2008-09-15 06:56:38 +08:00
|
|
|
kirkwood_spi_plat_data.tclk = kirkwood_tclk;
|
|
|
|
kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
|
|
|
|
kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
|
|
|
|
kirkwood_setup_cpu_mbus();
|
|
|
|
|
|
|
|
#ifdef CONFIG_CACHE_FEROCEON_L2
|
2008-09-23 20:28:10 +08:00
|
|
|
kirkwood_l2_init();
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
#endif
|
2009-02-27 11:55:59 +08:00
|
|
|
|
|
|
|
/* internal devices that every board has */
|
|
|
|
kirkwood_rtc_init();
|
2009-06-01 19:38:34 +08:00
|
|
|
kirkwood_wdt_init();
|
2009-02-27 11:55:59 +08:00
|
|
|
kirkwood_xor0_init();
|
|
|
|
kirkwood_xor1_init();
|
[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-23 04:45:06 +08:00
|
|
|
}
|
2009-03-22 23:30:32 +08:00
|
|
|
|
|
|
|
static int __init kirkwood_clock_gate(void)
|
|
|
|
{
|
|
|
|
unsigned int curr = readl(CLOCK_GATING_CTRL);
|
|
|
|
|
|
|
|
printk(KERN_DEBUG "Gating clock of unused units\n");
|
|
|
|
printk(KERN_DEBUG "before: 0x%08x\n", curr);
|
|
|
|
|
|
|
|
/* Make sure those units are accessible */
|
|
|
|
writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
|
|
|
|
|
|
|
|
/* For SATA: first shutdown the phy */
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
|
|
|
|
/* Disable PLL and IVREF */
|
|
|
|
writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
|
|
|
|
/* Disable PHY */
|
|
|
|
writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
|
|
|
|
}
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
|
|
|
|
/* Disable PLL and IVREF */
|
|
|
|
writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
|
|
|
|
/* Disable PHY */
|
|
|
|
writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* For PCIe: first shutdown the phy */
|
|
|
|
if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
|
|
|
|
writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
|
|
|
|
while (1)
|
|
|
|
if (readl(PCIE_STATUS) & 0x1)
|
|
|
|
break;
|
|
|
|
writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now gate clock the required units */
|
|
|
|
writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
|
|
|
|
printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
late_initcall(kirkwood_clock_gate);
|