2020-09-03 16:01:11 +08:00
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#ifndef _VC4_HDMI_H_
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#define _VC4_HDMI_H_
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#include <drm/drm_connector.h>
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#include <media/cec.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/soc.h>
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#include "vc4_drv.h"
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2020-09-03 16:01:22 +08:00
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struct vc4_hdmi;
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2020-09-03 16:01:23 +08:00
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struct vc4_hdmi_register;
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2020-12-15 23:42:41 +08:00
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struct vc4_hdmi_connector_state;
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2020-09-03 16:01:22 +08:00
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2020-09-03 16:01:48 +08:00
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enum vc4_hdmi_phy_channel {
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PHY_LANE_0 = 0,
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PHY_LANE_1,
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PHY_LANE_2,
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PHY_LANE_CK,
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};
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2020-09-03 16:01:22 +08:00
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struct vc4_hdmi_variant {
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2020-09-03 16:01:29 +08:00
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/* Encoder Type for that controller */
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enum vc4_encoder_type encoder_type;
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2020-09-03 16:01:41 +08:00
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/* ALSA card name */
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const char *card_name;
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2020-09-03 16:01:30 +08:00
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/* Filename to expose the registers in debugfs */
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const char *debugfs_name;
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2020-09-03 16:01:35 +08:00
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/* Maximum pixel clock supported by the controller (in Hz) */
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unsigned long long max_pixel_clock;
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2020-09-03 16:01:23 +08:00
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/* List of the registers available on that variant */
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const struct vc4_hdmi_register *registers;
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/* Number of registers on that variant */
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unsigned int num_registers;
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2020-09-03 16:01:48 +08:00
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/* BCM2711 Only.
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* The variants don't map the lane in the same order in the
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* PHY, so this is an array mapping the HDMI channel (index)
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* to the PHY lane (value).
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*/
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enum vc4_hdmi_phy_channel phy_lane_mapping[4];
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2020-10-29 20:25:22 +08:00
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/* The BCM2711 cannot deal with odd horizontal pixel timings */
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bool unsupported_odd_h_timings;
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2021-01-11 22:23:04 +08:00
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/*
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* The BCM2711 CEC/hotplug IRQ controller is shared between the
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* two HDMI controllers, and we have a proper irqchip driver for
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* it.
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*/
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bool external_irq_controller;
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2020-09-03 16:01:22 +08:00
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/* Callback to get the resources (memory region, interrupts,
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* clocks, etc) for that variant.
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*/
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2022-07-12 01:39:14 +08:00
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int (*init_resources)(struct drm_device *drm,
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struct vc4_hdmi *vc4_hdmi);
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2020-09-03 16:01:24 +08:00
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/* Callback to reset the HDMI block */
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void (*reset)(struct vc4_hdmi *vc4_hdmi);
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2020-09-03 16:01:25 +08:00
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2020-09-03 16:01:27 +08:00
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/* Callback to enable / disable the CSC */
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2022-01-20 23:16:15 +08:00
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void (*csc_setup)(struct vc4_hdmi *vc4_hdmi,
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2022-01-20 23:16:19 +08:00
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struct drm_connector_state *state,
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2022-01-20 23:16:15 +08:00
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const struct drm_display_mode *mode);
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2020-09-03 16:01:27 +08:00
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2020-09-03 16:01:28 +08:00
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/* Callback to configure the video timings in the HDMI block */
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void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
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2020-12-15 23:42:43 +08:00
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struct drm_connector_state *state,
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2022-08-29 21:47:24 +08:00
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const struct drm_display_mode *mode);
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2020-09-03 16:01:28 +08:00
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2020-12-15 23:42:41 +08:00
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/* Callback to initialize the PHY according to the connector state */
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2020-09-03 16:01:25 +08:00
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void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
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2020-12-15 23:42:41 +08:00
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struct vc4_hdmi_connector_state *vc4_conn_state);
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2020-09-03 16:01:25 +08:00
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/* Callback to disable the PHY */
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void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
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2020-09-03 16:01:26 +08:00
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/* Callback to enable the RNG in the PHY */
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void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to disable the RNG in the PHY */
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void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
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2020-09-03 16:01:40 +08:00
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/* Callback to get channel map */
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u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
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2021-04-30 17:44:49 +08:00
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/* Enables HDR metadata */
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bool supports_hdr;
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2022-01-27 21:17:54 +08:00
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/* Callback for hardware specific hotplug detect */
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bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
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2020-09-03 16:01:22 +08:00
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};
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2020-09-03 16:01:11 +08:00
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/* HDMI audio information */
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struct vc4_hdmi_audio {
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struct snd_soc_card card;
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struct snd_soc_dai_link link;
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struct snd_soc_dai_link_component cpu;
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struct snd_soc_dai_link_component codec;
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struct snd_soc_dai_link_component platform;
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struct snd_dmaengine_dai_dma_data dma_data;
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2021-05-25 21:23:52 +08:00
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struct hdmi_audio_infoframe infoframe;
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2022-01-27 19:14:52 +08:00
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struct platform_device *codec_pdev;
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2020-09-03 16:01:38 +08:00
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bool streaming;
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2020-09-03 16:01:11 +08:00
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};
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2022-02-23 00:40:42 +08:00
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enum vc4_hdmi_output_format {
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VC4_HDMI_OUTPUT_RGB,
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VC4_HDMI_OUTPUT_YUV422,
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VC4_HDMI_OUTPUT_YUV444,
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VC4_HDMI_OUTPUT_YUV420,
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};
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2020-09-03 16:01:11 +08:00
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/* General HDMI hardware state. */
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struct vc4_hdmi {
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2020-09-03 16:01:19 +08:00
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struct vc4_hdmi_audio audio;
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2020-09-03 16:01:11 +08:00
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struct platform_device *pdev;
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2020-09-03 16:01:22 +08:00
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const struct vc4_hdmi_variant *variant;
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2020-09-03 16:01:11 +08:00
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2022-04-20 19:45:00 +08:00
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struct vc4_encoder encoder;
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2020-09-03 16:01:21 +08:00
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struct drm_connector connector;
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2020-09-03 16:01:11 +08:00
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2021-05-07 23:05:14 +08:00
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struct delayed_work scrambling_work;
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2020-09-03 16:01:11 +08:00
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struct i2c_adapter *ddc;
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void __iomem *hdmicore_regs;
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void __iomem *hd_regs;
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2020-09-03 16:01:48 +08:00
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/* VC5 Only */
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void __iomem *cec_regs;
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/* VC5 Only */
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void __iomem *csc_regs;
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/* VC5 Only */
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void __iomem *dvp_regs;
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/* VC5 Only */
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void __iomem *phy_regs;
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/* VC5 Only */
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void __iomem *ram_regs;
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/* VC5 Only */
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void __iomem *rm_regs;
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2021-05-24 21:18:52 +08:00
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struct gpio_desc *hpd_gpio;
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2020-09-03 16:01:11 +08:00
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2020-10-29 21:40:17 +08:00
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/*
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* On some systems (like the RPi4), some modes are in the same
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* frequency range than the WiFi channels (1440p@60Hz for
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* example). Should we take evasive actions because that system
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* has a wifi adapter?
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*/
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bool disable_wifi_frequencies;
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2020-09-03 16:01:11 +08:00
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struct cec_adapter *cec_adap;
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struct cec_msg cec_rx_msg;
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bool cec_tx_ok;
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bool cec_irq_was_rx;
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2021-01-11 22:23:02 +08:00
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struct clk *cec_clock;
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2020-09-03 16:01:11 +08:00
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struct clk *pixel_clock;
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struct clk *hsm_clock;
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drm/vc4: hdmi: Fix HSM clock too low on Pi4
Commit ae71ab585c81 ("drm/vc4: hdmi: Enforce the minimum rate at
runtime_resume") reintroduced the call to clk_set_min_rate in an attempt
to fix the boot without a monitor connected on the RaspberryPi3.
However, that introduced a regression breaking the display output
entirely (black screen but no vblank timeout) on the Pi4.
This is due to the fact that we now have in a typical modeset at boot,
in vc4_hdmi_encoder_pre_crtc_configure(), we have a first call to
clk_set_min_rate() asking for the minimum rate of the HSM clock for our
given resolution, and then a call to pm_runtime_resume_and_get(). We
will thus execute vc4_hdmi_runtime_resume() which, since the commit
mentioned above, will call clk_set_min_rate() a second time with the
absolute minimum rate we want to enforce on the HSM clock.
We're thus effectively erasing the minimum mandated by the mode we're
trying to set. The fact that only the Pi4 is affected is due to the fact
that it uses a different clock driver that tries to minimize the HSM
clock at all time. It will thus lower the HSM clock rate to 120MHz on
the second clk_set_min_rate() call.
The Pi3 doesn't use the same driver and will not change the frequency on
the second clk_set_min_rate() call since it's still within the new
boundaries and it doesn't have the code to minimize the clock rate as
needed. So even though the boundaries are still off, the clock rate is
still the right one for our given mode, so everything works.
There is a lot of moving parts, so I couldn't find any obvious
solution:
- Reverting the original is not an option, as that would break the Pi3
again.
- We can't move the clk_set_min_rate() call in _pre_crtc_configure()
since because, on the Pi3, the HSM clock has the CLK_SET_RATE_GATE
flag which prevents the clock rate from being changed after it's
been enabled. Our calls to clk_set_min_rate() can change it, so they
need to be done before clk_prepare_enable().
- We can't remove the call to clk_prepare_enable() from the
runtime_resume hook to put it into _pre_crtc_configure() either,
since we need that clock to be enabled to access the registers, and
we can't count on the fact that the display will be active in all
situations (doing any CEC operation, or listing the modes while
inactive are valid for example()).
- We can't drop the call to clk_set_min_rate() in
_pre_crtc_configure() since we would need to still enforce the
minimum rate for a given resolution, and runtime_resume doesn't have
access to the current mode, if there's any.
- We can't copy the TMDS character rate into vc4_hdmi and reuse it
since, because it's part of the KMS atomic state, it needs to be
protected by a mutex. Unfortunately, some functions (CEC operations,
mostly) can be reentrant (through the CEC framework) and still need
a pm_runtime_get.
However, we can work around this issue by leveraging the fact that the
clk_set_min_rate() calls set boundaries for its given struct clk, and
that each different clk_get() call will return a different instance of
struct clk. The clock framework will then aggregate the boundaries for
each struct clk instances linked to a given clock, plus its hardware
boundaries, and will use that.
We can thus get an extra HSM clock user for runtime_pm use only, and use
our different clock instances depending on the context: runtime_pm will
use its own to set the absolute minimum clock setup so that we never
lock the CPU waiting for a register access, and the modeset part will
set its requirement for the current resolution. And we let the CCF do
the coordination.
It's not an ideal solution, but it's fairly unintrusive and doesn't
really change any part of the logic so it looks like a rather safe fix.
Link: https://bugzilla.redhat.com/show_bug.cgi?id=2136234
Fixes: ae71ab585c81 ("drm/vc4: hdmi: Enforce the minimum rate at runtime_resume")
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20221021131339.2203291-1-maxime@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2022-10-21 21:13:39 +08:00
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struct clk *hsm_rpm_clock;
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2020-09-03 16:01:40 +08:00
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struct clk *audio_clock;
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2020-09-03 16:01:47 +08:00
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struct clk *pixel_bvb_clock;
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2020-09-03 16:01:11 +08:00
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2020-09-03 16:01:48 +08:00
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struct reset_control *reset;
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2020-09-03 16:01:11 +08:00
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struct debugfs_regset32 hdmi_regset;
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struct debugfs_regset32 hd_regset;
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2021-10-25 22:11:08 +08:00
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2022-06-13 22:47:45 +08:00
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/* VC5 only */
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struct debugfs_regset32 cec_regset;
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struct debugfs_regset32 csc_regset;
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struct debugfs_regset32 dvp_regset;
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struct debugfs_regset32 phy_regset;
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struct debugfs_regset32 ram_regset;
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struct debugfs_regset32 rm_regset;
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2021-10-25 22:11:08 +08:00
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/**
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* @hw_lock: Spinlock protecting device register access.
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*/
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spinlock_t hw_lock;
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drm/vc4: hdmi: Use a mutex to prevent concurrent framework access
The vc4 HDMI controller registers into the KMS, CEC and ALSA
frameworks.
However, no particular care is done to prevent the concurrent execution
of different framework hooks from happening at the same time.
In order to protect against that scenario, let's introduce a mutex that
relevant ALSA and KMS hooks will need to take to prevent concurrent
execution.
CEC is left out at the moment though, since the .get_modes and .detect
KMS hooks, when running cec_s_phys_addr_from_edid, can end up calling
CEC's .adap_enable hook. This introduces some reentrancy that isn't easy
to deal with properly.
The CEC hooks also don't share much state with the rest of the driver:
the registers are entirely separate, we don't share any variable, the
only thing that can conflict is the CEC clock divider setup that can be
affected by a mode set.
However, after discussing it, it looks like CEC should be able to
recover from this if it was to happen.
Link: https://lore.kernel.org/r/20211025141113.702757-6-maxime@cerno.tech
Fixes: bb7d78568814 ("drm/vc4: Add HDMI audio support")
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2021-10-25 22:11:09 +08:00
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/**
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* @mutex: Mutex protecting the driver access across multiple
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drm/vc4: hdmi: Remove mutex in detect
We recently introduced a new mutex to protect concurrent execution of
ALSA and KMS hooks, and the concurrent access to some of vc4_hdmi
fields.
However, using it in the detect hook was creating a reentrency issue
with CEC code. Indeed, calling cec_s_phys_addr_from_edid from detect
might call the CEC adap_enable hook with the lock held, eventually
resulting in a deadlock.
Since we didn't really need to protect anything at the moment in the CEC
code, the decision was made to ignore the mutex in those CEC hooks,
working around the issue.
However, we can have the same thing happening if we end up triggering a
mode set from the detect callback, for example using
drm_atomic_helper_connector_hdmi_reset_link().
Since we don't really need to protect anything in detect either, let's
just drop the lock in detect, and add it again in CEC.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220829134731.213478-4-maxime@cerno.tech
2022-08-29 21:47:26 +08:00
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* frameworks (KMS, ALSA, CEC).
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drm/vc4: hdmi: Use a mutex to prevent concurrent framework access
The vc4 HDMI controller registers into the KMS, CEC and ALSA
frameworks.
However, no particular care is done to prevent the concurrent execution
of different framework hooks from happening at the same time.
In order to protect against that scenario, let's introduce a mutex that
relevant ALSA and KMS hooks will need to take to prevent concurrent
execution.
CEC is left out at the moment though, since the .get_modes and .detect
KMS hooks, when running cec_s_phys_addr_from_edid, can end up calling
CEC's .adap_enable hook. This introduces some reentrancy that isn't easy
to deal with properly.
The CEC hooks also don't share much state with the rest of the driver:
the registers are entirely separate, we don't share any variable, the
only thing that can conflict is the CEC clock divider setup that can be
affected by a mode set.
However, after discussing it, it looks like CEC should be able to
recover from this if it was to happen.
Link: https://lore.kernel.org/r/20211025141113.702757-6-maxime@cerno.tech
Fixes: bb7d78568814 ("drm/vc4: Add HDMI audio support")
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2021-10-25 22:11:09 +08:00
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*/
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struct mutex mutex;
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2021-10-25 22:11:10 +08:00
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/**
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* @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode
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* for use by ALSA hooks and interrupt handlers. Protected by @mutex.
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*/
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struct drm_display_mode saved_adjusted_mode;
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2021-10-25 22:11:12 +08:00
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2022-06-13 22:47:52 +08:00
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/**
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* @packet_ram_enabled: Is the HDMI controller packet RAM currently
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* on? Protected by @mutex.
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*/
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bool packet_ram_enabled;
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2021-10-25 22:11:13 +08:00
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/**
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* @scdc_enabled: Is the HDMI controller currently running with
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* the scrambler on? Protected by @mutex.
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*/
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bool scdc_enabled;
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2022-02-23 00:40:40 +08:00
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/**
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2022-02-23 00:40:41 +08:00
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* @output_bpc: Copy of @vc4_connector_state.output_bpc for use
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* outside of KMS hooks. Protected by @mutex.
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2022-02-23 00:40:40 +08:00
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*/
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unsigned int output_bpc;
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2022-02-23 00:40:42 +08:00
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/**
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* @output_format: Copy of @vc4_connector_state.output_format
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* for use outside of KMS hooks. Protected by @mutex.
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*/
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enum vc4_hdmi_output_format output_format;
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2020-09-03 16:01:11 +08:00
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};
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2020-09-03 16:01:17 +08:00
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static inline struct vc4_hdmi *
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connector_to_vc4_hdmi(struct drm_connector *connector)
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{
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2020-09-03 16:01:21 +08:00
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return container_of(connector, struct vc4_hdmi, connector);
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2020-09-03 16:01:17 +08:00
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}
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static inline struct vc4_hdmi *
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encoder_to_vc4_hdmi(struct drm_encoder *encoder)
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|
{
|
2022-04-20 19:45:00 +08:00
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struct vc4_encoder *_encoder = to_vc4_encoder(encoder);
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2020-09-03 16:01:17 +08:00
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return container_of(_encoder, struct vc4_hdmi, encoder);
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}
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2020-12-15 23:42:39 +08:00
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|
|
struct vc4_hdmi_connector_state {
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|
|
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struct drm_connector_state base;
|
2022-02-23 00:40:36 +08:00
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unsigned long long tmds_char_rate;
|
2022-02-23 00:40:41 +08:00
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|
|
unsigned int output_bpc;
|
2022-02-23 00:40:42 +08:00
|
|
|
enum vc4_hdmi_output_format output_format;
|
2020-12-15 23:42:39 +08:00
|
|
|
};
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|
|
|
|
|
|
|
static inline struct vc4_hdmi_connector_state *
|
|
|
|
conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state)
|
|
|
|
{
|
|
|
|
return container_of(conn_state, struct vc4_hdmi_connector_state, base);
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|
|
}
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|
2020-09-03 16:01:25 +08:00
|
|
|
void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
|
2020-12-15 23:42:41 +08:00
|
|
|
struct vc4_hdmi_connector_state *vc4_conn_state);
|
2020-09-03 16:01:25 +08:00
|
|
|
void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
|
2020-09-03 16:01:26 +08:00
|
|
|
void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
|
|
|
|
void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
|
2020-09-03 16:01:25 +08:00
|
|
|
|
2020-09-03 16:01:48 +08:00
|
|
|
void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
|
2020-12-15 23:42:41 +08:00
|
|
|
struct vc4_hdmi_connector_state *vc4_conn_state);
|
2020-09-03 16:01:48 +08:00
|
|
|
void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
|
|
|
|
void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
|
|
|
|
void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
|
|
|
|
|
2020-09-03 16:01:11 +08:00
|
|
|
#endif /* _VC4_HDMI_H_ */
|