2019-05-27 14:55:21 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2016-11-04 15:43:05 +08:00
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Shunli Wang <shunli.wang@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt2701-clk.h>
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static const struct mtk_gate_regs vdec0_cg_regs = {
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.set_ofs = 0x0000,
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.clr_ofs = 0x0004,
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.sta_ofs = 0x0000,
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};
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static const struct mtk_gate_regs vdec1_cg_regs = {
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.set_ofs = 0x0008,
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.clr_ofs = 0x000c,
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.sta_ofs = 0x0008,
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};
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#define GATE_VDEC0(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vdec0_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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#define GATE_VDEC1(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &vdec1_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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static const struct mtk_gate vdec_clks[] = {
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GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0),
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GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0),
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};
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2022-09-22 17:18:29 +08:00
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static const struct mtk_clk_desc vdec_desc = {
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.clks = vdec_clks,
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.num_clks = ARRAY_SIZE(vdec_clks),
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2016-11-04 15:43:05 +08:00
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};
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2022-09-22 17:18:29 +08:00
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static const struct of_device_id of_match_clk_mt2701_vdec[] = {
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{
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.compatible = "mediatek,mt2701-vdecsys",
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.data = &vdec_desc,
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}, {
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/* sentinel */
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}
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};
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2016-11-04 15:43:05 +08:00
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static struct platform_driver clk_mt2701_vdec_drv = {
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2022-09-22 17:18:29 +08:00
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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2016-11-04 15:43:05 +08:00
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.driver = {
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.name = "clk-mt2701-vdec",
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.of_match_table = of_match_clk_mt2701_vdec,
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},
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};
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builtin_platform_driver(clk_mt2701_vdec_drv);
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