2013-01-11 22:22:45 +08:00
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/*
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* Copyright (C) 2008-2013 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, yu.liu@freescale.com
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* Scott Wood, scottwood@freescale.com
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* Ashish Kalra, ashish.kalra@freescale.com
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* Varun Sethi, varun.sethi@freescale.com
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* Alexander Graf, agraf@suse.de
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*
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* Description:
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* This file is based on arch/powerpc/kvm/44x_tlb.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/log2.h>
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#include <linux/uaccess.h>
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#include <linux/sched.h>
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#include <linux/rwsem.h>
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#include <linux/vmalloc.h>
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#include <linux/hugetlb.h>
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#include <asm/kvm_ppc.h>
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#include "e500.h"
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#include "trace.h"
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#include "timing.h"
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#include "e500_mmu_host.h"
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#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
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static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
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static inline unsigned int tlb1_max_shadow_size(void)
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{
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/* reserve one entry for magic page */
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return host_tlb_params[1].entries - tlbcam_index - 1;
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}
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static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
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{
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/* Mask off reserved bits. */
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mas3 &= MAS3_ATTRIB_MASK;
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#ifndef CONFIG_KVM_BOOKE_HV
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if (!usermode) {
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/* Guest is in supervisor mode,
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* so we need to translate guest
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* supervisor permissions into user permissions. */
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mas3 &= ~E500_TLB_USER_PERM_MASK;
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mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
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}
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mas3 |= E500_TLB_SUPER_PERM_MASK;
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#endif
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return mas3;
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}
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static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
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{
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#ifdef CONFIG_SMP
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return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
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#else
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return mas2 & MAS2_ATTRIB_MASK;
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#endif
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}
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/*
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* writing shadow tlb entry to host TLB
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*/
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static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
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uint32_t mas0)
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{
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unsigned long flags;
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local_irq_save(flags);
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mtspr(SPRN_MAS0, mas0);
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mtspr(SPRN_MAS1, stlbe->mas1);
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mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
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mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
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mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
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#ifdef CONFIG_KVM_BOOKE_HV
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mtspr(SPRN_MAS8, stlbe->mas8);
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#endif
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asm volatile("isync; tlbwe" : : : "memory");
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#ifdef CONFIG_KVM_BOOKE_HV
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/* Must clear mas8 for other host tlbwe's */
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mtspr(SPRN_MAS8, 0);
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isync();
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#endif
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local_irq_restore(flags);
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trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
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stlbe->mas2, stlbe->mas7_3);
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}
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/*
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* Acquire a mas0 with victim hint, as if we just took a TLB miss.
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*
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* We don't care about the address we're searching for, other than that it's
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* in the right set and is not present in the TLB. Using a zero PID and a
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* userspace address means we don't have to set and then restore MAS5, or
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* calculate a proper MAS6 value.
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*/
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static u32 get_host_mas0(unsigned long eaddr)
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{
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unsigned long flags;
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u32 mas0;
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local_irq_save(flags);
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mtspr(SPRN_MAS6, 0);
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asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
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mas0 = mfspr(SPRN_MAS0);
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local_irq_restore(flags);
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return mas0;
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}
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/* sesel is for tlb1 only */
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static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
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{
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u32 mas0;
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if (tlbsel == 0) {
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mas0 = get_host_mas0(stlbe->mas2);
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__write_host_tlbe(stlbe, mas0);
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} else {
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__write_host_tlbe(stlbe,
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MAS0_TLBSEL(1) |
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MAS0_ESEL(to_htlb1_esel(sesel)));
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}
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}
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/* sesel is for tlb1 only */
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static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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struct kvm_book3e_206_tlb_entry *stlbe,
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int stlbsel, int sesel)
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{
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int stid;
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preempt_disable();
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stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe);
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stlbe->mas1 |= MAS1_TID(stid);
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write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
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preempt_enable();
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}
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#ifdef CONFIG_KVM_E500V2
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/* XXX should be a hook in the gva2hpa translation */
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void kvmppc_map_magic(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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struct kvm_book3e_206_tlb_entry magic;
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ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
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unsigned int stid;
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pfn_t pfn;
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pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
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get_page(pfn_to_page(pfn));
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preempt_disable();
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stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
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magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
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MAS1_TSIZE(BOOK3E_PAGESZ_4K);
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magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
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magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
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MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
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magic.mas8 = 0;
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__write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
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preempt_enable();
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}
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#endif
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void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
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int esel)
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{
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struct kvm_book3e_206_tlb_entry *gtlbe =
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get_entry(vcpu_e500, tlbsel, esel);
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struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
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/* Don't bother with unmapped entries */
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if (!(ref->flags & E500_TLB_VALID))
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return;
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if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
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u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
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int hw_tlb_indx;
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unsigned long flags;
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local_irq_save(flags);
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while (tmp) {
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hw_tlb_indx = __ilog2_u64(tmp & -tmp);
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mtspr(SPRN_MAS0,
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MAS0_TLBSEL(1) |
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MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));
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mtspr(SPRN_MAS1, 0);
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asm volatile("tlbwe");
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vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0;
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tmp &= tmp - 1;
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}
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mb();
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vcpu_e500->g2h_tlb1_map[esel] = 0;
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ref->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID);
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local_irq_restore(flags);
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2013-01-18 00:54:36 +08:00
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}
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2013-01-11 22:22:45 +08:00
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2013-01-18 00:54:36 +08:00
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if (tlbsel == 1 && ref->flags & E500_TLB_TLB0) {
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/*
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* TLB1 entry is backed by 4k pages. This should happen
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* rarely and is not worth optimizing. Invalidate everything.
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*/
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kvmppc_e500_tlbil_all(vcpu_e500);
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ref->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID);
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2013-01-11 22:22:45 +08:00
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}
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2013-01-18 00:54:36 +08:00
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/* Already invalidated in between */
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if (!(ref->flags & E500_TLB_VALID))
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return;
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2013-01-11 22:22:45 +08:00
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/* Guest tlbe is backed by at most one host tlbe per shadow pid. */
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kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
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/* Mark the TLB as not backed by the host anymore */
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ref->flags &= ~E500_TLB_VALID;
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}
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static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
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}
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static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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pfn_t pfn)
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{
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ref->pfn = pfn;
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ref->flags = E500_TLB_VALID;
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if (tlbe_is_writable(gtlbe))
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kvm_set_pfn_dirty(pfn);
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}
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static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
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{
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if (ref->flags & E500_TLB_VALID) {
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trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
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ref->flags = 0;
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}
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}
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void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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if (vcpu_e500->g2h_tlb1_map)
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memset(vcpu_e500->g2h_tlb1_map, 0,
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sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
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if (vcpu_e500->h2g_tlb1_rmap)
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memset(vcpu_e500->h2g_tlb1_rmap, 0,
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sizeof(unsigned int) * host_tlb_params[1].entries);
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}
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static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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int tlbsel = 0;
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int i;
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for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
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struct tlbe_ref *ref =
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&vcpu_e500->gtlb_priv[tlbsel][i].ref;
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kvmppc_e500_ref_release(ref);
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}
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}
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void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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int stlbsel = 1;
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int i;
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kvmppc_e500_tlbil_all(vcpu_e500);
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for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
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struct tlbe_ref *ref =
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&vcpu_e500->tlb_refs[stlbsel][i];
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kvmppc_e500_ref_release(ref);
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}
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clear_tlb_privs(vcpu_e500);
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}
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void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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clear_tlb_refs(vcpu_e500);
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clear_tlb1_bitmap(vcpu_e500);
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}
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/* TID must be supplied by the caller */
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static void kvmppc_e500_setup_stlbe(
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struct kvm_vcpu *vcpu,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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int tsize, struct tlbe_ref *ref, u64 gvaddr,
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struct kvm_book3e_206_tlb_entry *stlbe)
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{
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pfn_t pfn = ref->pfn;
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u32 pr = vcpu->arch.shared->msr & MSR_PR;
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BUG_ON(!(ref->flags & E500_TLB_VALID));
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/* Force IPROT=0 for all guest mappings. */
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stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
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stlbe->mas2 = (gvaddr & MAS2_EPN) |
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e500_shadow_mas2_attrib(gtlbe->mas2, pr);
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stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
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e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
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#ifdef CONFIG_KVM_BOOKE_HV
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stlbe->mas8 = MAS8_TGS | vcpu->kvm->arch.lpid;
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#endif
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}
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static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
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|
u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
|
|
|
|
int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
|
|
|
|
struct tlbe_ref *ref)
|
|
|
|
{
|
|
|
|
struct kvm_memory_slot *slot;
|
|
|
|
unsigned long pfn = 0; /* silence GCC warning */
|
|
|
|
unsigned long hva;
|
|
|
|
int pfnmap = 0;
|
|
|
|
int tsize = BOOK3E_PAGESZ_4K;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Translate guest physical to true physical, acquiring
|
|
|
|
* a page reference if it is normal, non-reserved memory.
|
|
|
|
*
|
|
|
|
* gfn_to_memslot() must succeed because otherwise we wouldn't
|
|
|
|
* have gotten this far. Eventually we should just pass the slot
|
|
|
|
* pointer through from the first lookup.
|
|
|
|
*/
|
|
|
|
slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
|
|
|
|
hva = gfn_to_hva_memslot(slot, gfn);
|
|
|
|
|
|
|
|
if (tlbsel == 1) {
|
|
|
|
struct vm_area_struct *vma;
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
|
|
|
|
|
|
vma = find_vma(current->mm, hva);
|
|
|
|
if (vma && hva >= vma->vm_start &&
|
|
|
|
(vma->vm_flags & VM_PFNMAP)) {
|
|
|
|
/*
|
|
|
|
* This VMA is a physically contiguous region (e.g.
|
|
|
|
* /dev/mem) that bypasses normal Linux page
|
|
|
|
* management. Find the overlap between the
|
|
|
|
* vma and the memslot.
|
|
|
|
*/
|
|
|
|
|
|
|
|
unsigned long start, end;
|
|
|
|
unsigned long slot_start, slot_end;
|
|
|
|
|
|
|
|
pfnmap = 1;
|
|
|
|
|
|
|
|
start = vma->vm_pgoff;
|
|
|
|
end = start +
|
|
|
|
((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
|
|
|
|
|
|
|
|
pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
|
|
|
|
|
|
|
|
slot_start = pfn - (gfn - slot->base_gfn);
|
|
|
|
slot_end = slot_start + slot->npages;
|
|
|
|
|
|
|
|
if (start < slot_start)
|
|
|
|
start = slot_start;
|
|
|
|
if (end > slot_end)
|
|
|
|
end = slot_end;
|
|
|
|
|
|
|
|
tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
|
|
|
|
MAS1_TSIZE_SHIFT;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* e500 doesn't implement the lowest tsize bit,
|
|
|
|
* or 1K pages.
|
|
|
|
*/
|
|
|
|
tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Now find the largest tsize (up to what the guest
|
|
|
|
* requested) that will cover gfn, stay within the
|
|
|
|
* range, and for which gfn and pfn are mutually
|
|
|
|
* aligned.
|
|
|
|
*/
|
|
|
|
|
|
|
|
for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
|
|
|
|
unsigned long gfn_start, gfn_end, tsize_pages;
|
|
|
|
tsize_pages = 1 << (tsize - 2);
|
|
|
|
|
|
|
|
gfn_start = gfn & ~(tsize_pages - 1);
|
|
|
|
gfn_end = gfn_start + tsize_pages;
|
|
|
|
|
|
|
|
if (gfn_start + pfn - gfn < start)
|
|
|
|
continue;
|
|
|
|
if (gfn_end + pfn - gfn > end)
|
|
|
|
continue;
|
|
|
|
if ((gfn & (tsize_pages - 1)) !=
|
|
|
|
(pfn & (tsize_pages - 1)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
|
|
|
|
pfn &= ~(tsize_pages - 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else if (vma && hva >= vma->vm_start &&
|
|
|
|
(vma->vm_flags & VM_HUGETLB)) {
|
|
|
|
unsigned long psize = vma_kernel_pagesize(vma);
|
|
|
|
|
|
|
|
tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
|
|
|
|
MAS1_TSIZE_SHIFT;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the largest page size that satisfies both host
|
|
|
|
* and guest mapping
|
|
|
|
*/
|
|
|
|
tsize = min(__ilog2(psize) - 10, tsize);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* e500 doesn't implement the lowest tsize bit,
|
|
|
|
* or 1K pages.
|
|
|
|
*/
|
|
|
|
tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
|
|
|
|
}
|
|
|
|
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (likely(!pfnmap)) {
|
|
|
|
unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
|
|
|
|
pfn = gfn_to_pfn_memslot(slot, gfn);
|
|
|
|
if (is_error_noslot_pfn(pfn)) {
|
|
|
|
printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
|
|
|
|
(long)gfn);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Align guest and physical address to page map boundaries */
|
|
|
|
pfn &= ~(tsize_pages - 1);
|
|
|
|
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Drop old ref and setup new one. */
|
|
|
|
kvmppc_e500_ref_release(ref);
|
|
|
|
kvmppc_e500_ref_setup(ref, gtlbe, pfn);
|
|
|
|
|
|
|
|
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
|
|
|
ref, gvaddr, stlbe);
|
|
|
|
|
|
|
|
/* Clear i-cache for new pages */
|
|
|
|
kvmppc_mmu_flush_icache(pfn);
|
|
|
|
|
|
|
|
/* Drop refcount on page, so that mmu notifiers can clear it */
|
|
|
|
kvm_release_pfn_clean(pfn);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* XXX only map the one-one case, for now use TLB0 */
|
|
|
|
static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500, int esel,
|
|
|
|
struct kvm_book3e_206_tlb_entry *stlbe)
|
|
|
|
{
|
|
|
|
struct kvm_book3e_206_tlb_entry *gtlbe;
|
|
|
|
struct tlbe_ref *ref;
|
|
|
|
int stlbsel = 0;
|
|
|
|
int sesel = 0;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
gtlbe = get_entry(vcpu_e500, 0, esel);
|
|
|
|
ref = &vcpu_e500->gtlb_priv[0][esel].ref;
|
|
|
|
|
|
|
|
r = kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
|
|
|
|
get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
|
|
|
|
gtlbe, 0, stlbe, ref);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
|
|
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, stlbsel, sesel);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-18 00:54:36 +08:00
|
|
|
static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
|
|
struct tlbe_ref *ref,
|
|
|
|
int esel)
|
|
|
|
{
|
|
|
|
unsigned int sesel = vcpu_e500->host_tlb1_nv++;
|
|
|
|
|
|
|
|
if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
|
|
|
|
vcpu_e500->host_tlb1_nv = 0;
|
|
|
|
|
|
|
|
vcpu_e500->tlb_refs[1][sesel] = *ref;
|
|
|
|
vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
|
|
|
|
vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
|
|
|
|
if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
|
|
|
|
unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel];
|
|
|
|
vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
|
|
|
|
}
|
|
|
|
vcpu_e500->h2g_tlb1_rmap[sesel] = esel;
|
|
|
|
|
|
|
|
return sesel;
|
|
|
|
}
|
|
|
|
|
2013-01-11 22:22:45 +08:00
|
|
|
/* Caller must ensure that the specified guest TLB entry is safe to insert into
|
|
|
|
* the shadow TLB. */
|
2013-01-18 00:54:36 +08:00
|
|
|
/* For both one-one and one-to-many */
|
2013-01-11 22:22:45 +08:00
|
|
|
static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
|
|
u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
|
|
|
|
struct kvm_book3e_206_tlb_entry *stlbe, int esel)
|
|
|
|
{
|
2013-01-18 00:54:36 +08:00
|
|
|
struct tlbe_ref ref;
|
|
|
|
int sesel;
|
2013-01-11 22:22:45 +08:00
|
|
|
int r;
|
|
|
|
|
2013-01-18 00:54:36 +08:00
|
|
|
ref.flags = 0;
|
2013-01-11 22:22:45 +08:00
|
|
|
r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
|
2013-01-18 00:54:36 +08:00
|
|
|
&ref);
|
2013-01-11 22:22:45 +08:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
|
2013-01-18 00:54:36 +08:00
|
|
|
/* Use TLB0 when we can only map a page with 4k */
|
|
|
|
if (get_tlb_tsize(stlbe) == BOOK3E_PAGESZ_4K) {
|
|
|
|
vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_TLB0;
|
|
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, 0, 0);
|
|
|
|
return 0;
|
2013-01-11 22:22:45 +08:00
|
|
|
}
|
|
|
|
|
2013-01-18 00:54:36 +08:00
|
|
|
/* Otherwise map into TLB1 */
|
|
|
|
sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, &ref, esel);
|
|
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
|
2013-01-11 22:22:45 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
|
|
|
|
unsigned int index)
|
|
|
|
{
|
|
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
|
|
struct tlbe_priv *priv;
|
|
|
|
struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
|
|
|
|
int tlbsel = tlbsel_of(index);
|
|
|
|
int esel = esel_of(index);
|
|
|
|
|
|
|
|
gtlbe = get_entry(vcpu_e500, tlbsel, esel);
|
|
|
|
|
|
|
|
switch (tlbsel) {
|
|
|
|
case 0:
|
|
|
|
priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
|
|
|
|
|
|
|
|
/* Triggers after clear_tlb_refs or on initial mapping */
|
|
|
|
if (!(priv->ref.flags & E500_TLB_VALID)) {
|
|
|
|
kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
|
|
|
|
} else {
|
|
|
|
kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
|
|
|
|
&priv->ref, eaddr, &stlbe);
|
|
|
|
write_stlbe(vcpu_e500, gtlbe, &stlbe, 0, 0);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 1: {
|
|
|
|
gfn_t gfn = gpaddr >> PAGE_SHIFT;
|
|
|
|
kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe, &stlbe,
|
|
|
|
esel);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/************* MMU Notifiers *************/
|
|
|
|
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
|
|
|
trace_kvm_unmap_hva(hva);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Flush all shadow tlb entries everywhere. This is slow, but
|
|
|
|
* we are 100% sure that we catch the to be unmapped page
|
|
|
|
*/
|
|
|
|
kvm_flush_remote_tlbs(kvm);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
/* kvm_unmap_hva flushes everything anyways */
|
|
|
|
kvm_unmap_hva(kvm, start);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
|
|
|
/* XXX could be more clever ;) */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
|
|
|
/* XXX could be more clever ;) */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
|
|
{
|
|
|
|
/* The page will get remapped properly on its next fault */
|
|
|
|
kvm_unmap_hva(kvm, hva);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************/
|
|
|
|
|
|
|
|
int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
|
|
{
|
|
|
|
host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
|
|
|
|
host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This should never happen on real e500 hardware, but is
|
|
|
|
* architecturally possible -- e.g. in some weird nested
|
|
|
|
* virtualization case.
|
|
|
|
*/
|
|
|
|
if (host_tlb_params[0].entries == 0 ||
|
|
|
|
host_tlb_params[1].entries == 0) {
|
|
|
|
pr_err("%s: need to know host tlb size\n", __func__);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
|
|
|
|
TLBnCFG_ASSOC_SHIFT;
|
|
|
|
host_tlb_params[1].ways = host_tlb_params[1].entries;
|
|
|
|
|
|
|
|
if (!is_power_of_2(host_tlb_params[0].entries) ||
|
|
|
|
!is_power_of_2(host_tlb_params[0].ways) ||
|
|
|
|
host_tlb_params[0].entries < host_tlb_params[0].ways ||
|
|
|
|
host_tlb_params[0].ways == 0) {
|
|
|
|
pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
|
|
|
|
__func__, host_tlb_params[0].entries,
|
|
|
|
host_tlb_params[0].ways);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
host_tlb_params[0].sets =
|
|
|
|
host_tlb_params[0].entries / host_tlb_params[0].ways;
|
|
|
|
host_tlb_params[1].sets = 1;
|
|
|
|
|
|
|
|
vcpu_e500->tlb_refs[0] =
|
|
|
|
kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!vcpu_e500->tlb_refs[0])
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
vcpu_e500->tlb_refs[1] =
|
|
|
|
kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!vcpu_e500->tlb_refs[1])
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
|
|
|
|
host_tlb_params[1].entries,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!vcpu_e500->h2g_tlb1_rmap)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
kfree(vcpu_e500->tlb_refs[0]);
|
|
|
|
kfree(vcpu_e500->tlb_refs[1]);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
|
|
{
|
|
|
|
kfree(vcpu_e500->h2g_tlb1_rmap);
|
|
|
|
kfree(vcpu_e500->tlb_refs[0]);
|
|
|
|
kfree(vcpu_e500->tlb_refs[1]);
|
|
|
|
}
|