2021-10-18 21:59:03 +08:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/wlf,wm8962.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Wolfson WM8962 Ultra-Low Power Stereo CODEC
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maintainers:
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- patches@opensource.cirrus.com
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properties:
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compatible:
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const: wlf,wm8962
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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2021-11-24 23:51:01 +08:00
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interrupts:
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maxItems: 1
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2021-10-18 21:59:03 +08:00
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"#sound-dai-cells":
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const: 0
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AVDD-supply:
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description: Analogue supply.
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CPVDD-supply:
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description: Charge pump power supply.
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DBVDD-supply:
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description: Digital Buffer Supply.
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DCVDD-supply:
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description: Digital Core Supply.
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MICVDD-supply:
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description: Microphone bias amp supply.
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PLLVDD-supply:
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description: PLL Supply
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SPKVDD1-supply:
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description: Supply for left speaker drivers.
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SPKVDD2-supply:
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description: Supply for right speaker drivers.
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spk-mono:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If present, the SPK_MONO bit of R51 (Class D Control 2) gets set,
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indicating that the speaker is in mono mode.
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mic-cfg:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Default register value for R48 (Additional Control 4).
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If absent, the default should be the register default.
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gpio-cfg:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 6
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maxItems: 6
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description:
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A list of GPIO configuration register values. If absent, no
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configuration of these registers is performed. Note that only values
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within [0x0, 0xffff] are valid. Any other value is regarded as setting
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the GPIO register to its reset value 0x0.
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port:
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$ref: audio-graph-port.yaml#
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- AVDD-supply
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- CPVDD-supply
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- DBVDD-supply
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- DCVDD-supply
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- MICVDD-supply
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- PLLVDD-supply
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- SPKVDD1-supply
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- SPKVDD2-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx6qdl-clock.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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wm8962: codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0013 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x8014 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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};
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