2014-06-26 11:41:31 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2014 Lemote Corporation.
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* written by Huacai Chen <chenhc@lemote.com>
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*
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* based on arch/mips/cavium-octeon/cpu.c
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/notifier.h>
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2017-03-08 15:29:31 +08:00
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#include <linux/ptrace.h>
|
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
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#include <linux/uaccess.h>
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#include <linux/sched/signal.h>
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2014-06-26 11:41:31 +08:00
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#include <asm/fpu.h>
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#include <asm/cop2.h>
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MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
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#include <asm/inst.h>
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#include <asm/branch.h>
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2014-06-26 11:41:31 +08:00
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#include <asm/current.h>
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#include <asm/mipsregs.h>
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MIPS: Fix build warning about "PTR_STR" redefinition
PTR_STR is redefined when CONFIG_TEST_PRINTF is set. This causes the
following build warning:
CC lib/test_printf.o
lib/test_printf.c:214:0: warning: "PTR_STR" redefined
#define PTR_STR "ffff0123456789ab"
^
In file included from ./arch/mips/include/asm/dsemul.h:11:0,
from ./arch/mips/include/asm/processor.h:22,
from ./arch/mips/include/asm/thread_info.h:16,
from ./include/linux/thread_info.h:38,
from ./include/asm-generic/preempt.h:5,
from ./arch/mips/include/generated/asm/preempt.h:1,
from ./include/linux/preempt.h:78,
from ./include/linux/spinlock.h:51,
from ./include/linux/seqlock.h:36,
from ./include/linux/time.h:6,
from ./include/linux/stat.h:19,
from ./include/linux/module.h:13,
from lib/test_printf.c:10:
./arch/mips/include/asm/inst.h:20:0: note: this is the location of the previous definition
#define PTR_STR ".dword"
^
Instead of renaming PTR_STR we move the unaligned macros to a new file,
which is only included inside MIPS code. This way we can safely include
asm.h and can use STR(PTR) again.
Fixes: e701656ec4db ("MIPS: inst.h: Stop including asm.h to avoid various build failures")
Cc: Maciej W. Rozycki" <macro@linux-mips.org>
Reported-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-30 16:55:25 +08:00
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#include <asm/unaligned-emul.h>
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2014-06-26 11:41:31 +08:00
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static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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void *data)
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{
|
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
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unsigned int res, fpu_owned;
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unsigned long ra, value, value_next;
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union mips_instruction insn;
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2014-06-26 11:41:31 +08:00
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int fr = !test_thread_flag(TIF_32BIT_FPREGS);
|
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
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struct pt_regs *regs = (struct pt_regs *)data;
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void __user *addr = (void __user *)regs->cp0_badvaddr;
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unsigned int __user *pc = (unsigned int __user *)exception_epc(regs);
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ra = regs->regs[31];
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__get_user(insn.word, pc);
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2014-06-26 11:41:31 +08:00
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switch (action) {
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case CU2_EXCEPTION:
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preempt_disable();
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2014-08-11 17:10:38 +08:00
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fpu_owned = __is_fpu_owner();
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2014-06-26 11:41:31 +08:00
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if (!fr)
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set_c0_status(ST0_CU1 | ST0_CU2);
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else
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set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR);
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enable_fpu_hazard();
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KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2);
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if (fr)
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KSTK_STATUS(current) |= ST0_FR;
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else
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KSTK_STATUS(current) &= ~ST0_FR;
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2014-08-11 17:10:38 +08:00
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/* If FPU is owned, we needn't init or restore fp */
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if (!fpu_owned) {
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2014-06-26 11:41:31 +08:00
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set_thread_flag(TIF_USEDFPU);
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2018-11-08 07:13:59 +08:00
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init_fp_ctx(current);
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_restore_fp(current);
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2014-06-26 11:41:31 +08:00
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}
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preempt_enable();
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return NOTIFY_STOP; /* Don't call default notifier */
|
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
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case CU2_LWC2_OP:
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if (insn.loongson3_lswc2_format.ls == 0)
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goto sigbus;
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if (insn.loongson3_lswc2_format.fr == 0) { /* gslq */
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if (!access_ok(addr, 16))
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goto sigbus;
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LoadDW(addr, value, res);
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if (res)
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goto fault;
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LoadDW(addr + 8, value_next, res);
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if (res)
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goto fault;
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regs->regs[insn.loongson3_lswc2_format.rt] = value;
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regs->regs[insn.loongson3_lswc2_format.rq] = value_next;
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compute_return_epc(regs);
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} else { /* gslqc1 */
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if (!access_ok(addr, 16))
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goto sigbus;
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lose_fpu(1);
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LoadDW(addr, value, res);
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if (res)
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goto fault;
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LoadDW(addr + 8, value_next, res);
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if (res)
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rt, value);
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rq, value_next);
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compute_return_epc(regs);
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own_fpu(1);
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}
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return NOTIFY_STOP; /* Don't call default notifier */
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case CU2_SWC2_OP:
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if (insn.loongson3_lswc2_format.ls == 0)
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goto sigbus;
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if (insn.loongson3_lswc2_format.fr == 0) { /* gssq */
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if (!access_ok(addr, 16))
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goto sigbus;
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/* write upper 8 bytes first */
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value_next = regs->regs[insn.loongson3_lswc2_format.rq];
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StoreDW(addr + 8, value_next, res);
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if (res)
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goto fault;
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value = regs->regs[insn.loongson3_lswc2_format.rt];
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StoreDW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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} else { /* gssqc1 */
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if (!access_ok(addr, 16))
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goto sigbus;
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lose_fpu(1);
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value_next = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rq);
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StoreDW(addr + 8, value_next, res);
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if (res)
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goto fault;
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value = get_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rt);
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StoreDW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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own_fpu(1);
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}
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return NOTIFY_STOP; /* Don't call default notifier */
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case CU2_LDC2_OP:
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switch (insn.loongson3_lsdc2_format.opcode1) {
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/*
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* Loongson-3 overridden ldc2 instructions.
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* opcode1 instruction
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* 0x1 gslhx: load 2 bytes to GPR
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* 0x2 gslwx: load 4 bytes to GPR
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* 0x3 gsldx: load 8 bytes to GPR
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* 0x6 gslwxc1: load 4 bytes to FPR
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* 0x7 gsldxc1: load 8 bytes to FPR
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*/
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case 0x1:
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if (!access_ok(addr, 2))
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goto sigbus;
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LoadHW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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regs->regs[insn.loongson3_lsdc2_format.rt] = value;
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break;
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case 0x2:
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if (!access_ok(addr, 4))
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goto sigbus;
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LoadW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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regs->regs[insn.loongson3_lsdc2_format.rt] = value;
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break;
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case 0x3:
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if (!access_ok(addr, 8))
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goto sigbus;
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LoadDW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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regs->regs[insn.loongson3_lsdc2_format.rt] = value;
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break;
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case 0x6:
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die_if_kernel("Unaligned FP access in kernel code", regs);
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BUG_ON(!used_math());
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if (!access_ok(addr, 4))
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goto sigbus;
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lose_fpu(1);
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LoadW(addr, value, res);
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if (res)
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt, value);
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compute_return_epc(regs);
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own_fpu(1);
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break;
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case 0x7:
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die_if_kernel("Unaligned FP access in kernel code", regs);
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BUG_ON(!used_math());
|
|
|
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if (!access_ok(addr, 8))
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|
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goto sigbus;
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|
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lose_fpu(1);
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|
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LoadDW(addr, value, res);
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|
|
if (res)
|
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|
|
goto fault;
|
|
|
|
|
|
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lsdc2_format.rt, value);
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compute_return_epc(regs);
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|
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own_fpu(1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
}
|
|
|
|
return NOTIFY_STOP; /* Don't call default notifier */
|
|
|
|
|
|
|
|
case CU2_SDC2_OP:
|
|
|
|
switch (insn.loongson3_lsdc2_format.opcode1) {
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|
|
|
/*
|
|
|
|
* Loongson-3 overridden sdc2 instructions.
|
|
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|
* opcode1 instruction
|
|
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* 0x1 gsshx: store 2 bytes from GPR
|
|
|
|
* 0x2 gsswx: store 4 bytes from GPR
|
|
|
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* 0x3 gssdx: store 8 bytes from GPR
|
|
|
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* 0x6 gsswxc1: store 4 bytes from FPR
|
|
|
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* 0x7 gssdxc1: store 8 bytes from FPR
|
|
|
|
*/
|
|
|
|
case 0x1:
|
|
|
|
if (!access_ok(addr, 2))
|
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|
|
goto sigbus;
|
|
|
|
|
|
|
|
compute_return_epc(regs);
|
|
|
|
value = regs->regs[insn.loongson3_lsdc2_format.rt];
|
|
|
|
|
|
|
|
StoreHW(addr, value, res);
|
|
|
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if (res)
|
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|
|
goto fault;
|
|
|
|
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|
|
break;
|
|
|
|
case 0x2:
|
|
|
|
if (!access_ok(addr, 4))
|
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|
|
goto sigbus;
|
|
|
|
|
|
|
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compute_return_epc(regs);
|
|
|
|
value = regs->regs[insn.loongson3_lsdc2_format.rt];
|
|
|
|
|
|
|
|
StoreW(addr, value, res);
|
|
|
|
if (res)
|
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|
|
goto fault;
|
|
|
|
|
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|
|
break;
|
|
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|
case 0x3:
|
|
|
|
if (!access_ok(addr, 8))
|
|
|
|
goto sigbus;
|
|
|
|
|
|
|
|
compute_return_epc(regs);
|
|
|
|
value = regs->regs[insn.loongson3_lsdc2_format.rt];
|
|
|
|
|
|
|
|
StoreDW(addr, value, res);
|
|
|
|
if (res)
|
|
|
|
goto fault;
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x6:
|
|
|
|
die_if_kernel("Unaligned FP access in kernel code", regs);
|
|
|
|
BUG_ON(!used_math());
|
|
|
|
|
|
|
|
if (!access_ok(addr, 4))
|
|
|
|
goto sigbus;
|
|
|
|
|
|
|
|
lose_fpu(1);
|
|
|
|
value = get_fpr64(current->thread.fpu.fpr,
|
|
|
|
insn.loongson3_lsdc2_format.rt);
|
|
|
|
|
|
|
|
StoreW(addr, value, res);
|
|
|
|
if (res)
|
|
|
|
goto fault;
|
|
|
|
|
|
|
|
compute_return_epc(regs);
|
|
|
|
own_fpu(1);
|
|
|
|
|
|
|
|
break;
|
|
|
|
case 0x7:
|
|
|
|
die_if_kernel("Unaligned FP access in kernel code", regs);
|
|
|
|
BUG_ON(!used_math());
|
|
|
|
|
|
|
|
if (!access_ok(addr, 8))
|
|
|
|
goto sigbus;
|
|
|
|
|
|
|
|
lose_fpu(1);
|
|
|
|
value = get_fpr64(current->thread.fpu.fpr,
|
|
|
|
insn.loongson3_lsdc2_format.rt);
|
|
|
|
|
|
|
|
StoreDW(addr, value, res);
|
|
|
|
if (res)
|
|
|
|
goto fault;
|
|
|
|
|
|
|
|
compute_return_epc(regs);
|
|
|
|
own_fpu(1);
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return NOTIFY_STOP; /* Don't call default notifier */
|
2014-06-26 11:41:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return NOTIFY_OK; /* Let default notifier send signals */
|
MIPS: Loongson-3: Add some unaligned instructions emulation
1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-24 18:56:46 +08:00
|
|
|
|
|
|
|
fault:
|
|
|
|
/* roll back jump/branch */
|
|
|
|
regs->regs[31] = ra;
|
|
|
|
regs->cp0_epc = (unsigned long)pc;
|
|
|
|
/* Did we have an exception handler installed? */
|
|
|
|
if (fixup_exception(regs))
|
|
|
|
return NOTIFY_STOP; /* Don't call default notifier */
|
|
|
|
|
|
|
|
die_if_kernel("Unhandled kernel unaligned access", regs);
|
|
|
|
force_sig(SIGSEGV);
|
|
|
|
|
|
|
|
return NOTIFY_STOP; /* Don't call default notifier */
|
|
|
|
|
|
|
|
sigbus:
|
|
|
|
die_if_kernel("Unhandled kernel unaligned access", regs);
|
|
|
|
force_sig(SIGBUS);
|
|
|
|
|
|
|
|
return NOTIFY_STOP; /* Don't call default notifier */
|
2014-06-26 11:41:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int __init loongson_cu2_setup(void)
|
|
|
|
{
|
|
|
|
return cu2_notifier(loongson_cu2_call, 0);
|
|
|
|
}
|
|
|
|
early_initcall(loongson_cu2_setup);
|