2008-09-16 04:44:55 +08:00
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/*
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* arch/arm/mm/highmem.c -- ARM highmem support
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*
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* Author: Nicolas Pitre
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* Created: september 8, 2008
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* Copyright: Marvell Semiconductors Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/highmem.h>
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#include <linux/interrupt.h>
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#include <asm/fixmap.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include "mm.h"
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void *kmap(struct page *page)
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{
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might_sleep();
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if (!PageHighMem(page))
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return page_address(page);
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return kmap_high(page);
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}
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EXPORT_SYMBOL(kmap);
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void kunmap(struct page *page)
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{
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BUG_ON(in_interrupt());
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if (!PageHighMem(page))
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return;
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kunmap_high(page);
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}
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EXPORT_SYMBOL(kunmap);
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void *kmap_atomic(struct page *page, enum km_type type)
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{
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unsigned int idx;
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unsigned long vaddr;
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2009-09-04 04:45:59 +08:00
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void *kmap;
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2008-09-16 04:44:55 +08:00
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pagefault_disable();
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if (!PageHighMem(page))
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return page_address(page);
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2009-10-11 23:29:48 +08:00
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debug_kmap_atomic(type);
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2010-06-08 04:28:55 +08:00
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#ifdef CONFIG_DEBUG_HIGHMEM
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/*
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* There is no cache coherency issue when non VIVT, so force the
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* dedicated kmap usage for better debugging purposes in that case.
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*/
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if (!cache_is_vivt())
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kmap = NULL;
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else
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#endif
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kmap = kmap_high_get(page);
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2009-09-04 04:45:59 +08:00
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if (kmap)
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return kmap;
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2008-09-16 04:44:55 +08:00
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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#ifdef CONFIG_DEBUG_HIGHMEM
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/*
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* With debugging enabled, kunmap_atomic forces that entry to 0.
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* Make sure it was indeed properly unmapped.
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*/
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BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
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#endif
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set_pte_ext(TOP_PTE(vaddr), mk_pte(page, kmap_prot), 0);
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/*
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* When debugging is off, kunmap_atomic leaves the previous mapping
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* in place, so this TLB flush ensures the TLB is updated with the
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* new mapping.
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*/
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local_flush_tlb_kernel_page(vaddr);
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return (void *)vaddr;
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}
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EXPORT_SYMBOL(kmap_atomic);
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void kunmap_atomic(void *kvaddr, enum km_type type)
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{
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unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
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unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
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if (kvaddr >= (void *)FIXADDR_START) {
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2010-03-30 04:46:02 +08:00
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if (cache_is_vivt())
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__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
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2008-09-16 04:44:55 +08:00
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
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set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
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local_flush_tlb_kernel_page(vaddr);
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#else
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(void) idx; /* to kill a warning */
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#endif
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2009-09-04 04:45:59 +08:00
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} else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) {
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/* this address was obtained through kmap_high_get() */
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kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)]));
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2008-09-16 04:44:55 +08:00
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}
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pagefault_enable();
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}
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EXPORT_SYMBOL(kunmap_atomic);
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void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
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{
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unsigned int idx;
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unsigned long vaddr;
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pagefault_disable();
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
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#endif
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set_pte_ext(TOP_PTE(vaddr), pfn_pte(pfn, kmap_prot), 0);
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local_flush_tlb_kernel_page(vaddr);
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return (void *)vaddr;
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}
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struct page *kmap_atomic_to_page(const void *ptr)
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{
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unsigned long vaddr = (unsigned long)ptr;
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pte_t *pte;
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if (vaddr < FIXADDR_START)
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return virt_to_page(ptr);
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pte = TOP_PTE(vaddr);
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return pte_page(*pte);
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}
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2010-03-30 04:46:02 +08:00
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#ifdef CONFIG_CPU_CACHE_VIPT
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#include <linux/percpu.h>
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/*
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* The VIVT cache of a highmem page is always flushed before the page
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* is unmapped. Hence unmapped highmem pages need no cache maintenance
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* in that case.
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*
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* However unmapped pages may still be cached with a VIPT cache, and
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* it is not possible to perform cache maintenance on them using physical
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* addresses unfortunately. So we have no choice but to set up a temporary
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* virtual mapping for that purpose.
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*
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* Yet this VIPT cache maintenance may be triggered from DMA support
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* functions which are possibly called from interrupt context. As we don't
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* want to keep interrupt disabled all the time when such maintenance is
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* taking place, we therefore allow for some reentrancy by preserving and
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* restoring the previous fixmap entry before the interrupted context is
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* resumed. If the reentrancy depth is 0 then there is no need to restore
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* the previous fixmap, and leaving the current one in place allow it to
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* be reused the next time without a TLB flush (common with DMA).
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*/
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static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
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void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
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{
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unsigned int idx, cpu = smp_processor_id();
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int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
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unsigned long vaddr, flags;
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pte_t pte, *ptep;
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idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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ptep = TOP_PTE(vaddr);
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pte = mk_pte(page, kmap_prot);
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if (!in_interrupt())
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preempt_disable();
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raw_local_irq_save(flags);
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(*depth)++;
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if (pte_val(*ptep) == pte_val(pte)) {
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*saved_pte = pte;
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} else {
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*saved_pte = *ptep;
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set_pte_ext(ptep, pte, 0);
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local_flush_tlb_kernel_page(vaddr);
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}
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raw_local_irq_restore(flags);
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return (void *)vaddr;
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}
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void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte)
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{
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unsigned int idx, cpu = smp_processor_id();
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int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
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unsigned long vaddr, flags;
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pte_t pte, *ptep;
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idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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ptep = TOP_PTE(vaddr);
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pte = mk_pte(page, kmap_prot);
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BUG_ON(pte_val(*ptep) != pte_val(pte));
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BUG_ON(*depth <= 0);
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raw_local_irq_save(flags);
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(*depth)--;
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if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) {
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set_pte_ext(ptep, saved_pte, 0);
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local_flush_tlb_kernel_page(vaddr);
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}
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raw_local_irq_restore(flags);
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if (!in_interrupt())
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preempt_enable();
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}
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#endif /* CONFIG_CPU_CACHE_VIPT */
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