2008-05-05 10:22:28 +08:00
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/******************************************************************************
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*
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2010-01-16 05:43:41 +08:00
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* Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
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2008-05-05 10:22:28 +08:00
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portions of the ieee80211 subsystem header files.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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2008-12-10 03:28:58 +08:00
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* Intel Linux Wireless <ilw@linux.intel.com>
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2008-05-05 10:22:28 +08:00
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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2008-06-30 17:23:09 +08:00
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#include <linux/etherdevice.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2008-05-05 10:22:28 +08:00
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#include <net/mac80211.h>
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2008-07-10 19:28:42 +08:00
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#include <asm/unaligned.h>
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2008-05-05 10:22:28 +08:00
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#include "iwl-eeprom.h"
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-sta.h"
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#include "iwl-io.h"
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#include "iwl-helpers.h"
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/************************** RX-FUNCTIONS ****************************/
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/*
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* Rx theory of operation
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*
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* Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
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* each of which point to Receive Buffers to be filled by the NIC. These get
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* used not only for Rx frames, but for any command response or notification
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* from the NIC. The driver and NIC manage the Rx buffers by means
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* of indexes into the circular buffer.
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*
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* Rx Queue Indexes
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* The host/firmware share two index registers for managing the Rx buffers.
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*
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* The READ index maps to the first position that the firmware may be writing
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* to -- the driver can read up to (but not including) this position and get
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* good data.
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* The READ index is managed by the firmware once the card is enabled.
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*
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* The WRITE index maps to the last position the driver has read from -- the
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* position preceding WRITE is the last slot the firmware can place a packet.
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*
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* The queue is empty (no good data) if WRITE = READ - 1, and is full if
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* WRITE = READ.
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*
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* During initialization, the host sets up the READ queue position to the first
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* INDEX position, and WRITE to the last (READ - 1 wrapped)
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*
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* When the firmware places a packet in a buffer, it will advance the READ index
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* and fire the RX interrupt. The driver can then query the READ index and
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* process as many packets as possible, moving the WRITE index forward as it
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* resets the Rx queue buffers with new memory.
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*
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* The management in the driver is as follows:
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* + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
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* iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
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* to replenish the iwl->rxq->rx_free.
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* + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
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* iwl->rxq is replenished and the READ INDEX is updated (updating the
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* 'processed' and 'read' driver indexes as well)
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* + A received packet is processed and handed to the kernel network stack,
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* detached from the iwl->rxq. The driver 'processed' index is updated.
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* + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
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* list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
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* INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
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* were enough free buffers and RX_STALLED is set it is cleared.
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*
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*
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* Driver sequence:
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*
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* iwl_rx_queue_alloc() Allocates rx_free
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* iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
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* iwl_rx_queue_restock
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* iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
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* queue, updates firmware pointers, and updates
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* the WRITE index. If insufficient rx_free buffers
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* are available, schedules iwl_rx_replenish
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*
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* -- enable interrupts --
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* ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
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* READ INDEX, detaching the SKB from the pool.
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* Moves the packet buffer from queue to rx_used.
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* Calls iwl_rx_queue_restock to refill any empty
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* slots.
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* ...
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*
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*/
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/**
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* iwl_rx_queue_space - Return number of free slots available in queue.
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*/
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int iwl_rx_queue_space(const struct iwl_rx_queue *q)
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{
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int s = q->read - q->write;
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if (s <= 0)
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s += RX_QUEUE_SIZE;
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/* keep some buffer to not confuse full and empty queue */
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s -= 2;
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if (s < 0)
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s = 0;
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return s;
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}
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/**
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* iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
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*/
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2010-02-04 05:47:56 +08:00
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void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
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2008-05-05 10:22:28 +08:00
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{
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unsigned long flags;
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2009-01-09 02:19:53 +08:00
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u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
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u32 reg;
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2008-05-05 10:22:28 +08:00
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spin_lock_irqsave(&q->lock, flags);
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if (q->need_update == 0)
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goto exit_unlock;
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2010-11-11 01:56:50 +08:00
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if (priv->cfg->base_params->shadow_reg_enable) {
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/* shadow register enabled */
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2008-05-05 10:22:28 +08:00
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/* Device expects a multiple of 8 */
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2009-05-23 02:01:51 +08:00
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q->write_actual = (q->write & ~0x7);
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2010-11-11 01:56:42 +08:00
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iwl_write32(priv, rx_wrt_ptr_reg, q->write_actual);
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2010-11-11 01:56:50 +08:00
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} else {
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/* If power-saving is in use, make sure device is awake */
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if (test_bit(STATUS_POWER_PMI, &priv->status)) {
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reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
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if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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IWL_DEBUG_INFO(priv,
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"Rx queue requesting wakeup,"
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" GP1 = 0x%x\n", reg);
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iwl_set_bit(priv, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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goto exit_unlock;
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}
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q->write_actual = (q->write & ~0x7);
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iwl_write_direct32(priv, rx_wrt_ptr_reg,
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q->write_actual);
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/* Else device is assumed to be awake */
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} else {
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/* Device expects a multiple of 8 */
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q->write_actual = (q->write & ~0x7);
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iwl_write_direct32(priv, rx_wrt_ptr_reg,
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q->write_actual);
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}
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2009-01-09 02:19:53 +08:00
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}
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2008-05-05 10:22:28 +08:00
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q->need_update = 0;
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exit_unlock:
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spin_unlock_irqrestore(&q->lock, flags);
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}
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int iwl_rx_queue_alloc(struct iwl_priv *priv)
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{
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struct iwl_rx_queue *rxq = &priv->rxq;
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2010-02-10 21:07:45 +08:00
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struct device *dev = &priv->pci_dev->dev;
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2008-05-05 10:22:28 +08:00
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int i;
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spin_lock_init(&rxq->lock);
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INIT_LIST_HEAD(&rxq->rx_free);
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INIT_LIST_HEAD(&rxq->rx_used);
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/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
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2010-06-08 04:21:46 +08:00
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rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
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2010-02-10 21:07:45 +08:00
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GFP_KERNEL);
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2008-05-05 10:22:28 +08:00
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if (!rxq->bd)
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2008-11-08 01:58:39 +08:00
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goto err_bd;
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2010-02-10 21:07:45 +08:00
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rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
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&rxq->rb_stts_dma, GFP_KERNEL);
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2008-11-08 01:58:39 +08:00
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if (!rxq->rb_stts)
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goto err_rb;
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2008-05-05 10:22:28 +08:00
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/* Fill the rx_used queue with _all_ of the Rx buffers */
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for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
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list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
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/* Set us so that we have processed and used all buffers, but have
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* not restocked the Rx queue with fresh buffers */
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rxq->read = rxq->write = 0;
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2009-05-23 02:01:51 +08:00
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rxq->write_actual = 0;
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2008-05-05 10:22:28 +08:00
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rxq->free_count = 0;
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rxq->need_update = 0;
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return 0;
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2008-11-08 01:58:39 +08:00
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err_rb:
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2010-02-10 21:07:45 +08:00
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dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
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2010-06-08 04:21:46 +08:00
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rxq->bd_dma);
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2008-11-08 01:58:39 +08:00
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err_bd:
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return -ENOMEM;
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2008-05-05 10:22:28 +08:00
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}
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2008-06-30 17:23:07 +08:00
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2010-01-23 06:22:57 +08:00
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void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
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struct iwl_rx_mem_buffer *rxb)
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{
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struct iwl_rx_packet *pkt = rxb_addr(rxb);
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struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
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if (!report->state) {
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IWL_DEBUG_11H(priv,
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"Spectrum Measure Notification: Start\n");
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return;
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}
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memcpy(&priv->measure_report, report, sizeof(*report));
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priv->measurement_status |= MEASUREMENT_READY;
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}
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2010-04-29 06:47:04 +08:00
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void iwl_recover_from_statistics(struct iwl_priv *priv,
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2010-03-06 06:22:46 +08:00
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struct iwl_rx_packet *pkt)
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{
|
2011-02-28 21:33:15 +08:00
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const struct iwl_mod_params *mod_params = priv->cfg->mod_params;
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2011-02-08 16:31:55 +08:00
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if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
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!iwl_is_any_associated(priv))
|
2010-03-06 06:22:46 +08:00
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return;
|
2011-02-08 16:31:55 +08:00
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|
2011-02-28 21:33:15 +08:00
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if (mod_params->ack_check &&
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priv->cfg->ops->lib->check_ack_health &&
|
2011-02-08 16:31:55 +08:00
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!priv->cfg->ops->lib->check_ack_health(priv, pkt)) {
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IWL_ERR(priv, "low ack count detected, restart firmware\n");
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if (!iwl_force_reset(priv, IWL_FW_RESET, false))
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return;
|
2010-01-23 06:22:46 +08:00
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}
|
2011-02-08 16:31:55 +08:00
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|
2011-02-28 21:33:15 +08:00
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if (mod_params->plcp_check &&
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priv->cfg->ops->lib->check_plcp_health &&
|
2011-02-08 16:31:55 +08:00
|
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!priv->cfg->ops->lib->check_plcp_health(priv, pkt))
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iwl_force_reset(priv, IWL_RF_RESET, false);
|
2010-03-05 05:38:58 +08:00
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}
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|
2008-06-30 17:23:09 +08:00
|
|
|
/*
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|
|
* returns non-zero if packet should be dropped
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|
*/
|
2009-01-28 06:27:52 +08:00
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int iwl_set_decrypted_flag(struct iwl_priv *priv,
|
|
|
|
struct ieee80211_hdr *hdr,
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|
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u32 decrypt_res,
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struct ieee80211_rx_status *stats)
|
2008-06-30 17:23:09 +08:00
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{
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u16 fc = le16_to_cpu(hdr->frame_control);
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|
2010-08-23 16:46:32 +08:00
|
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/*
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|
|
|
* All contexts have the same setting here due to it being
|
|
|
|
* a module parameter, so OK to check any context.
|
|
|
|
*/
|
|
|
|
if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
|
|
|
|
RXON_FILTER_DIS_DECRYPT_MSK)
|
2008-06-30 17:23:09 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (!(fc & IEEE80211_FCTL_PROTECTED))
|
|
|
|
return 0;
|
|
|
|
|
2009-01-28 06:27:56 +08:00
|
|
|
IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
|
2008-06-30 17:23:09 +08:00
|
|
|
switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_TKIP:
|
|
|
|
/* The uCode has got a bad phase 1 Key, pushes the packet.
|
|
|
|
* Decryption will be done in SW. */
|
|
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
|
|
RX_RES_STATUS_BAD_KEY_TTAK)
|
|
|
|
break;
|
|
|
|
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_WEP:
|
|
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
|
|
RX_RES_STATUS_BAD_ICV_MIC) {
|
|
|
|
/* bad ICV, the packet is destroyed since the
|
|
|
|
* decryption is inplace, drop it */
|
2009-01-28 06:27:56 +08:00
|
|
|
IWL_DEBUG_RX(priv, "Packet destroyed\n");
|
2008-06-30 17:23:09 +08:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
case RX_RES_STATUS_SEC_TYPE_CCMP:
|
|
|
|
if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
|
|
|
|
RX_RES_STATUS_DECRYPT_OK) {
|
2009-01-28 06:27:56 +08:00
|
|
|
IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
|
2008-06-30 17:23:09 +08:00
|
|
|
stats->flag |= RX_FLAG_DECRYPTED;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|