2016-07-05 17:04:22 +08:00
|
|
|
NVIDIA Tegra Hardware Synchronization Primitives (HSP)
|
|
|
|
|
|
|
|
The HSP modules are used for the processors to share resources and communicate
|
|
|
|
together. It provides a set of hardware synchronization primitives for
|
|
|
|
interprocessor communication. So the interprocessor communication (IPC)
|
|
|
|
protocols can use hardware synchronization primitives, when operating between
|
|
|
|
two processors not in an SMP relationship.
|
|
|
|
|
|
|
|
The features that HSP supported are shared mailboxes, shared semaphores,
|
|
|
|
arbitrated semaphores and doorbells.
|
|
|
|
|
|
|
|
Required properties:
|
|
|
|
- name : Should be hsp
|
|
|
|
- compatible
|
|
|
|
Array of strings.
|
|
|
|
one of:
|
|
|
|
- "nvidia,tegra186-hsp"
|
2018-11-28 17:54:12 +08:00
|
|
|
- "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"
|
2016-07-05 17:04:22 +08:00
|
|
|
- reg : Offset and length of the register set for the device.
|
|
|
|
- interrupt-names
|
|
|
|
Array of strings.
|
|
|
|
Contains a list of names for the interrupts described by the interrupt
|
|
|
|
property. May contain the following entries, in any order:
|
|
|
|
- "doorbell"
|
2018-11-28 17:54:12 +08:00
|
|
|
- "sharedN", where 'N' is a number from zero up to the number of
|
|
|
|
external interrupts supported by the HSP instance minus one.
|
2016-07-05 17:04:22 +08:00
|
|
|
Users of this binding MUST look up entries in the interrupt property
|
|
|
|
by name, using this interrupt-names property to do so.
|
|
|
|
- interrupts
|
|
|
|
Array of interrupt specifiers.
|
|
|
|
Must contain one entry per entry in the interrupt-names property,
|
|
|
|
in a matching order.
|
|
|
|
- #mbox-cells : Should be 2.
|
|
|
|
|
2018-11-28 17:54:12 +08:00
|
|
|
The mbox specifier of the "mboxes" property in the client node should contain
|
|
|
|
two cells. The first cell determines the HSP type and the second cell is used
|
|
|
|
to identify the mailbox that the client is going to use.
|
2016-07-05 17:04:22 +08:00
|
|
|
|
2018-11-28 17:54:12 +08:00
|
|
|
For doorbells, the second cell specifies the index of the doorbell to use.
|
|
|
|
|
|
|
|
For shared mailboxes, the second cell is composed of two fields:
|
|
|
|
- bits 31..24:
|
|
|
|
A bit mask of flags that further specify how the shared mailbox will be
|
|
|
|
used. Valid flags are:
|
|
|
|
- bit 31:
|
|
|
|
Defines the direction of the mailbox. If set, the mailbox will be used
|
|
|
|
as a producer (i.e. used to send data). If cleared, the mailbox is the
|
|
|
|
consumer of data sent by a producer.
|
|
|
|
|
|
|
|
- bits 23.. 0:
|
|
|
|
The index of the shared mailbox to use. The number of available mailboxes
|
|
|
|
may vary by instance of the HSP block and SoC generation.
|
|
|
|
|
|
|
|
The following file contains definitions that can be used to construct mailbox
|
|
|
|
specifiers:
|
|
|
|
|
|
|
|
<dt-bindings/mailbox/tegra186-hsp.h>
|
2016-07-05 17:04:22 +08:00
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
hsp_top0: hsp@3c00000 {
|
|
|
|
compatible = "nvidia,tegra186-hsp";
|
|
|
|
reg = <0x0 0x03c00000 0x0 0xa0000>;
|
|
|
|
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
interrupt-names = "doorbell";
|
|
|
|
#mbox-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
client {
|
|
|
|
...
|
|
|
|
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_XXX>;
|
|
|
|
};
|