2006-10-04 17:16:59 +08:00
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#ifndef LINUX_MSI_H
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#define LINUX_MSI_H
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2011-10-07 02:08:18 +08:00
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#include <linux/kobject.h>
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2007-04-05 15:19:10 +08:00
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#include <linux/list.h>
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2006-10-04 17:16:59 +08:00
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struct msi_msg {
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u32 address_lo; /* low 32 bits of msi message address */
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u32 address_hi; /* high 32 bits of msi message address */
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u32 data; /* 16 bits of msi message data */
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};
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2007-01-18 12:50:05 +08:00
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/* Helper functions */
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2010-09-28 22:46:51 +08:00
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struct irq_data;
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2010-09-29 01:09:51 +08:00
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struct msi_desc;
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2010-09-28 22:46:51 +08:00
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extern void mask_msi_irq(struct irq_data *data);
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extern void unmask_msi_irq(struct irq_data *data);
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2010-09-29 01:09:51 +08:00
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extern void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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extern void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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extern void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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2006-10-04 17:16:59 +08:00
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extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
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2010-07-23 21:56:28 +08:00
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extern void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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2006-10-04 17:16:59 +08:00
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extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
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struct msi_desc {
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struct {
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2009-03-17 20:54:06 +08:00
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__u8 is_msix : 1;
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2009-03-17 20:54:10 +08:00
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__u8 multiple: 3; /* log2 number of messages */
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2006-10-04 17:16:59 +08:00
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__u8 maskbit : 1; /* mask-pending bit supported ? */
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__u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
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__u8 pos; /* Location of the msi capability */
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__u16 entry_nr; /* specific enabled entry */
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unsigned default_irq; /* default pre-assigned irq */
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2009-03-17 20:54:09 +08:00
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} msi_attrib;
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2006-10-04 17:16:59 +08:00
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2009-03-17 20:54:09 +08:00
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u32 masked; /* mask bits */
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2007-04-05 15:19:10 +08:00
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unsigned int irq;
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struct list_head list;
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2006-10-04 17:16:59 +08:00
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2009-03-17 20:54:08 +08:00
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union {
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void __iomem *mask_base;
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u8 mask_pos;
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};
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2006-10-04 17:16:59 +08:00
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struct pci_dev *dev;
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2007-03-09 04:04:57 +08:00
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/* Last set MSI message */
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struct msi_msg msg;
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2011-10-07 02:08:18 +08:00
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struct kobject kobj;
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2006-10-04 17:16:59 +08:00
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};
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/*
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* The arch hook for setup up msi irqs
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*/
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2007-01-29 03:56:37 +08:00
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int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
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2006-10-04 17:16:59 +08:00
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void arch_teardown_msi_irq(unsigned int irq);
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MSI: Give archs the option to allocate all MSI/Xs at once.
This patch introduces an optional function, arch_setup_msi_irqs(),
(note the plural) which gives an arch the opportunity to do per-device
setup for MSI/X and then allocate all the requested MSI/Xs at once.
If that's not required by the arch, the default version simply calls
arch_setup_msi_irq() for each MSI irq required.
arch_setup_msi_irqs() is passed a pdev, attached to the pdev is a list
of msi_descs with irq == 0, it is up to the arch to connect these up to
an irq (via set_irq_msi()) or return an error. For convenience the number
of vectors and the type are passed also.
All msi_descs with irq != 0 are considered allocated, and the arch
teardown routine will be called on them when necessary.
The existing semantics of pci_enable_msix() are that if the requested
number of irqs can not be allocated, the maximum number that _could_ be
allocated is returned. To support that, we define that in case of an
error from arch_setup_msi_irqs(), the number of msi_descs with irq != 0
are considered allocated, and are counted toward the "max that could be
allocated".
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-04-18 17:39:21 +08:00
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extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
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2007-04-18 17:39:22 +08:00
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extern void arch_teardown_msi_irqs(struct pci_dev *dev);
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2007-04-05 15:19:08 +08:00
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extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
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2006-10-04 17:16:59 +08:00
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#endif /* LINUX_MSI_H */
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