2022-06-01 19:25:14 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/pci.h>
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#include <drm/drm_drv.h>
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#include "mgag200_drv.h"
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2022-06-01 19:25:15 +08:00
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static int mgag200_g200_init_pci_options(struct pci_dev *pdev)
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{
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struct device *dev = &pdev->dev;
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bool has_sgram;
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u32 option;
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int err;
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err = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option);
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if (err != PCIBIOS_SUCCESSFUL) {
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dev_err(dev, "pci_read_config_dword(PCI_MGA_OPTION) failed: %d\n", err);
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return pcibios_err_to_errno(err);
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}
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has_sgram = !!(option & PCI_MGA_OPTION_HARDPWMSK);
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if (has_sgram)
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option = 0x4049cd21;
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else
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option = 0x40499121;
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return mgag200_init_pci_options(pdev, option, 0x00008000);
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}
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2022-06-01 19:25:14 +08:00
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/*
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* DRM Device
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*/
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static void mgag200_g200_interpret_bios(struct mgag200_g200_device *g200,
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const unsigned char *bios, size_t size)
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{
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static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'};
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static const unsigned int expected_length[6] = {
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0, 64, 64, 64, 128, 128
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};
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struct mga_device *mdev = &g200->base;
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struct drm_device *dev = &mdev->base;
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const unsigned char *pins;
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unsigned int pins_len, version;
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int offset;
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int tmp;
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/* Test for MATROX string. */
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if (size < 45 + sizeof(matrox))
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return;
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if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0)
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return;
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/* Get the PInS offset. */
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if (size < MGA_BIOS_OFFSET + 2)
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return;
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offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET];
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/* Get PInS data structure. */
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if (size < offset + 6)
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return;
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pins = bios + offset;
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if (pins[0] == 0x2e && pins[1] == 0x41) {
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version = pins[5];
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pins_len = pins[2];
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} else {
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version = 1;
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pins_len = pins[0] + (pins[1] << 8);
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}
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if (version < 1 || version > 5) {
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drm_warn(dev, "Unknown BIOS PInS version: %d\n", version);
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return;
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}
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if (pins_len != expected_length[version]) {
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drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n",
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pins_len, expected_length[version]);
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return;
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}
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if (size < offset + pins_len)
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return;
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drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n", version, pins_len);
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/* Extract the clock values */
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switch (version) {
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case 1:
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tmp = pins[24] + (pins[25] << 8);
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if (tmp)
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g200->pclk_max = tmp * 10;
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break;
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case 2:
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if (pins[41] != 0xff)
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g200->pclk_max = (pins[41] + 100) * 1000;
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break;
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case 3:
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if (pins[36] != 0xff)
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g200->pclk_max = (pins[36] + 100) * 1000;
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if (pins[52] & 0x20)
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g200->ref_clk = 14318;
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break;
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case 4:
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if (pins[39] != 0xff)
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g200->pclk_max = pins[39] * 4 * 1000;
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if (pins[92] & 0x01)
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g200->ref_clk = 14318;
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break;
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case 5:
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tmp = pins[4] ? 8000 : 6000;
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if (pins[123] != 0xff)
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g200->pclk_min = pins[123] * tmp;
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if (pins[38] != 0xff)
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g200->pclk_max = pins[38] * tmp;
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if (pins[110] & 0x01)
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g200->ref_clk = 14318;
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break;
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default:
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break;
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}
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}
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static void mgag200_g200_init_refclk(struct mgag200_g200_device *g200)
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{
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struct mga_device *mdev = &g200->base;
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struct drm_device *dev = &mdev->base;
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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unsigned char __iomem *rom;
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unsigned char *bios;
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size_t size;
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g200->pclk_min = 50000;
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g200->pclk_max = 230000;
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g200->ref_clk = 27050;
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rom = pci_map_rom(pdev, &size);
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if (!rom)
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return;
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bios = vmalloc(size);
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if (!bios)
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goto out;
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memcpy_fromio(bios, rom, size);
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if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa)
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mgag200_g200_interpret_bios(g200, bios, size);
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drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n",
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g200->pclk_min, g200->pclk_max, g200->ref_clk);
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vfree(bios);
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out:
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pci_unmap_rom(pdev, rom);
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}
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struct mga_device *mgag200_g200_device_create(struct pci_dev *pdev, const struct drm_driver *drv,
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enum mga_type type, unsigned long flags)
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{
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struct mgag200_g200_device *g200;
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struct mga_device *mdev;
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struct drm_device *dev;
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2022-06-01 19:25:16 +08:00
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resource_size_t vram_available;
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2022-06-01 19:25:14 +08:00
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int ret;
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g200 = devm_drm_dev_alloc(&pdev->dev, drv, struct mgag200_g200_device, base.base);
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if (IS_ERR(g200))
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return ERR_CAST(g200);
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mdev = &g200->base;
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dev = &mdev->base;
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pci_set_drvdata(pdev, dev);
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2022-06-01 19:25:15 +08:00
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ret = mgag200_g200_init_pci_options(pdev);
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if (ret)
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return ERR_PTR(ret);
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2022-06-01 19:25:17 +08:00
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ret = mgag200_device_preinit(mdev);
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2022-06-01 19:25:14 +08:00
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if (ret)
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return ERR_PTR(ret);
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mgag200_g200_init_refclk(g200);
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2022-06-01 19:25:17 +08:00
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ret = mgag200_device_init(mdev, type, flags);
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2022-06-01 19:25:14 +08:00
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if (ret)
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return ERR_PTR(ret);
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2022-06-01 19:25:16 +08:00
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vram_available = mgag200_device_probe_vram(mdev);
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ret = mgag200_modeset_init(mdev, vram_available);
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2022-06-01 19:25:14 +08:00
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if (ret)
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return ERR_PTR(ret);
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return mdev;
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}
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