2019-05-01 23:57:25 +08:00
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/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/* Copyright(c) 2015-17 Intel Corporation. */
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2018-04-26 21:08:53 +08:00
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#include <sound/soc.h>
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2017-12-14 13:49:41 +08:00
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#ifndef __SDW_CADENCE_H
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#define __SDW_CADENCE_H
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2020-03-18 00:33:22 +08:00
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#define SDW_CADENCE_GSYNC_KHZ 4 /* 4 kHz */
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#define SDW_CADENCE_GSYNC_HZ (SDW_CADENCE_GSYNC_KHZ * 1000)
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2022-12-03 00:18:11 +08:00
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/*
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* The Cadence IP supports up to 32 entries in the FIFO, though implementations
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* can configure the IP to have a smaller FIFO.
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*/
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#define CDNS_MCP_IP_MAX_CMD_LEN 32
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2023-05-15 15:10:21 +08:00
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#define SDW_CADENCE_MCP_IP_OFFSET 0x4000
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2018-04-26 21:08:48 +08:00
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/**
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* struct sdw_cdns_pdi: PDI (Physical Data Interface) instance
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*
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* @num: pdi number
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* @intel_alh_id: link identifier
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* @l_ch_num: low channel for PDI
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* @h_ch_num: high channel for PDI
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* @ch_count: total channel count for PDI
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* @dir: data direction
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2021-12-24 10:10:34 +08:00
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* @type: stream type, (only PCM supported)
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2018-04-26 21:08:48 +08:00
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*/
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struct sdw_cdns_pdi {
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int num;
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int intel_alh_id;
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int l_ch_num;
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int h_ch_num;
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int ch_count;
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enum sdw_data_direction dir;
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enum sdw_stream_type type;
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};
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/**
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* struct sdw_cdns_streams: Cadence stream data structure
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*
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* @num_bd: number of bidirectional streams
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* @num_in: number of input streams
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* @num_out: number of output streams
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* @num_ch_bd: number of bidirectional stream channels
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* @num_ch_bd: number of input stream channels
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* @num_ch_bd: number of output stream channels
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* @num_pdi: total number of PDIs
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* @bd: bidirectional streams
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* @in: input streams
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* @out: output streams
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*/
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struct sdw_cdns_streams {
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unsigned int num_bd;
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unsigned int num_in;
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unsigned int num_out;
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unsigned int num_ch_bd;
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unsigned int num_ch_in;
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unsigned int num_ch_out;
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unsigned int num_pdi;
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struct sdw_cdns_pdi *bd;
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struct sdw_cdns_pdi *in;
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struct sdw_cdns_pdi *out;
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};
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/**
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* struct sdw_cdns_stream_config: stream configuration
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*
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* @pcm_bd: number of bidirectional PCM streams supported
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* @pcm_in: number of input PCM streams supported
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* @pcm_out: number of output PCM streams supported
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*/
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struct sdw_cdns_stream_config {
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unsigned int pcm_bd;
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unsigned int pcm_in;
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unsigned int pcm_out;
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};
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2018-04-26 21:08:53 +08:00
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/**
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2022-11-01 10:35:20 +08:00
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* struct sdw_cdns_dai_runtime: Cadence DAI runtime data
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2018-04-26 21:08:53 +08:00
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*
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* @name: SoundWire stream name
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2019-09-17 03:23:46 +08:00
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* @stream: stream runtime
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* @pdi: PDI used for this dai
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2018-04-26 21:08:53 +08:00
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* @bus: Bus handle
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* @stream_type: Stream type
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* @link_id: Master link id
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soundwire: intel: reinitialize IP+DSP in .prepare(), but only when resuming
The .prepare() callback is invoked for normal streaming, underflows or
during the system resume transition. In the latter case, the context
for the ALH PDIs is lost, and the DSP is not initialized properly
either, but the bus parameters don't need to be recomputed.
Conversely, when doing a regular .prepare() during an underflow, the
ALH/SHIM registers shall not be changed as the hardware cannot be
reprogrammed after the DMA started (hardware spec requirement).
This patch adds storage of PDI and hw_params in the DAI dma context,
and the difference between the types of .prepare() usages is handled
via a simple boolean, updated when suspending, and tested for in the
.prepare() case.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200817152923.3259-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-17 23:29:16 +08:00
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* @suspended: status set when suspended, to be used in .prepare
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2021-12-24 10:10:30 +08:00
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* @paused: status set in .trigger, to be used in suspend
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2022-11-01 10:35:21 +08:00
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* @direction: stream direction
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2018-04-26 21:08:53 +08:00
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*/
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2022-11-01 10:35:20 +08:00
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struct sdw_cdns_dai_runtime {
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2018-04-26 21:08:53 +08:00
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char *name;
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struct sdw_stream_runtime *stream;
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2019-09-17 03:23:46 +08:00
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struct sdw_cdns_pdi *pdi;
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2018-04-26 21:08:53 +08:00
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struct sdw_bus *bus;
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enum sdw_stream_type stream_type;
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int link_id;
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soundwire: intel: reinitialize IP+DSP in .prepare(), but only when resuming
The .prepare() callback is invoked for normal streaming, underflows or
during the system resume transition. In the latter case, the context
for the ALH PDIs is lost, and the DSP is not initialized properly
either, but the bus parameters don't need to be recomputed.
Conversely, when doing a regular .prepare() during an underflow, the
ALH/SHIM registers shall not be changed as the hardware cannot be
reprogrammed after the DMA started (hardware spec requirement).
This patch adds storage of PDI and hw_params in the DAI dma context,
and the difference between the types of .prepare() usages is handled
via a simple boolean, updated when suspending, and tested for in the
.prepare() case.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200817152923.3259-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-17 23:29:16 +08:00
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bool suspended;
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2021-12-24 10:10:30 +08:00
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bool paused;
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2022-11-01 10:35:21 +08:00
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int direction;
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2018-04-26 21:08:53 +08:00
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};
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2017-12-14 13:49:41 +08:00
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/**
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* struct sdw_cdns - Cadence driver context
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* @dev: Linux device
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* @bus: Bus handle
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* @instance: instance number
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2023-03-14 09:54:06 +08:00
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* @ip_offset: version-dependent offset to access IP_MCP registers and fields
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2017-12-14 13:49:42 +08:00
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* @response_buf: SoundWire response buffer
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* @tx_complete: Tx completion
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2018-04-26 21:08:48 +08:00
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* @ports: Data ports
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* @num_ports: Total number of data ports
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* @pcm: PCM streams
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2017-12-14 13:49:41 +08:00
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* @registers: Cadence registers
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* @link_up: Link status
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2017-12-14 13:49:42 +08:00
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* @msg_count: Messages sent on bus
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2022-11-01 10:35:21 +08:00
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* @dai_runtime_array: runtime context for each allocated DAI.
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2017-12-14 13:49:41 +08:00
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*/
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struct sdw_cdns {
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struct device *dev;
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struct sdw_bus bus;
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unsigned int instance;
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2023-03-14 09:54:06 +08:00
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u32 ip_offset;
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2022-12-03 00:18:11 +08:00
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/*
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* The datasheet says the RX FIFO AVAIL can be 2 entries more
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* than the FIFO capacity, so allow for this.
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*/
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u32 response_buf[CDNS_MCP_IP_MAX_CMD_LEN + 2];
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2017-12-14 13:49:42 +08:00
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struct completion tx_complete;
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2018-04-26 21:08:48 +08:00
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struct sdw_cdns_port *ports;
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int num_ports;
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struct sdw_cdns_streams pcm;
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2021-07-14 11:22:08 +08:00
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int pdi_loopback_source;
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int pdi_loopback_target;
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2017-12-14 13:49:41 +08:00
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void __iomem *registers;
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bool link_up;
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2017-12-14 13:49:42 +08:00
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unsigned int msg_count;
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2020-08-18 06:23:40 +08:00
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bool interrupt_enabled;
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2020-07-16 23:09:45 +08:00
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struct work_struct work;
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struct list_head list;
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2022-11-01 10:35:21 +08:00
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struct sdw_cdns_dai_runtime **dai_runtime_array;
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2017-12-14 13:49:41 +08:00
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};
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#define bus_to_cdns(_bus) container_of(_bus, struct sdw_cdns, bus)
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/* Exported symbols */
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2017-12-14 13:49:42 +08:00
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int sdw_cdns_probe(struct sdw_cdns *cdns);
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2017-12-14 13:49:41 +08:00
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irqreturn_t sdw_cdns_irq(int irq, void *dev_id);
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irqreturn_t sdw_cdns_thread(int irq, void *dev_id);
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2020-03-18 00:33:14 +08:00
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int sdw_cdns_init(struct sdw_cdns *cdns);
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2018-04-26 21:08:48 +08:00
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int sdw_cdns_pdi_init(struct sdw_cdns *cdns,
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2019-05-01 23:57:26 +08:00
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struct sdw_cdns_stream_config config);
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2019-10-23 07:54:44 +08:00
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int sdw_cdns_exit_reset(struct sdw_cdns *cdns);
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2019-10-23 07:54:47 +08:00
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int sdw_cdns_enable_interrupt(struct sdw_cdns *cdns, bool state);
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2017-12-14 13:49:42 +08:00
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2020-03-18 00:33:15 +08:00
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bool sdw_cdns_is_clock_stop(struct sdw_cdns *cdns);
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2020-03-18 00:33:17 +08:00
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int sdw_cdns_clock_stop(struct sdw_cdns *cdns, bool block_wake);
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int sdw_cdns_clock_restart(struct sdw_cdns *cdns, bool bus_reset);
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2020-03-18 00:33:15 +08:00
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2019-08-22 02:58:19 +08:00
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#ifdef CONFIG_DEBUG_FS
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void sdw_cdns_debugfs_init(struct sdw_cdns *cdns, struct dentry *root);
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#endif
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2019-09-17 03:23:46 +08:00
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struct sdw_cdns_pdi *sdw_cdns_alloc_pdi(struct sdw_cdns *cdns,
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struct sdw_cdns_streams *stream,
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2019-09-17 03:23:48 +08:00
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u32 ch, u32 dir, int dai_id);
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2019-09-17 03:23:46 +08:00
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void sdw_cdns_config_stream(struct sdw_cdns *cdns,
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2019-05-01 23:57:26 +08:00
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u32 ch, u32 dir, struct sdw_cdns_pdi *pdi);
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2018-04-26 21:08:53 +08:00
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2018-04-26 21:08:43 +08:00
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enum sdw_command_response
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cdns_xfer_msg(struct sdw_bus *bus, struct sdw_msg *msg);
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2017-12-14 13:49:41 +08:00
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2018-04-26 21:08:43 +08:00
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enum sdw_command_response
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2023-01-19 15:32:11 +08:00
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cdns_xfer_msg_defer(struct sdw_bus *bus);
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2018-04-26 21:08:43 +08:00
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2022-07-14 09:10:41 +08:00
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u32 cdns_read_ping_status(struct sdw_bus *bus);
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2018-04-26 21:08:48 +08:00
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int cdns_bus_conf(struct sdw_bus *bus, struct sdw_bus_params *params);
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2018-04-26 21:08:53 +08:00
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int cdns_set_sdw_stream(struct snd_soc_dai *dai,
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2021-12-24 10:10:34 +08:00
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void *stream, int direction);
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2021-07-14 13:13:49 +08:00
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void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string,
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bool initial_delay, int reset_iterations);
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2023-05-18 10:41:18 +08:00
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void sdw_cdns_config_update(struct sdw_cdns *cdns);
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int sdw_cdns_config_update_set_wait(struct sdw_cdns *cdns);
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2017-12-14 13:49:41 +08:00
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#endif /* __SDW_CADENCE_H */
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