2019-06-04 16:11:33 +08:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2012-08-15 20:59:49 +08:00
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/*
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* Copyright (C) 2012 Russell King
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*/
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#ifndef ARMADA_CRTC_H
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#define ARMADA_CRTC_H
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2019-01-18 05:03:34 +08:00
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#include <drm/drm_crtc.h>
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2012-08-15 20:59:49 +08:00
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struct armada_gem_object;
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struct armada_regs {
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uint32_t offset;
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uint32_t mask;
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uint32_t val;
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};
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#define armada_reg_queue_mod(_r, _i, _v, _m, _o) \
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do { \
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struct armada_regs *__reg = _r; \
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__reg[_i].offset = _o; \
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__reg[_i].mask = ~(_m); \
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__reg[_i].val = _v; \
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_i++; \
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} while (0)
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#define armada_reg_queue_set(_r, _i, _v, _o) \
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armada_reg_queue_mod(_r, _i, _v, ~0, _o)
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#define armada_reg_queue_end(_r, _i) \
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armada_reg_queue_mod(_r, _i, 0, 0, ~0)
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2015-08-06 23:37:18 +08:00
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struct armada_crtc;
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2014-04-22 22:24:03 +08:00
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struct armada_variant;
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2012-08-15 20:59:49 +08:00
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struct armada_crtc {
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struct drm_crtc crtc;
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2014-04-22 22:24:03 +08:00
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const struct armada_variant *variant;
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2018-07-14 18:15:35 +08:00
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void *variant_data;
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2012-08-15 20:59:49 +08:00
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unsigned num;
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void __iomem *base;
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struct clk *clk;
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struct {
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uint32_t spu_v_h_total;
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uint32_t spu_v_porch;
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uint32_t spu_adv_reg;
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} v[2];
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bool interlaced;
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2013-05-19 17:55:17 +08:00
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bool cursor_update;
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2012-08-15 20:59:49 +08:00
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2013-05-19 17:55:17 +08:00
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struct armada_gem_object *cursor_obj;
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int cursor_x;
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int cursor_y;
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uint32_t cursor_hw_pos;
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uint32_t cursor_hw_sz;
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uint32_t cursor_w;
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uint32_t cursor_h;
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2012-08-15 20:59:49 +08:00
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uint32_t cfg_dumb_ctrl;
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uint32_t spu_iopad_ctrl;
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spinlock_t irq_lock;
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uint32_t irq_ena;
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2018-07-30 18:52:34 +08:00
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2018-07-30 18:53:06 +08:00
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bool update_pending;
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2018-07-30 18:52:34 +08:00
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struct drm_pending_vblank_event *event;
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2018-07-30 18:52:34 +08:00
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struct armada_regs atomic_regs[32];
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struct armada_regs *regs;
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unsigned int regs_idx;
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2012-08-15 20:59:49 +08:00
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};
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#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
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void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
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2018-07-14 18:15:35 +08:00
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struct armada_clocking_params {
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unsigned long permillage_min;
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unsigned long permillage_max;
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u32 settable;
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u32 div_max;
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};
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struct armada_clk_result {
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unsigned long desired_clk_hz;
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struct clk *clk;
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u32 div;
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};
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int armada_crtc_select_clock(struct armada_crtc *dcrtc,
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struct armada_clk_result *res,
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const struct armada_clocking_params *params,
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struct clk *clks[], size_t num_clks,
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unsigned long desired_khz);
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2014-04-22 18:10:15 +08:00
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extern struct platform_driver armada_lcd_platform_driver;
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2012-08-15 20:59:49 +08:00
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#endif
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