2012-06-14 01:01:28 +08:00
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/*
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* Device Tree file for Marvell Armada XP evaluation board
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* (DB-78460-BP)
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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2012-09-13 23:41:50 +08:00
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/include/ "armada-xp-mv78460.dtsi"
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2012-06-14 01:01:28 +08:00
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/ {
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model = "Marvell Armada XP Evaluation Board";
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2012-09-13 23:41:50 +08:00
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compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
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2012-06-14 01:01:28 +08:00
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x80000000>; /* 2 GB */
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};
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soc {
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serial@d0012000 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012100 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012200 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012300 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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2012-09-04 21:06:44 +08:00
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2012-10-26 20:30:49 +08:00
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sata@d00a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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2012-11-21 06:35:16 +08:00
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2012-09-04 21:06:44 +08:00
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mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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reg = <25>;
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};
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phy3: ethernet-phy@3 {
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reg = <27>;
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};
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};
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ethernet@d0070000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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ethernet@d0074000 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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ethernet@d0030000 {
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status = "okay";
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phy = <&phy2>;
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phy-mode = "sgmii";
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};
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ethernet@d0034000 {
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status = "okay";
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phy = <&phy3>;
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phy-mode = "sgmii";
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};
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2012-12-21 22:49:07 +08:00
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mvsdio@d00d4000 {
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pinctrl-0 = <&sdio_pins>;
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pinctrl-names = "default";
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status = "okay";
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/* No CD or WP GPIOs */
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};
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2012-06-14 01:01:28 +08:00
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};
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};
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