2015-08-02 11:18:04 +08:00
|
|
|
/*
|
|
|
|
* Copyright 2015 Advanced Micro Devices, Inc.
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
|
|
* to deal in the Software without restriction, including without limitation
|
|
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
|
|
*
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
#include <linux/kthread.h>
|
|
|
|
#include <linux/wait.h>
|
|
|
|
#include <linux/sched.h>
|
|
|
|
#include <drm/drmP.h>
|
|
|
|
#include "gpu_scheduler.h"
|
|
|
|
|
2016-05-18 15:43:07 +08:00
|
|
|
struct amd_sched_fence *amd_sched_fence_create(struct amd_sched_entity *entity,
|
|
|
|
void *owner)
|
2015-08-02 11:18:04 +08:00
|
|
|
{
|
|
|
|
struct amd_sched_fence *fence = NULL;
|
2015-08-19 21:00:55 +08:00
|
|
|
unsigned seq;
|
|
|
|
|
2015-11-05 11:41:50 +08:00
|
|
|
fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL);
|
2015-08-02 11:18:04 +08:00
|
|
|
if (fence == NULL)
|
|
|
|
return NULL;
|
2015-11-05 19:57:10 +08:00
|
|
|
|
2015-08-24 12:47:36 +08:00
|
|
|
fence->owner = owner;
|
2016-05-18 15:43:07 +08:00
|
|
|
fence->sched = entity->sched;
|
2015-08-02 11:18:04 +08:00
|
|
|
spin_lock_init(&fence->lock);
|
2015-08-19 21:00:55 +08:00
|
|
|
|
2016-05-18 15:43:07 +08:00
|
|
|
seq = atomic_inc_return(&entity->fence_seq);
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_init(&fence->scheduled, &amd_sched_fence_ops_scheduled,
|
|
|
|
&fence->lock, entity->fence_context, seq);
|
|
|
|
dma_fence_init(&fence->finished, &amd_sched_fence_ops_finished,
|
|
|
|
&fence->lock, entity->fence_context + 1, seq);
|
2015-08-19 21:00:55 +08:00
|
|
|
|
2015-08-02 11:18:04 +08:00
|
|
|
return fence;
|
|
|
|
}
|
|
|
|
|
2016-05-20 18:53:52 +08:00
|
|
|
void amd_sched_fence_scheduled(struct amd_sched_fence *fence)
|
2015-08-02 11:18:04 +08:00
|
|
|
{
|
2016-10-25 20:00:45 +08:00
|
|
|
int ret = dma_fence_signal(&fence->scheduled);
|
2016-05-20 18:53:52 +08:00
|
|
|
|
2015-08-10 20:20:55 +08:00
|
|
|
if (!ret)
|
2016-10-25 20:00:45 +08:00
|
|
|
DMA_FENCE_TRACE(&fence->scheduled,
|
|
|
|
"signaled from irq context\n");
|
2015-08-10 20:20:55 +08:00
|
|
|
else
|
2016-10-25 20:00:45 +08:00
|
|
|
DMA_FENCE_TRACE(&fence->scheduled,
|
|
|
|
"was already signaled\n");
|
2015-08-02 11:18:04 +08:00
|
|
|
}
|
|
|
|
|
2016-05-20 18:53:52 +08:00
|
|
|
void amd_sched_fence_finished(struct amd_sched_fence *fence)
|
2015-11-05 19:57:10 +08:00
|
|
|
{
|
2016-10-25 20:00:45 +08:00
|
|
|
int ret = dma_fence_signal(&fence->finished);
|
2015-11-05 19:57:10 +08:00
|
|
|
|
2016-05-20 18:53:52 +08:00
|
|
|
if (!ret)
|
2016-10-25 20:00:45 +08:00
|
|
|
DMA_FENCE_TRACE(&fence->finished,
|
|
|
|
"signaled from irq context\n");
|
2016-05-20 18:53:52 +08:00
|
|
|
else
|
2016-10-25 20:00:45 +08:00
|
|
|
DMA_FENCE_TRACE(&fence->finished,
|
|
|
|
"was already signaled\n");
|
2015-11-05 19:57:10 +08:00
|
|
|
}
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
static const char *amd_sched_fence_get_driver_name(struct dma_fence *fence)
|
2015-08-02 11:18:04 +08:00
|
|
|
{
|
|
|
|
return "amd_sched";
|
|
|
|
}
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
static const char *amd_sched_fence_get_timeline_name(struct dma_fence *f)
|
2015-08-02 11:18:04 +08:00
|
|
|
{
|
|
|
|
struct amd_sched_fence *fence = to_amd_sched_fence(f);
|
2015-09-08 00:16:49 +08:00
|
|
|
return (const char *)fence->sched->name;
|
2015-08-02 11:18:04 +08:00
|
|
|
}
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
static bool amd_sched_fence_enable_signaling(struct dma_fence *f)
|
2015-08-02 11:18:04 +08:00
|
|
|
{
|
2015-08-10 20:20:55 +08:00
|
|
|
return true;
|
2015-08-02 11:18:04 +08:00
|
|
|
}
|
|
|
|
|
2016-03-15 20:58:14 +08:00
|
|
|
/**
|
|
|
|
* amd_sched_fence_free - free up the fence memory
|
|
|
|
*
|
|
|
|
* @rcu: RCU callback head
|
|
|
|
*
|
|
|
|
* Free up the fence memory after the RCU grace period.
|
|
|
|
*/
|
|
|
|
static void amd_sched_fence_free(struct rcu_head *rcu)
|
2015-11-05 11:41:50 +08:00
|
|
|
{
|
2016-10-25 20:00:45 +08:00
|
|
|
struct dma_fence *f = container_of(rcu, struct dma_fence, rcu);
|
2015-11-05 11:41:50 +08:00
|
|
|
struct amd_sched_fence *fence = to_amd_sched_fence(f);
|
2016-05-20 18:53:52 +08:00
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_put(fence->parent);
|
2015-11-05 11:41:50 +08:00
|
|
|
kmem_cache_free(sched_fence_slab, fence);
|
|
|
|
}
|
|
|
|
|
2016-03-15 20:58:14 +08:00
|
|
|
/**
|
|
|
|
* amd_sched_fence_release - callback that fence can be freed
|
|
|
|
*
|
|
|
|
* @fence: fence
|
|
|
|
*
|
|
|
|
* This function is called when the reference count becomes zero.
|
|
|
|
* It just RCU schedules freeing up the fence.
|
|
|
|
*/
|
2016-10-25 20:00:45 +08:00
|
|
|
static void amd_sched_fence_release_scheduled(struct dma_fence *f)
|
2016-05-20 18:53:52 +08:00
|
|
|
{
|
|
|
|
struct amd_sched_fence *fence = to_amd_sched_fence(f);
|
|
|
|
|
|
|
|
call_rcu(&fence->finished.rcu, amd_sched_fence_free);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* amd_sched_fence_release_scheduled - drop extra reference
|
|
|
|
*
|
|
|
|
* @f: fence
|
|
|
|
*
|
|
|
|
* Drop the extra reference from the scheduled fence to the base fence.
|
|
|
|
*/
|
2016-10-25 20:00:45 +08:00
|
|
|
static void amd_sched_fence_release_finished(struct dma_fence *f)
|
2016-03-15 20:58:14 +08:00
|
|
|
{
|
2016-05-20 18:53:52 +08:00
|
|
|
struct amd_sched_fence *fence = to_amd_sched_fence(f);
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_put(&fence->scheduled);
|
2016-03-15 20:58:14 +08:00
|
|
|
}
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
const struct dma_fence_ops amd_sched_fence_ops_scheduled = {
|
2016-05-20 18:53:52 +08:00
|
|
|
.get_driver_name = amd_sched_fence_get_driver_name,
|
|
|
|
.get_timeline_name = amd_sched_fence_get_timeline_name,
|
|
|
|
.enable_signaling = amd_sched_fence_enable_signaling,
|
|
|
|
.signaled = NULL,
|
2016-10-25 20:00:45 +08:00
|
|
|
.wait = dma_fence_default_wait,
|
2016-05-20 18:53:52 +08:00
|
|
|
.release = amd_sched_fence_release_scheduled,
|
|
|
|
};
|
|
|
|
|
2016-10-25 20:00:45 +08:00
|
|
|
const struct dma_fence_ops amd_sched_fence_ops_finished = {
|
2015-08-02 11:18:04 +08:00
|
|
|
.get_driver_name = amd_sched_fence_get_driver_name,
|
|
|
|
.get_timeline_name = amd_sched_fence_get_timeline_name,
|
|
|
|
.enable_signaling = amd_sched_fence_enable_signaling,
|
2015-08-10 20:20:55 +08:00
|
|
|
.signaled = NULL,
|
2016-10-25 20:00:45 +08:00
|
|
|
.wait = dma_fence_default_wait,
|
2016-05-20 18:53:52 +08:00
|
|
|
.release = amd_sched_fence_release_finished,
|
2015-08-02 11:18:04 +08:00
|
|
|
};
|