2009-09-02 22:37:17 +08:00
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/*
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* apb_timer.c: Driver for Langwell APB timers
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*
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* (C) Copyright 2009 Intel Corporation
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* Author: Jacob Pan (jacob.jun.pan@intel.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*
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* Note:
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* Langwell is the south complex of Intel Moorestown MID platform. There are
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* eight external timers in total that can be used by the operating system.
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* The timer information, such as frequency and addresses, is provided to the
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* OS via SFI tables.
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* Timer interrupts are routed via FW/HW emulated IOAPIC independently via
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* individual redirection table entries (RTE).
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* Unlike HPET, there is no master counter, therefore one of the timers are
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* used as clocksource. The overall allocation looks like:
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* - timer 0 - NR_CPUs for per cpu timer
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* - one timer for clocksource
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* - one timer for watchdog driver.
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* It is also worth notice that APB timer does not support true one-shot mode,
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* free-running mode will be used here to emulate one-shot mode.
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* APB timer can also be used as broadcast timer along with per cpu local APIC
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* timer, but by default APB timer has higher rating than local APIC timers.
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*/
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#include <linux/delay.h>
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2011-06-06 19:43:07 +08:00
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#include <linux/dw_apb_timer.h>
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2009-09-02 22:37:17 +08:00
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#include <linux/errno.h>
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#include <linux/init.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
|
2009-09-02 22:37:17 +08:00
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#include <linux/pm.h>
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#include <linux/sfi.h>
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#include <linux/interrupt.h>
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#include <linux/cpu.h>
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#include <linux/irq.h>
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|
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#include <asm/fixmap.h>
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#include <asm/apb_timer.h>
|
2013-10-18 06:35:27 +08:00
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|
|
#include <asm/intel-mid.h>
|
2011-06-02 02:05:06 +08:00
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#include <asm/time.h>
|
2009-09-02 22:37:17 +08:00
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|
2010-05-20 03:01:25 +08:00
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#define APBT_CLOCKEVENT_RATING 110
|
2010-03-04 05:38:48 +08:00
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#define APBT_CLOCKSOURCE_RATING 250
|
2009-09-02 22:37:17 +08:00
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#define APBT_CLOCKEVENT0_NUM (0)
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#define APBT_CLOCKSOURCE_NUM (2)
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|
2011-06-06 19:43:07 +08:00
|
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|
static phys_addr_t apbt_address;
|
2009-09-02 22:37:17 +08:00
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static int apb_timer_block_enabled;
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static void __iomem *apbt_virt_address;
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/*
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* Common DW APB timer info
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*/
|
2011-06-06 19:43:07 +08:00
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|
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static unsigned long apbt_freq;
|
2009-09-02 22:37:17 +08:00
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struct apbt_dev {
|
2011-06-06 19:43:07 +08:00
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struct dw_apb_clock_event_device *timer;
|
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|
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unsigned int num;
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|
|
int cpu;
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|
|
unsigned int irq;
|
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|
|
char name[10];
|
2009-09-02 22:37:17 +08:00
|
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};
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|
2011-06-06 19:43:07 +08:00
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static struct dw_apb_clocksource *clocksource_apbt;
|
2010-03-03 13:01:34 +08:00
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|
2011-06-06 19:43:07 +08:00
|
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|
static inline void __iomem *adev_virt_addr(struct apbt_dev *adev)
|
2009-09-02 22:37:17 +08:00
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{
|
2011-06-06 19:43:07 +08:00
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return apbt_virt_address + adev->num * APBTMRS_REG_SIZE;
|
2009-09-02 22:37:17 +08:00
|
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}
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|
2011-06-06 19:43:07 +08:00
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|
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static DEFINE_PER_CPU(struct apbt_dev, cpu_apbt_dev);
|
2009-09-02 22:37:17 +08:00
|
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|
|
2011-06-06 19:43:07 +08:00
|
|
|
#ifdef CONFIG_SMP
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|
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static unsigned int apbt_num_timers_used;
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|
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#endif
|
2009-09-02 22:37:17 +08:00
|
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|
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static inline void apbt_set_mapping(void)
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|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
struct sfi_timer_table_entry *mtmr;
|
2011-06-06 19:43:07 +08:00
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|
int phy_cs_timer_id = 0;
|
2010-03-04 05:38:48 +08:00
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if (apbt_virt_address) {
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pr_debug("APBT base already mapped\n");
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return;
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}
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mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
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if (mtmr == NULL) {
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printk(KERN_ERR "Failed to get MTMR %d from SFI\n",
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APBT_CLOCKEVENT0_NUM);
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return;
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}
|
2011-06-06 19:43:07 +08:00
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|
apbt_address = (phys_addr_t)mtmr->phys_addr;
|
2010-03-04 05:38:48 +08:00
|
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|
if (!apbt_address) {
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printk(KERN_WARNING "No timer base from SFI, use default\n");
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apbt_address = APBT_DEFAULT_BASE;
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}
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apbt_virt_address = ioremap_nocache(apbt_address, APBT_MMAP_SIZE);
|
2011-06-06 19:43:07 +08:00
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|
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if (!apbt_virt_address) {
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|
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pr_debug("Failed mapping APBT phy address at %lu\n",\
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|
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(unsigned long)apbt_address);
|
2010-03-04 05:38:48 +08:00
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|
goto panic_noapbt;
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}
|
2011-06-06 19:43:07 +08:00
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apbt_freq = mtmr->freq_hz;
|
2010-03-04 05:38:48 +08:00
|
|
|
sfi_free_mtmr(mtmr);
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/* Now figure out the physical timer id for clocksource device */
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mtmr = sfi_get_mtmr(APBT_CLOCKSOURCE_NUM);
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if (mtmr == NULL)
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|
goto panic_noapbt;
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/* Now figure out the physical timer id */
|
2011-06-06 19:43:07 +08:00
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|
|
pr_debug("Use timer %d for clocksource\n",
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|
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(int)(mtmr->phys_addr & 0xff) / APBTMRS_REG_SIZE);
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phy_cs_timer_id = (unsigned int)(mtmr->phys_addr & 0xff) /
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|
|
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APBTMRS_REG_SIZE;
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|
|
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|
|
clocksource_apbt = dw_apb_clocksource_init(APBT_CLOCKSOURCE_RATING,
|
|
|
|
"apbt0", apbt_virt_address + phy_cs_timer_id *
|
|
|
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APBTMRS_REG_SIZE, apbt_freq);
|
2010-03-04 05:38:48 +08:00
|
|
|
return;
|
2009-09-02 22:37:17 +08:00
|
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|
|
|
|
|
panic_noapbt:
|
2010-03-04 05:38:48 +08:00
|
|
|
panic("Failed to setup APB system timer\n");
|
2009-09-02 22:37:17 +08:00
|
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|
|
|
}
|
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|
static inline void apbt_clear_mapping(void)
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|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
iounmap(apbt_virt_address);
|
|
|
|
apbt_virt_address = NULL;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int __init apbt_clockevent_register(void)
|
|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
struct sfi_timer_table_entry *mtmr;
|
x86: Replace __get_cpu_var uses
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
#define __get_cpu_var(var) (*this_cpu_ptr(&(var)))
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2014-08-18 01:30:40 +08:00
|
|
|
struct apbt_dev *adev = this_cpu_ptr(&cpu_apbt_dev);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
|
|
|
|
if (mtmr == NULL) {
|
|
|
|
printk(KERN_ERR "Failed to get MTMR %d from SFI\n",
|
|
|
|
APBT_CLOCKEVENT0_NUM);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
adev->num = smp_processor_id();
|
2011-06-06 19:43:07 +08:00
|
|
|
adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0",
|
2013-10-18 06:35:29 +08:00
|
|
|
intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT ?
|
2011-06-06 19:43:07 +08:00
|
|
|
APBT_CLOCKEVENT_RATING - 100 : APBT_CLOCKEVENT_RATING,
|
|
|
|
adev_virt_addr(adev), 0, apbt_freq);
|
|
|
|
/* Firmware does EOI handling for us. */
|
|
|
|
adev->timer->eoi = NULL;
|
2010-03-04 05:38:48 +08:00
|
|
|
|
2013-10-18 06:35:29 +08:00
|
|
|
if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT) {
|
2011-06-06 19:43:07 +08:00
|
|
|
global_clock_event = &adev->timer->ced;
|
2010-03-04 05:38:48 +08:00
|
|
|
printk(KERN_DEBUG "%s clockevent registered as global\n",
|
|
|
|
global_clock_event->name);
|
|
|
|
}
|
|
|
|
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clockevent_register(adev->timer);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
sfi_free_mtmr(mtmr);
|
|
|
|
return 0;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_SMP
|
2010-09-28 17:11:10 +08:00
|
|
|
|
|
|
|
static void apbt_setup_irq(struct apbt_dev *adev)
|
|
|
|
{
|
2011-01-14 08:06:44 +08:00
|
|
|
irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT);
|
|
|
|
irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
|
2010-09-28 17:11:10 +08:00
|
|
|
}
|
|
|
|
|
2009-09-02 22:37:17 +08:00
|
|
|
/* Should be called with per cpu */
|
|
|
|
void apbt_setup_secondary_clock(void)
|
|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
struct apbt_dev *adev;
|
|
|
|
int cpu;
|
|
|
|
|
|
|
|
/* Don't register boot CPU clockevent */
|
|
|
|
cpu = smp_processor_id();
|
2010-07-22 01:03:58 +08:00
|
|
|
if (!cpu)
|
2010-03-04 05:38:48 +08:00
|
|
|
return;
|
|
|
|
|
x86: Replace __get_cpu_var uses
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
#define __get_cpu_var(var) (*this_cpu_ptr(&(var)))
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2014-08-18 01:30:40 +08:00
|
|
|
adev = this_cpu_ptr(&cpu_apbt_dev);
|
2011-06-06 19:43:07 +08:00
|
|
|
if (!adev->timer) {
|
|
|
|
adev->timer = dw_apb_clockevent_init(cpu, adev->name,
|
|
|
|
APBT_CLOCKEVENT_RATING, adev_virt_addr(adev),
|
|
|
|
adev->irq, apbt_freq);
|
|
|
|
adev->timer->eoi = NULL;
|
|
|
|
} else {
|
|
|
|
dw_apb_clockevent_resume(adev->timer);
|
|
|
|
}
|
2010-03-04 05:38:48 +08:00
|
|
|
|
2011-06-06 19:43:07 +08:00
|
|
|
printk(KERN_INFO "Registering CPU %d clockevent device %s, cpu %08x\n",
|
|
|
|
cpu, adev->name, adev->cpu);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
apbt_setup_irq(adev);
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clockevent_register(adev->timer);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
return;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* this notify handler process CPU hotplug events. in case of S0i3, nonboot
|
|
|
|
* cpus are disabled/enabled frequently, for performance reasons, we keep the
|
|
|
|
* per cpu timer irq registered so that we do need to do free_irq/request_irq.
|
|
|
|
*
|
|
|
|
* TODO: it might be more reliable to directly disable percpu clockevent device
|
|
|
|
* without the notifier chain. currently, cpu 0 may get interrupts from other
|
|
|
|
* cpu timers during the offline process due to the ordering of notification.
|
|
|
|
* the extra interrupt is harmless.
|
|
|
|
*/
|
|
|
|
static int apbt_cpuhp_notify(struct notifier_block *n,
|
2010-03-04 05:38:48 +08:00
|
|
|
unsigned long action, void *hcpu)
|
2009-09-02 22:37:17 +08:00
|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
unsigned long cpu = (unsigned long)hcpu;
|
|
|
|
struct apbt_dev *adev = &per_cpu(cpu_apbt_dev, cpu);
|
|
|
|
|
|
|
|
switch (action & 0xf) {
|
|
|
|
case CPU_DEAD:
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clockevent_pause(adev->timer);
|
2010-09-28 17:11:10 +08:00
|
|
|
if (system_state == SYSTEM_RUNNING) {
|
2010-03-04 05:38:48 +08:00
|
|
|
pr_debug("skipping APBT CPU %lu offline\n", cpu);
|
2013-01-15 05:39:18 +08:00
|
|
|
} else {
|
2010-03-04 05:38:48 +08:00
|
|
|
pr_debug("APBT clockevent for cpu %lu offline\n", cpu);
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clockevent_stop(adev->timer);
|
2010-03-04 05:38:48 +08:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
2010-09-12 13:10:54 +08:00
|
|
|
pr_debug("APBT notified %lu, no action\n", action);
|
2010-03-04 05:38:48 +08:00
|
|
|
}
|
|
|
|
return NOTIFY_OK;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static __init int apbt_late_init(void)
|
|
|
|
{
|
2013-10-18 06:35:29 +08:00
|
|
|
if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT ||
|
2010-05-20 03:01:25 +08:00
|
|
|
!apb_timer_block_enabled)
|
2010-03-04 05:38:48 +08:00
|
|
|
return 0;
|
|
|
|
/* This notifier should be called after workqueue is ready */
|
|
|
|
hotcpu_notifier(apbt_cpuhp_notify, -20);
|
|
|
|
return 0;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
fs_initcall(apbt_late_init);
|
|
|
|
#else
|
|
|
|
|
|
|
|
void apbt_setup_secondary_clock(void) {}
|
|
|
|
|
|
|
|
#endif /* CONFIG_SMP */
|
|
|
|
|
|
|
|
static int apbt_clocksource_register(void)
|
|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
u64 start, now;
|
|
|
|
cycle_t t1;
|
|
|
|
|
|
|
|
/* Start the counter, use timer 2 as source, timer 0/1 for event */
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clocksource_start(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
/* Verify whether apbt counter works */
|
2011-06-06 19:43:07 +08:00
|
|
|
t1 = dw_apb_clocksource_read(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
rdtscll(start);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We don't know the TSC frequency yet, but waiting for
|
|
|
|
* 200000 TSC cycles is safe:
|
|
|
|
* 4 GHz == 50us
|
|
|
|
* 1 GHz == 200us
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
rep_nop();
|
|
|
|
rdtscll(now);
|
|
|
|
} while ((now - start) < 200000UL);
|
|
|
|
|
|
|
|
/* APBT is the only always on clocksource, it has to work! */
|
2011-06-06 19:43:07 +08:00
|
|
|
if (t1 == dw_apb_clocksource_read(clocksource_apbt))
|
2010-03-04 05:38:48 +08:00
|
|
|
panic("APBT counter not counting. APBT disabled\n");
|
|
|
|
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clocksource_register(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
return 0;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Early setup the APBT timer, only use timer 0 for booting then switch to
|
|
|
|
* per CPU timer if possible.
|
|
|
|
* returns 1 if per cpu apbt is setup
|
|
|
|
* returns 0 if no per cpu apbt is chosen
|
|
|
|
* panic if set up failed, this is the only platform timer on Moorestown.
|
|
|
|
*/
|
|
|
|
void __init apbt_time_init(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_SMP
|
2010-03-04 05:38:48 +08:00
|
|
|
int i;
|
|
|
|
struct sfi_timer_table_entry *p_mtmr;
|
|
|
|
struct apbt_dev *adev;
|
2009-09-02 22:37:17 +08:00
|
|
|
#endif
|
|
|
|
|
2010-03-04 05:38:48 +08:00
|
|
|
if (apb_timer_block_enabled)
|
|
|
|
return;
|
|
|
|
apbt_set_mapping();
|
2011-06-06 19:43:07 +08:00
|
|
|
if (!apbt_virt_address)
|
2010-03-04 05:38:48 +08:00
|
|
|
goto out_noapbt;
|
|
|
|
/*
|
|
|
|
* Read the frequency and check for a sane value, for ESL model
|
|
|
|
* we extend the possible clock range to allow time scaling.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (apbt_freq < APBT_MIN_FREQ || apbt_freq > APBT_MAX_FREQ) {
|
2011-06-06 19:43:07 +08:00
|
|
|
pr_debug("APBT has invalid freq 0x%lx\n", apbt_freq);
|
2010-03-04 05:38:48 +08:00
|
|
|
goto out_noapbt;
|
|
|
|
}
|
|
|
|
if (apbt_clocksource_register()) {
|
|
|
|
pr_debug("APBT has failed to register clocksource\n");
|
|
|
|
goto out_noapbt;
|
|
|
|
}
|
|
|
|
if (!apbt_clockevent_register())
|
|
|
|
apb_timer_block_enabled = 1;
|
|
|
|
else {
|
|
|
|
pr_debug("APBT has failed to register clockevent\n");
|
|
|
|
goto out_noapbt;
|
|
|
|
}
|
2009-09-02 22:37:17 +08:00
|
|
|
#ifdef CONFIG_SMP
|
2010-03-04 05:38:48 +08:00
|
|
|
/* kernel cmdline disable apb timer, so we will use lapic timers */
|
2013-10-18 06:35:29 +08:00
|
|
|
if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT) {
|
2010-03-04 05:38:48 +08:00
|
|
|
printk(KERN_INFO "apbt: disabled per cpu timer\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
pr_debug("%s: %d CPUs online\n", __func__, num_online_cpus());
|
2012-12-21 03:11:36 +08:00
|
|
|
if (num_possible_cpus() <= sfi_mtimer_num)
|
2010-03-04 05:38:48 +08:00
|
|
|
apbt_num_timers_used = num_possible_cpus();
|
2012-12-21 03:11:36 +08:00
|
|
|
else
|
2010-03-04 05:38:48 +08:00
|
|
|
apbt_num_timers_used = 1;
|
|
|
|
pr_debug("%s: %d APB timers used\n", __func__, apbt_num_timers_used);
|
|
|
|
|
|
|
|
/* here we set up per CPU timer data structure */
|
|
|
|
for (i = 0; i < apbt_num_timers_used; i++) {
|
|
|
|
adev = &per_cpu(cpu_apbt_dev, i);
|
|
|
|
adev->num = i;
|
|
|
|
adev->cpu = i;
|
|
|
|
p_mtmr = sfi_get_mtmr(i);
|
2011-06-06 19:43:07 +08:00
|
|
|
if (p_mtmr)
|
2010-03-04 05:38:48 +08:00
|
|
|
adev->irq = p_mtmr->irq;
|
2011-06-06 19:43:07 +08:00
|
|
|
else
|
2010-03-04 05:38:48 +08:00
|
|
|
printk(KERN_ERR "Failed to get timer for cpu %d\n", i);
|
2011-06-06 19:43:07 +08:00
|
|
|
snprintf(adev->name, sizeof(adev->name) - 1, "apbt%d", i);
|
2010-03-04 05:38:48 +08:00
|
|
|
}
|
2009-09-02 22:37:17 +08:00
|
|
|
#endif
|
|
|
|
|
2010-03-04 05:38:48 +08:00
|
|
|
return;
|
2009-09-02 22:37:17 +08:00
|
|
|
|
|
|
|
out_noapbt:
|
2010-03-04 05:38:48 +08:00
|
|
|
apbt_clear_mapping();
|
|
|
|
apb_timer_block_enabled = 0;
|
|
|
|
panic("failed to enable APB timer\n");
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* called before apb_timer_enable, use early map */
|
2011-06-06 19:43:07 +08:00
|
|
|
unsigned long apbt_quick_calibrate(void)
|
2009-09-02 22:37:17 +08:00
|
|
|
{
|
2010-03-04 05:38:48 +08:00
|
|
|
int i, scale;
|
|
|
|
u64 old, new;
|
|
|
|
cycle_t t1, t2;
|
|
|
|
unsigned long khz = 0;
|
|
|
|
u32 loop, shift;
|
|
|
|
|
|
|
|
apbt_set_mapping();
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clocksource_start(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
/* check if the timer can count down, otherwise return */
|
2011-06-06 19:43:07 +08:00
|
|
|
old = dw_apb_clocksource_read(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
i = 10000;
|
|
|
|
while (--i) {
|
2011-06-06 19:43:07 +08:00
|
|
|
if (old != dw_apb_clocksource_read(clocksource_apbt))
|
2010-03-04 05:38:48 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!i)
|
|
|
|
goto failed;
|
|
|
|
|
|
|
|
/* count 16 ms */
|
2011-06-06 19:43:07 +08:00
|
|
|
loop = (apbt_freq / 1000) << 4;
|
2010-03-04 05:38:48 +08:00
|
|
|
|
|
|
|
/* restart the timer to ensure it won't get to 0 in the calibration */
|
2011-06-06 19:43:07 +08:00
|
|
|
dw_apb_clocksource_start(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
|
2011-06-06 19:43:07 +08:00
|
|
|
old = dw_apb_clocksource_read(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
old += loop;
|
|
|
|
|
|
|
|
t1 = __native_read_tsc();
|
|
|
|
|
|
|
|
do {
|
2011-06-06 19:43:07 +08:00
|
|
|
new = dw_apb_clocksource_read(clocksource_apbt);
|
2010-03-04 05:38:48 +08:00
|
|
|
} while (new < old);
|
|
|
|
|
|
|
|
t2 = __native_read_tsc();
|
|
|
|
|
|
|
|
shift = 5;
|
|
|
|
if (unlikely(loop >> shift == 0)) {
|
|
|
|
printk(KERN_INFO
|
|
|
|
"APBT TSC calibration failed, not enough resolution\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
scale = (int)div_u64((t2 - t1), loop >> shift);
|
2011-06-06 19:43:07 +08:00
|
|
|
khz = (scale * (apbt_freq / 1000)) >> shift;
|
2010-03-04 05:38:48 +08:00
|
|
|
printk(KERN_INFO "TSC freq calculated by APB timer is %lu khz\n", khz);
|
|
|
|
return khz;
|
2009-09-02 22:37:17 +08:00
|
|
|
failed:
|
2010-03-04 05:38:48 +08:00
|
|
|
return 0;
|
2009-09-02 22:37:17 +08:00
|
|
|
}
|